1 // Licensed to the .NET Foundation under one or more agreements.
2 // The .NET Foundation licenses this file to you under the MIT license.
3 // See the LICENSE file in the project root for more information.
4 //////////////////////////////////////////////////////////////////////////////
7 // This file was previously known as emitfmts.h
11 #if !defined(_TARGET_XARCH_)
12 #error Unexpected target type
16 //////////////////////////////////////////////////////////////////////////////
22 ID_OP_NONE, // no additional arguments
23 ID_OP_SCNS, // small const operand (21-bits or less, no reloc)
24 ID_OP_CNS, // constant operand
25 ID_OP_DSP, // displacement operand
26 ID_OP_DSP_CNS, // displacement + constant
27 ID_OP_AMD, // addrmode with dsp
28 ID_OP_AMD_CNS, // addrmode with dsp + constant
29 ID_OP_JMP, // local jump
30 ID_OP_LBL, // label operand
31 ID_OP_CALL, // direct method call
32 ID_OP_SPEC, // special handling required
35 //////////////////////////////////////////////////////////////////////////////
36 #else // !DEFINE_ID_OPS
37 //////////////////////////////////////////////////////////////////////////////
42 #else // DEFINE_IS_OPS
44 //////////////////////////////////////////////////////////////////////////////
47 #error Must define IF_DEF macro before including this file
50 //////////////////////////////////////////////////////////////////////////////
52 // A note on the naming convention for instruction forms (IF_xxxxx).
53 // For 3-character code XYY, generally we have:
64 // The following sequences don't follow this pattern:
67 // SHF - shift-constant
69 // For IF_XXX_YYY, the first operand is XXX, the second operand is YYY.
71 //////////////////////////////////////////////////////////////////////////////
73 //////////////////////////////////////////////////////////////////////////////
75 // enum insFormat instruction enum ID_OPS
78 //////////////////////////////////////////////////////////////////////////////
80 IF_DEF(NONE, IS_NONE, NONE) // no operands
82 IF_DEF(LABEL, IS_NONE, JMP ) // label
83 IF_DEF(RWR_LABEL, IS_R1_WR, JMP ) // write label to register
84 IF_DEF(SWR_LABEL, IS_SF_WR, LBL ) // write label to stack
86 IF_DEF(METHOD, IS_NONE, CALL) // method
87 IF_DEF(METHPTR, IS_NONE, CALL) // method ptr (glbl)
89 IF_DEF(CNS, IS_NONE, SCNS) // const
91 //----------------------------------------------------------------------------
92 // NOTE: The order of the "RD/WR/RW" varieties must match that of
93 // the "insUpdateModes" enum in "instr.h".
94 //----------------------------------------------------------------------------
96 IF_DEF(RRD, IS_R1_RD, NONE) // read reg
97 IF_DEF(RWR, IS_R1_WR, NONE) // write reg
98 IF_DEF(RRW, IS_R1_RW, NONE) // r/w reg
100 IF_DEF(RRD_CNS, IS_R1_RD, SCNS) // read reg , const
101 IF_DEF(RWR_CNS, IS_R1_WR, SCNS) // write reg , const
102 IF_DEF(RRW_CNS, IS_R1_RW, SCNS) // r/w reg , const
103 IF_DEF(RRW_SHF, IS_R1_RW, SCNS) // r/w reg , shift-const
105 IF_DEF(RRD_RRD, IS_R1_RD|IS_R2_RD, NONE) // read reg , read reg2
106 IF_DEF(RWR_RRD, IS_R1_WR|IS_R2_RD, NONE) // write reg , read reg2
107 IF_DEF(RRW_RRD, IS_R1_RW|IS_R2_RD, NONE) // r/w reg , read reg2
108 IF_DEF(RRW_RRW, IS_R1_RW|IS_R2_RW, NONE) // r/w reg , r/w reg2 - for XCHG reg, reg2
109 IF_DEF(RRW_RRW_CNS, IS_R1_RW|IS_R2_RW, SCNS) // r/w reg , r/w reg2 , const
111 IF_DEF(RWR_RRD_RRD, IS_R1_WR|IS_R2_RD|IS_R3_RD, NONE) // write reg , read reg2 , read reg3
112 IF_DEF(RWR_RRD_RRD_CNS, IS_R1_WR|IS_R2_RD|IS_R3_RD, SCNS) // write reg , read reg2 , read reg3, const
114 IF_DEF(RWR_RRD_RRD_RRD, IS_R1_WR|IS_R2_RD|IS_R3_RD|IS_R4_RD, NONE) // write reg , read reg2 , read reg3 , read reg4
115 //----------------------------------------------------------------------------
116 // The following formats are used for direct addresses (e.g. static data members)
117 //----------------------------------------------------------------------------
119 IF_DEF(MRD, IS_GM_RD, SPEC) // read [mem] (indirect call req. SPEC)
120 IF_DEF(MWR, IS_GM_WR, DSP) // write [mem]
121 IF_DEF(MRW, IS_GM_RW, DSP) // r/w [mem]
122 IF_DEF(MRD_OFF, IS_GM_RD, DSP) // offset mem
124 IF_DEF(RRD_MRD, IS_GM_RD|IS_R1_RD, DSP) // read reg , read [mem]
125 IF_DEF(RWR_MRD, IS_GM_RD|IS_R1_WR, DSP) // write reg , read [mem]
126 IF_DEF(RRW_MRD, IS_GM_RD|IS_R1_RW, DSP) // r/w reg , read [mem]
127 IF_DEF(RRW_MRD_CNS, IS_GM_RD|IS_R1_RW, DSP_CNS) // r/w reg , read [mem], const
129 IF_DEF(RWR_RRD_MRD, IS_GM_RD|IS_R1_WR|IS_R2_RD, DSP) // write reg , read reg2 , read [mem]
130 IF_DEF(RWR_MRD_CNS, IS_GM_RD|IS_R1_WR, DSP_CNS) // write reg , read [mem], const
131 IF_DEF(RWR_RRD_MRD_CNS, IS_GM_RD|IS_R1_WR|IS_R2_RD, DSP_CNS) // write reg , read reg2 , read [mem], const
132 IF_DEF(RWR_MRD_OFF, IS_GM_RD|IS_R1_WR, DSP) // write reg , offset mem
134 IF_DEF(MRD_RRD, IS_GM_RD|IS_R1_RD, DSP) // read [mem], read reg
135 IF_DEF(MWR_RRD, IS_GM_WR|IS_R1_RD, DSP) // write [mem], read reg
136 IF_DEF(MRW_RRD, IS_GM_RW|IS_R1_RD, DSP) // r/w [mem], read reg
138 IF_DEF(MRD_CNS, IS_GM_RD, DSP_CNS) // read [mem], const
139 IF_DEF(MWR_CNS, IS_GM_WR, DSP_CNS) // write [mem], const
140 IF_DEF(MRW_CNS, IS_GM_RW, DSP_CNS) // r/w [mem], const
142 IF_DEF(MWR_RRD_CNS, IS_GM_WR|IS_R1_RD, DSP_CNS) // write [mem], read reg, const
144 IF_DEF(MRW_SHF, IS_GM_RW, DSP_CNS) // shift [mem], const
146 //----------------------------------------------------------------------------
147 // The following formats are used for stack frame refs
148 //----------------------------------------------------------------------------
150 IF_DEF(SRD, IS_SF_RD, SPEC) // read [stk] (indirect call req. SPEC)
151 IF_DEF(SWR, IS_SF_WR, NONE) // write [stk]
152 IF_DEF(SRW, IS_SF_RW, NONE) // r/w [stk]
154 IF_DEF(RRD_SRD, IS_SF_RD|IS_R1_RD, NONE) // read reg , read [stk]
155 IF_DEF(RWR_SRD, IS_SF_RD|IS_R1_WR, NONE) // write reg , read [stk]
156 IF_DEF(RRW_SRD, IS_SF_RD|IS_R1_RW, NONE) // r/w reg , read [stk]
157 IF_DEF(RRW_SRD_CNS, IS_SF_RD|IS_R1_RW, CNS ) // r/w reg , read [stk], const
159 IF_DEF(RWR_RRD_SRD, IS_SF_RD|IS_R1_WR|IS_R2_RD, NONE) // write reg , read reg2, read [stk]
160 IF_DEF(RWR_SRD_CNS, IS_SF_RD|IS_R1_WR, CNS ) // write reg , read [stk], const
161 IF_DEF(RWR_RRD_SRD_CNS, IS_SF_RD|IS_R1_WR|IS_R2_RD, CNS ) // write reg , read reg2, read [stk], const
163 IF_DEF(SRD_RRD, IS_SF_RD|IS_R1_RD, NONE) // read [stk], read reg
164 IF_DEF(SWR_RRD, IS_SF_WR|IS_R1_RD, NONE) // write [stk], read reg
165 IF_DEF(SRW_RRD, IS_SF_RW|IS_R1_RD, NONE) // r/w [stk], read reg
167 IF_DEF(SRD_CNS, IS_SF_RD, CNS ) // read [stk], const
168 IF_DEF(SWR_CNS, IS_SF_WR, CNS ) // write [stk], const
169 IF_DEF(SRW_CNS, IS_SF_RW, CNS ) // r/w [stk], const
171 IF_DEF(SRW_SHF, IS_SF_RW, CNS ) // shift [stk], const
173 //----------------------------------------------------------------------------
174 // The following formats are used for indirect address modes
175 //----------------------------------------------------------------------------
178 IF_DEF(ARD, IS_AM_RD, SPEC) // read [adr] (indirect call req. SPEC)
179 IF_DEF(AWR, IS_AM_WR, AMD ) // write [adr]
180 IF_DEF(ARW, IS_AM_RW, AMD ) // r/w [adr]
182 IF_DEF(RRD_ARD, IS_AM_RD|IS_R1_RD, AMD ) // read reg , read [adr]
183 IF_DEF(RWR_ARD, IS_AM_RD|IS_R1_WR, AMD ) // write reg , read [adr]
184 IF_DEF(RRW_ARD, IS_AM_RD|IS_R1_RW, AMD ) // r/w reg , read [adr]
185 IF_DEF(RRW_ARD_CNS, IS_AM_RD|IS_R1_RW, AMD_CNS) // r/w reg , read [adr], const
187 IF_DEF(RWR_RRD_ARD, IS_AM_RD|IS_R1_WR|IS_R2_RD, AMD ) // write reg , read reg2, read [adr]
188 IF_DEF(RWR_ARD_CNS, IS_AM_RD|IS_R1_WR, AMD_CNS) // write reg , read [adr], const
189 IF_DEF(RWR_RRD_ARD_CNS, IS_AM_RD|IS_R1_WR|IS_R2_RD, AMD_CNS) // write reg , read reg2, read [adr], const
191 IF_DEF(ARD_RRD, IS_AM_RD|IS_R1_RD, AMD ) // read [adr], read reg
192 IF_DEF(AWR_RRD, IS_AM_WR|IS_R1_RD, AMD ) // write [adr], read reg
193 IF_DEF(ARW_RRD, IS_AM_RW|IS_R1_RD, AMD ) // r/w [adr], read reg
195 IF_DEF(ARD_CNS, IS_AM_RD, AMD_CNS) // read [adr], const
196 IF_DEF(AWR_CNS, IS_AM_WR, AMD_CNS) // write [adr], const
197 IF_DEF(ARW_CNS, IS_AM_RW, AMD_CNS) // r/w [adr], const
199 IF_DEF(AWR_RRD_CNS, IS_AM_WR|IS_R1_RD, AMD_CNS) // write [adr], read reg, const
201 IF_DEF(ARW_SHF, IS_AM_RW, AMD_CNS) // shift [adr], const
205 //----------------------------------------------------------------------------
206 // The following formats are used for FP coprocessor instructions
207 //----------------------------------------------------------------------------
208 #if FEATURE_STACK_FP_X87
210 IF_DEF(FRD, IS_FP_STK, NONE) // read ST(n)
211 IF_DEF(FWR, IS_FP_STK, NONE) // write ST(n)
212 IF_DEF(FRW, IS_FP_STK, NONE) // r/w ST(n)
214 IF_DEF(TRD, IS_FP_STK, NONE) // read ST(0)
215 IF_DEF(TWR, IS_FP_STK, NONE) // write ST(0)
216 IF_DEF(TRW, IS_FP_STK, NONE) // r/w ST(0)
218 IF_DEF(FRD_TRD, IS_FP_STK, NONE) // read ST(n), read ST(0)
219 IF_DEF(FWR_TRD, IS_FP_STK, NONE) // write ST(n), read ST(0)
220 IF_DEF(FRW_TRD, IS_FP_STK, NONE) // r/w ST(n), read ST(0)
222 IF_DEF(TRD_FRD, IS_FP_STK, NONE) // read ST(0), read ST(n)
223 IF_DEF(TWR_FRD, IS_FP_STK, NONE) // write ST(0), read ST(n)
224 IF_DEF(TRW_FRD, IS_FP_STK, NONE) // r/w ST(0), read ST(n)
226 IF_DEF(TRD_SRD, IS_FP_STK|IS_SF_RD, NONE) // read ST(0), read [stk]
227 IF_DEF(TWR_SRD, IS_FP_STK|IS_SF_RD, NONE) // write ST(0), read [stk]
228 IF_DEF(TRW_SRD, IS_FP_STK|IS_SF_RD, NONE) // r/w ST(0), read [stk]
230 //////(SRD_TRD, IS_FP_STK|IS_SF_RD, NONE) // read [stk], read ST(n)
231 IF_DEF(SWR_TRD, IS_FP_STK|IS_SF_WR, NONE) // write [stk], read ST(n)
232 //////(SRW_TRD, IS_FP_STK|IS_SF_RW, NONE) // r/w [stk], read ST(n)
234 IF_DEF(TRD_MRD, IS_FP_STK|IS_GM_RD, NONE) // read ST(0), read [mem]
235 IF_DEF(TWR_MRD, IS_FP_STK|IS_GM_RD, NONE) // write ST(0), read [mem]
236 IF_DEF(TRW_MRD, IS_FP_STK|IS_GM_RD, NONE) // r/w ST(0), read [mem]
238 //////(MRD_TRD, IS_FP_STK|IS_GM_RD, NONE) // read [mem], read ST(n)
239 IF_DEF(MWR_TRD, IS_FP_STK|IS_GM_WR, NONE) // write [mem], read ST(n)
240 //////(MRW_TRD, IS_FP_STK|IS_GM_RW, NONE) // r/w [mem], read ST(n)
242 IF_DEF(TRD_ARD, IS_FP_STK|IS_AM_RD, AMD ) // read ST(0), read [adr]
243 IF_DEF(TWR_ARD, IS_FP_STK|IS_AM_RD, AMD ) // write ST(0), read [adr]
244 IF_DEF(TRW_ARD, IS_FP_STK|IS_AM_RD, AMD ) // r/w ST(0), read [adr]
246 //////(ARD_TRD, IS_FP_STK|IS_AM_RD, AMD ) // read [adr], read ST(n)
247 IF_DEF(AWR_TRD, IS_FP_STK|IS_AM_WR, AMD ) // write [adr], read ST(n)
248 //////(ARW_TRD, IS_FP_STK|IS_AM_RW, AMD ) // r/w [adr], read ST(n)
250 #endif // FEATURE_STACK_FP_X87
252 //////////////////////////////////////////////////////////////////////////////
256 //////////////////////////////////////////////////////////////////////////////
257 #endif // DEFINE_IS_OPS
258 #endif // DEFINE_ID_OPS
259 //////////////////////////////////////////////////////////////////////////////