f1ff36265b5eaac95cdc480cd8308254d248a7c7
[platform/upstream/coreclr.git] / src / jit / codegenlinear.h
1 // Licensed to the .NET Foundation under one or more agreements.
2 // The .NET Foundation licenses this file to you under the MIT license.
3 // See the LICENSE file in the project root for more information.
4
5 //
6 // This file contains the members of CodeGen that are defined and used
7 // only by the RyuJIT backend.  It is included by CodeGen.h in the
8 // definition of the CodeGen class.
9 //
10
11 #ifndef LEGACY_BACKEND // Not necessary (it's this way in the #include location), but helpful to IntelliSense
12
13 void genSetRegToConst(regNumber targetReg, var_types targetType, GenTree* tree);
14 void genCodeForTreeNode(GenTree* treeNode);
15 void genCodeForBinary(GenTree* treeNode);
16
17 #if defined(_TARGET_X86_)
18 void genCodeForLongUMod(GenTreeOp* node);
19 #endif // _TARGET_X86_
20
21 void genCodeForDivMod(GenTreeOp* treeNode);
22 void genCodeForMul(GenTreeOp* treeNode);
23 void genCodeForMulHi(GenTreeOp* treeNode);
24 void genLeaInstruction(GenTreeAddrMode* lea);
25 void genSetRegToCond(regNumber dstReg, GenTree* tree);
26
27 #if defined(_TARGET_ARMARCH_)
28 void genScaledAdd(emitAttr attr, regNumber targetReg, regNumber baseReg, regNumber indexReg, int scale);
29 #endif // _TARGET_ARMARCH_
30
31 #if defined(_TARGET_ARM_)
32 void genCodeForMulLong(GenTreeMultiRegOp* treeNode);
33 #endif // _TARGET_ARM_
34
35 #if !defined(_TARGET_64BIT_)
36 void genLongToIntCast(GenTree* treeNode);
37 #endif
38
39 void genIntToIntCast(GenTree* treeNode);
40 void genFloatToFloatCast(GenTree* treeNode);
41 void genFloatToIntCast(GenTree* treeNode);
42 void genIntToFloatCast(GenTree* treeNode);
43 void genCkfinite(GenTree* treeNode);
44 void genCodeForCompare(GenTreeOp* tree);
45 void genIntrinsic(GenTree* treeNode);
46 void genPutArgStk(GenTreePutArgStk* treeNode);
47 void genPutArgReg(GenTreeOp* tree);
48 #ifdef _TARGET_ARM_
49 void genPutArgSplit(GenTreePutArgSplit* treeNode);
50 #endif
51
52 #if defined(_TARGET_XARCH_)
53 unsigned getBaseVarForPutArgStk(GenTree* treeNode);
54 #endif // _TARGET_XARCH_
55
56 unsigned getFirstArgWithStackSlot();
57
58 void genCompareFloat(GenTree* treeNode);
59 void genCompareInt(GenTree* treeNode);
60
61 #ifdef FEATURE_SIMD
62 enum SIMDScalarMoveType
63 {
64     SMT_ZeroInitUpper,                  // zero initlaize target upper bits
65     SMT_ZeroInitUpper_SrcHasUpperZeros, // zero initialize target upper bits; source upper bits are known to be zero
66     SMT_PreserveUpper                   // preserve target upper bits
67 };
68
69 #ifdef _TARGET_ARM64_
70 insOpts genGetSimdInsOpt(emitAttr size, var_types elementType);
71 #endif
72 instruction getOpForSIMDIntrinsic(SIMDIntrinsicID intrinsicId, var_types baseType, unsigned* ival = nullptr);
73 void genSIMDScalarMove(
74     var_types targetType, var_types type, regNumber target, regNumber src, SIMDScalarMoveType moveType);
75 void genSIMDZero(var_types targetType, var_types baseType, regNumber targetReg);
76 void genSIMDIntrinsicInit(GenTreeSIMD* simdNode);
77 void genSIMDIntrinsicInitN(GenTreeSIMD* simdNode);
78 void genSIMDIntrinsicInitArray(GenTreeSIMD* simdNode);
79 void genSIMDIntrinsicUnOp(GenTreeSIMD* simdNode);
80 void genSIMDIntrinsicBinOp(GenTreeSIMD* simdNode);
81 void genSIMDIntrinsicRelOp(GenTreeSIMD* simdNode);
82 void genSIMDIntrinsicDotProduct(GenTreeSIMD* simdNode);
83 void genSIMDIntrinsicSetItem(GenTreeSIMD* simdNode);
84 void genSIMDIntrinsicGetItem(GenTreeSIMD* simdNode);
85 void genSIMDIntrinsicShuffleSSE2(GenTreeSIMD* simdNode);
86 void genSIMDIntrinsicUpperSave(GenTreeSIMD* simdNode);
87 void genSIMDIntrinsicUpperRestore(GenTreeSIMD* simdNode);
88 void genSIMDLo64BitConvert(SIMDIntrinsicID intrinsicID,
89                            var_types       simdType,
90                            var_types       baseType,
91                            regNumber       tmpReg,
92                            regNumber       tmpIntReg,
93                            regNumber       targetReg);
94 void genSIMDIntrinsic32BitConvert(GenTreeSIMD* simdNode);
95 void genSIMDIntrinsic64BitConvert(GenTreeSIMD* simdNode);
96 void genSIMDIntrinsicNarrow(GenTreeSIMD* simdNode);
97 void genSIMDExtractUpperHalf(GenTreeSIMD* simdNode, regNumber srcReg, regNumber tgtReg);
98 void genSIMDIntrinsicWiden(GenTreeSIMD* simdNode);
99 void genSIMDIntrinsic(GenTreeSIMD* simdNode);
100 void genSIMDCheck(GenTree* treeNode);
101
102 // TYP_SIMD12 (i.e Vector3 of size 12 bytes) is not a hardware supported size and requires
103 // two reads/writes on 64-bit targets. These routines abstract reading/writing of Vector3
104 // values through an indirection. Note that Vector3 locals allocated on stack would have
105 // their size rounded to TARGET_POINTER_SIZE (which is 8 bytes on 64-bit targets) and hence
106 // Vector3 locals could be treated as TYP_SIMD16 while reading/writing.
107 void genStoreIndTypeSIMD12(GenTree* treeNode);
108 void genLoadIndTypeSIMD12(GenTree* treeNode);
109 void genStoreLclTypeSIMD12(GenTree* treeNode);
110 void genLoadLclTypeSIMD12(GenTree* treeNode);
111 #ifdef _TARGET_X86_
112 void genStoreSIMD12ToStack(regNumber operandReg, regNumber tmpReg);
113 void genPutArgStkSIMD12(GenTree* treeNode);
114 #endif // _TARGET_X86_
115 #endif // FEATURE_SIMD
116
117 #ifdef FEATURE_HW_INTRINSICS
118 void genHWIntrinsic(GenTreeHWIntrinsic* node);
119 #if defined(_TARGET_XARCH_)
120 void genHWIntrinsic_R_R_RM(GenTreeHWIntrinsic* node, instruction ins);
121 void genHWIntrinsic_R_R_RM_I(GenTreeHWIntrinsic* node, instruction ins);
122 void genSSEIntrinsic(GenTreeHWIntrinsic* node);
123 void genSSE2Intrinsic(GenTreeHWIntrinsic* node);
124 void genSSE41Intrinsic(GenTreeHWIntrinsic* node);
125 void genSSE42Intrinsic(GenTreeHWIntrinsic* node);
126 void genAVXIntrinsic(GenTreeHWIntrinsic* node);
127 void genAVX2Intrinsic(GenTreeHWIntrinsic* node);
128 void genAESIntrinsic(GenTreeHWIntrinsic* node);
129 void genBMI1Intrinsic(GenTreeHWIntrinsic* node);
130 void genBMI2Intrinsic(GenTreeHWIntrinsic* node);
131 void genFMAIntrinsic(GenTreeHWIntrinsic* node);
132 void genLZCNTIntrinsic(GenTreeHWIntrinsic* node);
133 void genPCLMULQDQIntrinsic(GenTreeHWIntrinsic* node);
134 void genPOPCNTIntrinsic(GenTreeHWIntrinsic* node);
135 template <typename HWIntrinsicSwitchCaseBody>
136 void genHWIntrinsicJumpTableFallback(NamedIntrinsic            intrinsic,
137                                      regNumber                 nonConstImmReg,
138                                      regNumber                 baseReg,
139                                      regNumber                 offsReg,
140                                      HWIntrinsicSwitchCaseBody emitSwCase);
141 #endif // defined(_TARGET_XARCH_)
142 #if defined(_TARGET_ARM64_)
143 instruction getOpForHWIntrinsic(GenTreeHWIntrinsic* node, var_types instrType);
144 void genHWIntrinsicUnaryOp(GenTreeHWIntrinsic* node);
145 void genHWIntrinsicCrcOp(GenTreeHWIntrinsic* node);
146 void genHWIntrinsicSimdBinaryOp(GenTreeHWIntrinsic* node);
147 void genHWIntrinsicSimdExtractOp(GenTreeHWIntrinsic* node);
148 void genHWIntrinsicSimdInsertOp(GenTreeHWIntrinsic* node);
149 void genHWIntrinsicSimdSelectOp(GenTreeHWIntrinsic* node);
150 void genHWIntrinsicSimdSetAllOp(GenTreeHWIntrinsic* node);
151 void genHWIntrinsicSimdUnaryOp(GenTreeHWIntrinsic* node);
152 void genHWIntrinsicSimdBinaryRMWOp(GenTreeHWIntrinsic* node);
153 void genHWIntrinsicSimdTernaryRMWOp(GenTreeHWIntrinsic* node);
154 void genHWIntrinsicShaHashOp(GenTreeHWIntrinsic* node);
155 void genHWIntrinsicShaRotateOp(GenTreeHWIntrinsic* node);
156 template <typename HWIntrinsicSwitchCaseBody>
157 void genHWIntrinsicSwitchTable(regNumber swReg, regNumber tmpReg, int swMax, HWIntrinsicSwitchCaseBody emitSwCase);
158 #endif // defined(_TARGET_XARCH_)
159 #endif // FEATURE_HW_INTRINSICS
160
161 #if !defined(_TARGET_64BIT_)
162
163 // CodeGen for Long Ints
164
165 void genStoreLongLclVar(GenTree* treeNode);
166
167 #endif // !defined(_TARGET_64BIT_)
168
169 void genProduceReg(GenTree* tree);
170 void genUnspillRegIfNeeded(GenTree* tree);
171 regNumber genConsumeReg(GenTree* tree);
172 void genCopyRegIfNeeded(GenTree* tree, regNumber needReg);
173 void genConsumeRegAndCopy(GenTree* tree, regNumber needReg);
174
175 void genConsumeIfReg(GenTree* tree)
176 {
177     if (!tree->isContained())
178     {
179         (void)genConsumeReg(tree);
180     }
181 }
182
183 void genRegCopy(GenTree* tree);
184 void genTransferRegGCState(regNumber dst, regNumber src);
185 void genConsumeAddress(GenTree* addr);
186 void genConsumeAddrMode(GenTreeAddrMode* mode);
187 void genSetBlockSize(GenTreeBlk* blkNode, regNumber sizeReg);
188 void genConsumeBlockSrc(GenTreeBlk* blkNode);
189 void genSetBlockSrc(GenTreeBlk* blkNode, regNumber srcReg);
190 void genConsumeBlockOp(GenTreeBlk* blkNode, regNumber dstReg, regNumber srcReg, regNumber sizeReg);
191
192 #ifdef FEATURE_PUT_STRUCT_ARG_STK
193 void genConsumePutStructArgStk(GenTreePutArgStk* putArgStkNode, regNumber dstReg, regNumber srcReg, regNumber sizeReg);
194 #endif // FEATURE_PUT_STRUCT_ARG_STK
195 #ifdef _TARGET_ARM_
196 void genConsumeArgSplitStruct(GenTreePutArgSplit* putArgNode);
197 #endif
198
199 void genConsumeRegs(GenTree* tree);
200 void genConsumeOperands(GenTreeOp* tree);
201 void genEmitGSCookieCheck(bool pushReg);
202 void genSetRegToIcon(regNumber reg, ssize_t val, var_types type = TYP_INT, insFlags flags = INS_FLAGS_DONT_CARE);
203 void genCodeForShift(GenTree* tree);
204
205 #if defined(_TARGET_X86_) || defined(_TARGET_ARM_)
206 void genCodeForShiftLong(GenTree* tree);
207 #endif
208
209 #ifdef _TARGET_XARCH_
210 void genCodeForShiftRMW(GenTreeStoreInd* storeInd);
211 void genCodeForBT(GenTreeOp* bt);
212 #endif // _TARGET_XARCH_
213
214 void genCodeForCast(GenTreeOp* tree);
215 void genCodeForLclAddr(GenTree* tree);
216 void genCodeForIndexAddr(GenTreeIndexAddr* tree);
217 void genCodeForIndir(GenTreeIndir* tree);
218 void genCodeForNegNot(GenTree* tree);
219 void genCodeForLclVar(GenTreeLclVar* tree);
220 void genCodeForLclFld(GenTreeLclFld* tree);
221 void genCodeForStoreLclFld(GenTreeLclFld* tree);
222 void genCodeForStoreLclVar(GenTreeLclVar* tree);
223 void genCodeForReturnTrap(GenTreeOp* tree);
224 void genCodeForJcc(GenTreeCC* tree);
225 void genCodeForSetcc(GenTreeCC* setcc);
226 void genCodeForStoreInd(GenTreeStoreInd* tree);
227 void genCodeForSwap(GenTreeOp* tree);
228 void genCodeForCpObj(GenTreeObj* cpObjNode);
229 void genCodeForCpBlk(GenTreeBlk* cpBlkNode);
230 void genCodeForCpBlkRepMovs(GenTreeBlk* cpBlkNode);
231 void genCodeForCpBlkUnroll(GenTreeBlk* cpBlkNode);
232 void genCodeForPhysReg(GenTreePhysReg* tree);
233 void genCodeForNullCheck(GenTreeOp* tree);
234 void genCodeForCmpXchg(GenTreeCmpXchg* tree);
235
236 void genAlignStackBeforeCall(GenTreePutArgStk* putArgStk);
237 void genAlignStackBeforeCall(GenTreeCall* call);
238 void genRemoveAlignmentAfterCall(GenTreeCall* call, unsigned bias = 0);
239
240 #if defined(UNIX_X86_ABI)
241
242 unsigned curNestedAlignment; // Keep track of alignment adjustment required during codegen.
243 unsigned maxNestedAlignment; // The maximum amount of alignment adjustment required.
244
245 void SubtractNestedAlignment(unsigned adjustment)
246 {
247     assert(curNestedAlignment >= adjustment);
248     unsigned newNestedAlignment = curNestedAlignment - adjustment;
249     if (curNestedAlignment != newNestedAlignment)
250     {
251         JITDUMP("Adjusting stack nested alignment from %d to %d\n", curNestedAlignment, newNestedAlignment);
252     }
253     curNestedAlignment = newNestedAlignment;
254 }
255
256 void AddNestedAlignment(unsigned adjustment)
257 {
258     unsigned newNestedAlignment = curNestedAlignment + adjustment;
259     if (curNestedAlignment != newNestedAlignment)
260     {
261         JITDUMP("Adjusting stack nested alignment from %d to %d\n", curNestedAlignment, newNestedAlignment);
262     }
263     curNestedAlignment = newNestedAlignment;
264
265     if (curNestedAlignment > maxNestedAlignment)
266     {
267         JITDUMP("Max stack nested alignment changed from %d to %d\n", maxNestedAlignment, curNestedAlignment);
268         maxNestedAlignment = curNestedAlignment;
269     }
270 }
271
272 #endif
273
274 #ifdef FEATURE_PUT_STRUCT_ARG_STK
275 #ifdef _TARGET_X86_
276 bool genAdjustStackForPutArgStk(GenTreePutArgStk* putArgStk);
277 void genPushReg(var_types type, regNumber srcReg);
278 void genPutArgStkFieldList(GenTreePutArgStk* putArgStk);
279 #endif // _TARGET_X86_
280
281 void genPutStructArgStk(GenTreePutArgStk* treeNode);
282
283 unsigned genMove8IfNeeded(unsigned size, regNumber tmpReg, GenTree* srcAddr, unsigned offset);
284 unsigned genMove4IfNeeded(unsigned size, regNumber tmpReg, GenTree* srcAddr, unsigned offset);
285 unsigned genMove2IfNeeded(unsigned size, regNumber tmpReg, GenTree* srcAddr, unsigned offset);
286 unsigned genMove1IfNeeded(unsigned size, regNumber tmpReg, GenTree* srcAddr, unsigned offset);
287 void genStructPutArgRepMovs(GenTreePutArgStk* putArgStkNode);
288 void genStructPutArgUnroll(GenTreePutArgStk* putArgStkNode);
289 void genStoreRegToStackArg(var_types type, regNumber reg, int offset);
290 #endif // FEATURE_PUT_STRUCT_ARG_STK
291
292 void genCodeForLoadOffset(instruction ins, emitAttr size, regNumber dst, GenTree* base, unsigned offset);
293 void genCodeForStoreOffset(instruction ins, emitAttr size, regNumber src, GenTree* base, unsigned offset);
294
295 #ifdef _TARGET_ARM64_
296 void genCodeForLoadPairOffset(regNumber dst, regNumber dst2, GenTree* base, unsigned offset);
297 void genCodeForStorePairOffset(regNumber src, regNumber src2, GenTree* base, unsigned offset);
298 #endif // _TARGET_ARM64_
299
300 void genCodeForStoreBlk(GenTreeBlk* storeBlkNode);
301 void genCodeForInitBlk(GenTreeBlk* initBlkNode);
302 void genCodeForInitBlkRepStos(GenTreeBlk* initBlkNode);
303 void genCodeForInitBlkUnroll(GenTreeBlk* initBlkNode);
304 void genJumpTable(GenTree* tree);
305 void genTableBasedSwitch(GenTree* tree);
306 void genCodeForArrIndex(GenTreeArrIndex* treeNode);
307 void genCodeForArrOffset(GenTreeArrOffs* treeNode);
308 instruction genGetInsForOper(genTreeOps oper, var_types type);
309 bool genEmitOptimizedGCWriteBarrier(GCInfo::WriteBarrierForm writeBarrierForm, GenTree* addr, GenTree* data);
310 void genCallInstruction(GenTreeCall* call);
311 void genJmpMethod(GenTree* jmp);
312 BasicBlock* genCallFinally(BasicBlock* block);
313 void genCodeForJumpTrue(GenTree* tree);
314 #ifdef _TARGET_ARM64_
315 void genCodeForJumpCompare(GenTreeOp* tree);
316 #endif // _TARGET_ARM64_
317
318 #if FEATURE_EH_FUNCLETS
319 void genEHCatchRet(BasicBlock* block);
320 #else  // !FEATURE_EH_FUNCLETS
321 void genEHFinallyOrFilterRet(BasicBlock* block);
322 #endif // !FEATURE_EH_FUNCLETS
323
324 void genMultiRegCallStoreToLocal(GenTree* treeNode);
325
326 // Deals with codegen for muti-register struct returns.
327 bool isStructReturn(GenTree* treeNode);
328 void genStructReturn(GenTree* treeNode);
329
330 void genReturn(GenTree* treeNode);
331
332 void genLclHeap(GenTree* tree);
333
334 bool genIsRegCandidateLocal(GenTree* tree)
335 {
336     if (!tree->IsLocal())
337     {
338         return false;
339     }
340     const LclVarDsc* varDsc = &compiler->lvaTable[tree->gtLclVarCommon.gtLclNum];
341     return (varDsc->lvIsRegCandidate());
342 }
343
344 #ifdef FEATURE_PUT_STRUCT_ARG_STK
345 #ifdef _TARGET_X86_
346 bool m_pushStkArg;
347 #else  // !_TARGET_X86_
348 unsigned m_stkArgVarNum;
349 unsigned m_stkArgOffset;
350 #endif // !_TARGET_X86_
351 #endif // !FEATURE_PUT_STRUCT_ARG_STK
352
353 #ifdef DEBUG
354 GenTree* lastConsumedNode;
355 void genNumberOperandUse(GenTree* const operand, int& useNum) const;
356 void genCheckConsumeNode(GenTree* const node);
357 #else  // !DEBUG
358 inline void genCheckConsumeNode(GenTree* treeNode)
359 {
360 }
361 #endif // DEBUG
362
363 #endif // !LEGACY_BACKEND