src/jit/codegen.h

   1 // Licensed to the .NET Foundation under one or more agreements.
   2 // The .NET Foundation licenses this file to you under the MIT license.
   3 // See the LICENSE file in the project root for more information.
   4
   5 //
   6 // This class contains all the data & functionality for code generation
   7 // of a method, except for the target-specific elements, which are
   8 // primarily in the Target class.
   9 //
  10
  11 #ifndef _CODEGEN_H_
  12 #define _CODEGEN_H_
  13 #include "compiler.h" // temporary??
  14 #include "codegeninterface.h"
  15 #include "regset.h"
  16 #include "jitgcinfo.h"
  17
  18 #if defined(_TARGET_AMD64_) || defined(_TARGET_ARM64_) || defined(_TARGET_ARM_)
  19 #define FOREACH_REGISTER_FILE(file)                                                                                    \
  20     for ((file) = &(this->intRegState); (file) != NULL;                                                                \
  21          (file) = ((file) == &(this->intRegState)) ? &(this->floatRegState) : NULL)
  22 #else
  23 #define FOREACH_REGISTER_FILE(file) (file) = &(this->intRegState);
  24 #endif
  25
  26 class CodeGen : public CodeGenInterface
  27 {
  28     friend class emitter;
  29     friend class DisAssembler;
  30
  31 public:
  32     // This could use further abstraction
  33     CodeGen(Compiler* theCompiler);
  34
  35     virtual void genGenerateCode(void** codePtr, ULONG* nativeSizeOfCode);
  36     // TODO-Cleanup: Abstract out the part of this that finds the addressing mode, and
  37     // move it to Lower
  38     virtual bool genCreateAddrMode(GenTreePtr  addr,
  39                                    int         mode,
  40                                    bool        fold,
  41                                    regMaskTP   regMask,
  42                                    bool*       revPtr,
  43                                    GenTreePtr* rv1Ptr,
  44                                    GenTreePtr* rv2Ptr,
  45 #if SCALED_ADDR_MODES
  46                                    unsigned* mulPtr,
  47 #endif
  48                                    unsigned* cnsPtr,
  49                                    bool      nogen = false);
  50
  51 private:
  52 #if defined(_TARGET_XARCH_) && !FEATURE_STACK_FP_X87
  53     // Bit masks used in negating a float or double number.
  54     // The below gentrees encapsulate the data offset to the bitmasks as GT_CLS_VAR nodes.
  55     // This is to avoid creating more than one data constant for these bitmasks when a
  56     // method has more than one GT_NEG operation on floating point values.
  57     GenTreePtr negBitmaskFlt;
  58     GenTreePtr negBitmaskDbl;
  59
  60     // Bit masks used in computing Math.Abs() of a float or double number.
  61     GenTreePtr absBitmaskFlt;
  62     GenTreePtr absBitmaskDbl;
  63
  64     // Bit mask used in U8 -> double conversion to adjust the result.
  65     GenTreePtr u8ToDblBitmask;
  66
  67     // Generates SSE2 code for the given tree as "Operand BitWiseOp BitMask"
  68     void genSSE2BitwiseOp(GenTreePtr treeNode);
  69 #endif // defined(_TARGET_XARCH_) && !FEATURE_STACK_FP_X87
  70
  71     void genPrepForCompiler();
  72
  73     void genPrepForEHCodegen();
  74
  75     inline RegState* regStateForType(var_types t)
  76     {
  77         return varTypeIsFloating(t) ? &floatRegState : &intRegState;
  78     }
  79     inline RegState* regStateForReg(regNumber reg)
  80     {
  81         return genIsValidFloatReg(reg) ? &floatRegState : &intRegState;
  82     }
  83
  84     regNumber genFramePointerReg()
  85     {
  86         if (isFramePointerUsed())
  87         {
  88             return REG_FPBASE;
  89         }
  90         else
  91         {
  92             return REG_SPBASE;
  93         }
  94     }
  95
  96     enum CompareKind
  97     {
  98         CK_SIGNED,
  99         CK_UNSIGNED,
 100         CK_LOGICAL
 101     };
 102     static emitJumpKind genJumpKindForOper(genTreeOps cmp, CompareKind compareKind);
 103
 104     // For a given compare oper tree, returns the conditions to use with jmp/set in 'jmpKind' array.
 105     // The corresponding elements of jmpToTrueLabel indicate whether the target of the jump is to the
 106     // 'true' label or a 'false' label.
 107     //
 108     // 'true' label corresponds to jump target of the current basic block i.e. the target to
 109     // branch to on compare condition being true.  'false' label corresponds to the target to
 110     // branch to on condition being false.
 111     static void genJumpKindsForTree(GenTreePtr cmpTree, emitJumpKind jmpKind[2], bool jmpToTrueLabel[2]);
 112
 113     static bool genShouldRoundFP();
 114
 115     GenTreeIndir indirForm(var_types type, GenTree* base);
 116
 117     GenTreeIntCon intForm(var_types type, ssize_t value);
 118
 119     void genRangeCheck(GenTree* node);
 120
 121     void genLockedInstructions(GenTreeOp* node);
 122
 123     //-------------------------------------------------------------------------
 124     // Register-related methods
 125
 126     void rsInit();
 127
 128 #ifdef REG_OPT_RSVD
 129     // On some targets such as the ARM we may need to have an extra reserved register
 130     //  that is used when addressing stack based locals and stack based temps.
 131     //  This method returns the regNumber that should be used when an extra register
 132     //  is needed to access the stack based locals and stack based temps.
 133     //
 134     regNumber rsGetRsvdReg()
 135     {
 136         // We should have already added this register to the mask
 137         //  of reserved registers in regSet.rdMaskResvd
 138         noway_assert((regSet.rsMaskResvd & RBM_OPT_RSVD) != 0);
 139
 140         return REG_OPT_RSVD;
 141     }
 142 #endif // REG_OPT_RSVD
 143
 144     regNumber findStkLclInReg(unsigned lclNum)
 145     {
 146 #ifdef DEBUG
 147         genInterruptibleUsed = true;
 148 #endif
 149         return regTracker.rsLclIsInReg(lclNum);
 150     }
 151
 152     //-------------------------------------------------------------------------
 153
 154     bool     genUseBlockInit;  // true if we plan to block-initialize the local stack frame
 155     unsigned genInitStkLclCnt; // The count of local variables that we need to zero init
 156
 157     //  Keeps track of how many bytes we've pushed on the processor's stack.
 158     //
 159     unsigned genStackLevel;
 160
 161     void SubtractStackLevel(unsigned adjustment)
 162     {
 163         assert(genStackLevel >= adjustment);
 164         unsigned newStackLevel = genStackLevel - adjustment;
 165         if (genStackLevel != newStackLevel)
 166         {
 167             JITDUMP("Adjusting stack level from %d to %d\n", genStackLevel, newStackLevel);
 168         }
 169         genStackLevel = newStackLevel;
 170     }
 171
 172     void AddStackLevel(unsigned adjustment)
 173     {
 174         unsigned newStackLevel = genStackLevel + adjustment;
 175         if (genStackLevel != newStackLevel)
 176         {
 177             JITDUMP("Adjusting stack level from %d to %d\n", genStackLevel, newStackLevel);
 178         }
 179         genStackLevel = newStackLevel;
 180     }
 181
 182     void SetStackLevel(unsigned newStackLevel)
 183     {
 184         if (genStackLevel != newStackLevel)
 185         {
 186             JITDUMP("Setting stack level from %d to %d\n", genStackLevel, newStackLevel);
 187         }
 188         genStackLevel = newStackLevel;
 189     }
 190
 191 #if STACK_PROBES
 192     // Stack Probes
 193     bool genNeedPrologStackProbe;
 194
 195     void genGenerateStackProbe();
 196 #endif
 197
 198 #ifdef LEGACY_BACKEND
 199     regMaskTP genNewLiveRegMask(GenTreePtr first, GenTreePtr second);
 200
 201     // During codegen, determine the LiveSet after tree.
 202     // Preconditions: must be called during codegen, when compCurLife and
 203     // compCurLifeTree are being maintained, and tree must occur in the current
 204     // statement.
 205     VARSET_VALRET_TP genUpdateLiveSetForward(GenTreePtr tree);
 206 #endif
 207
 208     //-------------------------------------------------------------------------
 209
 210     void genReportEH();
 211
 212     // Allocates storage for the GC info, writes the GC info into that storage, records the address of the
 213     // GC info of the method with the EE, and returns a pointer to the "info" portion (just post-header) of
 214     // the GC info.  Requires "codeSize" to be the size of the generated code, "prologSize" and "epilogSize"
 215     // to be the sizes of the prolog and epilog, respectively.  In DEBUG, makes a check involving the
 216     // "codePtr", assumed to be a pointer to the start of the generated code.
 217     CLANG_FORMAT_COMMENT_ANCHOR;
 218
 219 #ifdef JIT32_GCENCODER
 220     void* genCreateAndStoreGCInfo(unsigned codeSize, unsigned prologSize, unsigned epilogSize DEBUGARG(void* codePtr));
 221     void* genCreateAndStoreGCInfoJIT32(unsigned codeSize,
 222                                        unsigned prologSize,
 223                                        unsigned epilogSize DEBUGARG(void* codePtr));
 224 #else  // !JIT32_GCENCODER
 225     void genCreateAndStoreGCInfo(unsigned codeSize, unsigned prologSize, unsigned epilogSize DEBUGARG(void* codePtr));
 226     void genCreateAndStoreGCInfoX64(unsigned codeSize, unsigned prologSize DEBUGARG(void* codePtr));
 227 #endif // !JIT32_GCENCODER
 228
 229     /**************************************************************************
 230      *                          PROTECTED
 231      *************************************************************************/
 232
 233 protected:
 234     // the current (pending) label ref, a label which has been referenced but not yet seen
 235     BasicBlock* genPendingCallLabel;
 236
 237 #ifdef DEBUG
 238     // Last instr we have displayed for dspInstrs
 239     unsigned genCurDispOffset;
 240
 241     static const char* genInsName(instruction ins);
 242 #endif // DEBUG
 243
 244     //-------------------------------------------------------------------------
 245
 246     // JIT-time constants for use in multi-dimensional array code generation.
 247     unsigned genOffsetOfMDArrayLowerBound(var_types elemType, unsigned rank, unsigned dimension);
 248     unsigned genOffsetOfMDArrayDimensionSize(var_types elemType, unsigned rank, unsigned dimension);
 249
 250 #ifdef DEBUG
 251     static const char* genSizeStr(emitAttr size);
 252
 253     void genStressRegs(GenTreePtr tree);
 254 #endif // DEBUG
 255
 256     void genCodeForBBlist();
 257
 258 public:
 259 #ifndef LEGACY_BACKEND
 260     // genSpillVar is called by compUpdateLifeVar in the !LEGACY_BACKEND case
 261     void genSpillVar(GenTreePtr tree);
 262 #endif // !LEGACY_BACKEND
 263
 264 protected:
 265 #ifndef LEGACY_BACKEND
 266     void genEmitHelperCall(unsigned helper, int argSize, emitAttr retSize, regNumber callTarget = REG_NA);
 267 #else
 268     void genEmitHelperCall(unsigned helper, int argSize, emitAttr retSize);
 269 #endif
 270
 271     void genGCWriteBarrier(GenTreePtr tree, GCInfo::WriteBarrierForm wbf);
 272
 273     BasicBlock* genCreateTempLabel();
 274
 275     void genDefineTempLabel(BasicBlock* label);
 276
 277     void genAdjustSP(ssize_t delta);
 278
 279     void genAdjustStackLevel(BasicBlock* block);
 280
 281     void genExitCode(BasicBlock* block);
 282
 283     //-------------------------------------------------------------------------
 284
 285     GenTreePtr genMakeConst(const void* cnsAddr, var_types cnsType, GenTreePtr cnsTree, bool dblAlign);
 286
 287     //-------------------------------------------------------------------------
 288
 289     void genJumpToThrowHlpBlk(emitJumpKind jumpKind, SpecialCodeKind codeKind, GenTreePtr failBlk = nullptr);
 290
 291     void genCheckOverflow(GenTreePtr tree);
 292
 293     //-------------------------------------------------------------------------
 294     //
 295     // Prolog/epilog generation
 296     //
 297     //-------------------------------------------------------------------------
 298
 299     //
 300     // Prolog functions and data (there are a few exceptions for more generally used things)
 301     //
 302
 303     void genEstablishFramePointer(int delta, bool reportUnwindData);
 304     void genFnPrologCalleeRegArgs(regNumber xtraReg, bool* pXtraRegClobbered, RegState* regState);
 305     void genEnregisterIncomingStackArgs();
 306     void genCheckUseBlockInit();
 307 #if defined(FEATURE_UNIX_AMD64_STRUCT_PASSING) && defined(FEATURE_SIMD)
 308     void genClearStackVec3ArgUpperBits();
 309 #endif // FEATURE_UNIX_AMD64_STRUCT_PASSING && FEATURE_SIMD
 310
 311 #if defined(_TARGET_ARM64_)
 312     bool genInstrWithConstant(instruction ins,
 313                               emitAttr    attr,
 314                               regNumber   reg1,
 315                               regNumber   reg2,
 316                               ssize_t     imm,
 317                               regNumber   tmpReg,
 318                               bool        inUnwindRegion = false);
 319
 320     void genStackPointerAdjustment(ssize_t spAdjustment, regNumber tmpReg, bool* pTmpRegIsZero);
 321
 322     void genPrologSaveRegPair(regNumber reg1,
 323                               regNumber reg2,
 324                               int       spOffset,
 325                               int       spDelta,
 326                               bool      lastSavedWasPreviousPair,
 327                               regNumber tmpReg,
 328                               bool*     pTmpRegIsZero);
 329
 330     void genPrologSaveReg(regNumber reg1, int spOffset, int spDelta, regNumber tmpReg, bool* pTmpRegIsZero);
 331
 332     void genEpilogRestoreRegPair(
 333         regNumber reg1, regNumber reg2, int spOffset, int spDelta, regNumber tmpReg, bool* pTmpRegIsZero);
 334
 335     void genEpilogRestoreReg(regNumber reg1, int spOffset, int spDelta, regNumber tmpReg, bool* pTmpRegIsZero);
 336
 337     void genSaveCalleeSavedRegistersHelp(regMaskTP regsToSaveMask, int lowestCalleeSavedOffset, int spDelta);
 338
 339     void genRestoreCalleeSavedRegistersHelp(regMaskTP regsToRestoreMask, int lowestCalleeSavedOffset, int spDelta);
 340
 341     void genPushCalleeSavedRegisters(regNumber initReg, bool* pInitRegZeroed);
 342 #else
 343     void genPushCalleeSavedRegisters();
 344 #endif
 345
 346     void genAllocLclFrame(unsigned frameSize, regNumber initReg, bool* pInitRegZeroed, regMaskTP maskArgRegsLiveIn);
 347
 348 #if defined(_TARGET_ARM_)
 349
 350     void genPushFltRegs(regMaskTP regMask);
 351     void genPopFltRegs(regMaskTP regMask);
 352     regMaskTP genStackAllocRegisterMask(unsigned frameSize, regMaskTP maskCalleeSavedFloat);
 353
 354     regMaskTP genJmpCallArgMask();
 355
 356     void genFreeLclFrame(unsigned           frameSize,
 357                          /* IN OUT */ bool* pUnwindStarted,
 358                          bool               jmpEpilog);
 359
 360     void genMov32RelocatableDisplacement(BasicBlock* block, regNumber reg);
 361     void genMov32RelocatableDataLabel(unsigned value, regNumber reg);
 362     void genMov32RelocatableImmediate(emitAttr size, unsigned value, regNumber reg);
 363
 364     bool genUsedPopToReturn; // True if we use the pop into PC to return,
 365                              // False if we didn't and must branch to LR to return.
 366
 367     // A set of information that is used by funclet prolog and epilog generation. It is collected once, before
 368     // funclet prologs and epilogs are generated, and used by all funclet prologs and epilogs, which must all be the
 369     // same.
 370     struct FuncletFrameInfoDsc
 371     {
 372         regMaskTP fiSaveRegs;                  // Set of registers saved in the funclet prolog (includes LR)
 373         unsigned  fiFunctionCallerSPtoFPdelta; // Delta between caller SP and the frame pointer
 374         unsigned  fiSpDelta;                   // Stack pointer delta
 375         unsigned  fiPSP_slot_SP_offset;        // PSP slot offset from SP
 376         int       fiPSP_slot_CallerSP_offset;  // PSP slot offset from Caller SP
 377     };
 378
 379     FuncletFrameInfoDsc genFuncletInfo;
 380
 381 #elif defined(_TARGET_ARM64_)
 382
 383     // A set of information that is used by funclet prolog and epilog generation. It is collected once, before
 384     // funclet prologs and epilogs are generated, and used by all funclet prologs and epilogs, which must all be the
 385     // same.
 386     struct FuncletFrameInfoDsc
 387     {
 388         regMaskTP fiSaveRegs;                // Set of callee-saved registers saved in the funclet prolog (includes LR)
 389         int fiFunction_CallerSP_to_FP_delta; // Delta between caller SP and the frame pointer in the parent function
 390                                              // (negative)
 391         int fiSP_to_FPLR_save_delta;         // FP/LR register save offset from SP (positive)
 392         int fiSP_to_PSP_slot_delta;          // PSP slot offset from SP (positive)
 393         int fiSP_to_CalleeSave_delta;        // First callee-saved register slot offset from SP (positive)
 394         int fiCallerSP_to_PSP_slot_delta;    // PSP slot offset from Caller SP (negative)
 395         int fiFrameType;                     // Funclet frame types are numbered. See genFuncletProlog() for details.
 396         int fiSpDelta1;                      // Stack pointer delta 1 (negative)
 397         int fiSpDelta2;                      // Stack pointer delta 2 (negative)
 398     };
 399
 400     FuncletFrameInfoDsc genFuncletInfo;
 401
 402 #elif defined(_TARGET_AMD64_)
 403
 404     // A set of information that is used by funclet prolog and epilog generation. It is collected once, before
 405     // funclet prologs and epilogs are generated, and used by all funclet prologs and epilogs, which must all be the
 406     // same.
 407     struct FuncletFrameInfoDsc
 408     {
 409         unsigned fiFunction_InitialSP_to_FP_delta; // Delta between Initial-SP and the frame pointer
 410         unsigned fiSpDelta;                        // Stack pointer delta
 411         int      fiPSP_slot_InitialSP_offset;      // PSP slot offset from Initial-SP
 412     };
 413
 414     FuncletFrameInfoDsc genFuncletInfo;
 415
 416 #endif // _TARGET_AMD64_
 417
 418 #if defined(_TARGET_XARCH_) && !FEATURE_STACK_FP_X87
 419
 420     // Save/Restore callee saved float regs to stack
 421     void genPreserveCalleeSavedFltRegs(unsigned lclFrameSize);
 422     void genRestoreCalleeSavedFltRegs(unsigned lclFrameSize);
 423     // Generate VZeroupper instruction to avoid AVX/SSE transition penalty
 424     void genVzeroupperIfNeeded(bool check256bitOnly = true);
 425
 426 #endif // _TARGET_XARCH_ && FEATURE_STACK_FP_X87
 427
 428 #if !FEATURE_STACK_FP_X87
 429     void genZeroInitFltRegs(const regMaskTP& initFltRegs, const regMaskTP& initDblRegs, const regNumber& initReg);
 430 #endif // !FEATURE_STACK_FP_X87
 431
 432     regNumber genGetZeroReg(regNumber initReg, bool* pInitRegZeroed);
 433
 434     void genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg, bool* pInitRegZeroed);
 435
 436     void genReportGenericContextArg(regNumber initReg, bool* pInitRegZeroed);
 437
 438     void genSetGSSecurityCookie(regNumber initReg, bool* pInitRegZeroed);
 439
 440     void genFinalizeFrame();
 441
 442 #ifdef PROFILING_SUPPORTED
 443     void genProfilingEnterCallback(regNumber initReg, bool* pInitRegZeroed);
 444     void genProfilingLeaveCallback(unsigned helper = CORINFO_HELP_PROF_FCN_LEAVE);
 445 #endif // PROFILING_SUPPORTED
 446
 447     void genPrologPadForReJit();
 448
 449     // clang-format off
 450     void genEmitCall(int                   callType,
 451                      CORINFO_METHOD_HANDLE methHnd,
 452                      INDEBUG_LDISASM_COMMA(CORINFO_SIG_INFO* sigInfo)
 453                      void*                 addr
 454                      X86_ARG(ssize_t argSize),
 455                      emitAttr              retSize
 456                      MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(emitAttr secondRetSize),
 457                      IL_OFFSETX            ilOffset,
 458                      regNumber             base   = REG_NA,
 459                      bool                  isJump = false,
 460                      bool                  isNoGC = false);
 461     // clang-format on
 462
 463     // clang-format off
 464     void genEmitCall(int                   callType,
 465                      CORINFO_METHOD_HANDLE methHnd,
 466                      INDEBUG_LDISASM_COMMA(CORINFO_SIG_INFO* sigInfo)
 467                      GenTreeIndir*         indir
 468                      X86_ARG(ssize_t argSize),
 469                      emitAttr              retSize
 470                      MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(emitAttr secondRetSize),
 471                      IL_OFFSETX            ilOffset);
 472     // clang-format on
 473
 474     //
 475     // Epilog functions
 476     //
 477     CLANG_FORMAT_COMMENT_ANCHOR;
 478
 479 #if defined(_TARGET_ARM_)
 480     bool genCanUsePopToReturn(regMaskTP maskPopRegsInt, bool jmpEpilog);
 481 #endif
 482
 483 #if defined(_TARGET_ARM64_)
 484
 485     void genPopCalleeSavedRegistersAndFreeLclFrame(bool jmpEpilog);
 486
 487 #else // !defined(_TARGET_ARM64_)
 488
 489     void genPopCalleeSavedRegisters(bool jmpEpilog = false);
 490
 491 #endif // !defined(_TARGET_ARM64_)
 492
 493     //
 494     // Common or driving functions
 495     //
 496
 497     void genReserveProlog(BasicBlock* block); // currently unused
 498     void genReserveEpilog(BasicBlock* block);
 499     void genFnProlog();
 500     void genFnEpilog(BasicBlock* block);
 501
 502 #if FEATURE_EH_FUNCLETS
 503
 504     void genReserveFuncletProlog(BasicBlock* block);
 505     void genReserveFuncletEpilog(BasicBlock* block);
 506     void genFuncletProlog(BasicBlock* block);
 507     void genFuncletEpilog();
 508     void genCaptureFuncletPrologEpilogInfo();
 509
 510     void genSetPSPSym(regNumber initReg, bool* pInitRegZeroed);
 511
 512     void genUpdateCurrentFunclet(BasicBlock* block);
 513 #if defined(_TARGET_ARM_)
 514     void genInsertNopForUnwinder(BasicBlock* block);
 515 #endif
 516
 517 #else // FEATURE_EH_FUNCLETS
 518
 519     // This is a no-op when there are no funclets!
 520     void genUpdateCurrentFunclet(BasicBlock* block)
 521     {
 522         return;
 523     }
 524
 525 #if defined(_TARGET_ARM_)
 526     void genInsertNopForUnwinder(BasicBlock* block)
 527     {
 528         return;
 529     }
 530 #endif
 531
 532 #endif // FEATURE_EH_FUNCLETS
 533
 534     void genGeneratePrologsAndEpilogs();
 535
 536 #if defined(DEBUG) && defined(_TARGET_ARM64_)
 537     void genArm64EmitterUnitTests();
 538 #endif
 539
 540 #if defined(DEBUG) && defined(LATE_DISASM) && defined(_TARGET_AMD64_)
 541     void genAmd64EmitterUnitTests();
 542 #endif
 543
 544     //-------------------------------------------------------------------------
 545     //
 546     // End prolog/epilog generation
 547     //
 548     //-------------------------------------------------------------------------
 549
 550     void      genSinglePush();
 551     void      genSinglePop();
 552     regMaskTP genPushRegs(regMaskTP regs, regMaskTP* byrefRegs, regMaskTP* noRefRegs);
 553     void genPopRegs(regMaskTP regs, regMaskTP byrefRegs, regMaskTP noRefRegs);
 554
 555 /*
 556 XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 557 XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 558 XX                                                                           XX
 559 XX                           Debugging Support                               XX
 560 XX                                                                           XX
 561 XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 562 XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 563 */
 564
 565 #ifdef DEBUG
 566     void genIPmappingDisp(unsigned mappingNum, Compiler::IPmappingDsc* ipMapping);
 567     void genIPmappingListDisp();
 568 #endif // DEBUG
 569
 570     void genIPmappingAdd(IL_OFFSETX offset, bool isLabel);
 571     void genIPmappingAddToFront(IL_OFFSETX offset);
 572     void genIPmappingGen();
 573
 574     void genEnsureCodeEmitted(IL_OFFSETX offsx);
 575
 576     //-------------------------------------------------------------------------
 577     // scope info for the variables
 578
 579     void genSetScopeInfo(unsigned            which,
 580                          UNATIVE_OFFSET      startOffs,
 581                          UNATIVE_OFFSET      length,
 582                          unsigned            varNum,
 583                          unsigned            LVnum,
 584                          bool                avail,
 585                          Compiler::siVarLoc& loc);
 586
 587     void genSetScopeInfo();
 588
 589     void genRemoveBBsection(BasicBlock* head, BasicBlock* tail);
 590
 591 protected:
 592     /*
 593     XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 594     XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 595     XX                                                                           XX
 596     XX                           ScopeInfo                                       XX
 597     XX                                                                           XX
 598     XX  Keeps track of the scopes during code-generation.                        XX
 599     XX  This is used to translate the local-variable debugging information       XX
 600     XX  from IL offsets to native code offsets.                                  XX
 601     XX                                                                           XX
 602     XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 603     XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 604     */
 605
 606     /*****************************************************************************/
 607     /*****************************************************************************
 608      *                              ScopeInfo
 609      *
 610      * This class is called during code gen at block-boundaries, and when the
 611      * set of live variables changes. It keeps track of the scope of the variables
 612      * in terms of the native code PC.
 613      */
 614
 615 public:
 616     void siInit();
 617
 618     void siBeginBlock(BasicBlock* block);
 619
 620     void siEndBlock(BasicBlock* block);
 621
 622     virtual void siUpdate();
 623
 624     void siCheckVarScope(unsigned varNum, IL_OFFSET offs);
 625
 626     void siCloseAllOpenScopes();
 627
 628 #ifdef DEBUG
 629     void siDispOpenScopes();
 630 #endif
 631
 632     /**************************************************************************
 633      *                          PROTECTED
 634      *************************************************************************/
 635
 636 protected:
 637     struct siScope
 638     {
 639         emitLocation scStartLoc; // emitter location of start of scope
 640         emitLocation scEndLoc;   // emitter location of end of scope
 641
 642         unsigned scVarNum; // index into lvaTable
 643         unsigned scLVnum;  // 'which' in eeGetLVinfo()
 644
 645         unsigned scStackLevel; // Only for stk-vars
 646         bool scAvailable : 1;  // It has a home / Home recycled - TODO-Cleanup: it appears this is unused (always true)
 647
 648         siScope* scPrev;
 649         siScope* scNext;
 650     };
 651
 652     siScope siOpenScopeList, siScopeList, *siOpenScopeLast, *siScopeLast;
 653
 654     unsigned siScopeCnt;
 655
 656     VARSET_TP siLastLife; // Life at last call to siUpdate()
 657
 658     // Tracks the last entry for each tracked register variable
 659
 660     siScope* siLatestTrackedScopes[lclMAX_TRACKED];
 661
 662     IL_OFFSET siLastEndOffs; // IL offset of the (exclusive) end of the last block processed
 663
 664 #if FEATURE_EH_FUNCLETS
 665     bool siInFuncletRegion; // Have we seen the start of the funclet region?
 666 #endif                      // FEATURE_EH_FUNCLETS
 667
 668     // Functions
 669
 670     siScope* siNewScope(unsigned LVnum, unsigned varNum);
 671
 672     void siRemoveFromOpenScopeList(siScope* scope);
 673
 674     void siEndTrackedScope(unsigned varIndex);
 675
 676     void siEndScope(unsigned varNum);
 677
 678     void siEndScope(siScope* scope);
 679
 680 #ifdef DEBUG
 681     bool siVerifyLocalVarTab();
 682 #endif
 683
 684 #ifdef LATE_DISASM
 685 public:
 686     /* virtual */
 687     const char* siRegVarName(size_t offs, size_t size, unsigned reg);
 688
 689     /* virtual */
 690     const char* siStackVarName(size_t offs, size_t size, unsigned reg, unsigned stkOffs);
 691 #endif // LATE_DISASM
 692
 693 public:
 694     /*
 695     XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 696     XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 697     XX                                                                           XX
 698     XX                          PrologScopeInfo                                  XX
 699     XX                                                                           XX
 700     XX We need special handling in the prolog block, as the parameter variables  XX
 701     XX may not be in the same position described by genLclVarTable - they all    XX
 702     XX start out on the stack                                                    XX
 703     XX                                                                           XX
 704     XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 705     XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 706     */
 707
 708 public:
 709     void psiBegProlog();
 710
 711     void psiAdjustStackLevel(unsigned size);
 712
 713     void psiMoveESPtoEBP();
 714
 715     void psiMoveToReg(unsigned varNum, regNumber reg = REG_NA, regNumber otherReg = REG_NA);
 716
 717     void psiMoveToStack(unsigned varNum);
 718
 719     void psiEndProlog();
 720
 721     /**************************************************************************
 722      *                          PROTECTED
 723      *************************************************************************/
 724
 725 protected:
 726     struct psiScope
 727     {
 728         emitLocation scStartLoc; // emitter location of start of scope
 729         emitLocation scEndLoc;   // emitter location of end of scope
 730
 731         unsigned scSlotNum; // index into lclVarTab
 732         unsigned scLVnum;   // 'which' in eeGetLVinfo()
 733
 734         bool scRegister;
 735
 736         union {
 737             struct
 738             {
 739                 regNumberSmall scRegNum;
 740
 741                 // Used for:
 742                 //  - "other half" of long var on architectures with 32 bit size registers - x86.
 743                 //  - for System V structs it stores the second register
 744                 //    used to pass a register passed struct.
 745                 regNumberSmall scOtherReg;
 746             } u1;
 747
 748             struct
 749             {
 750                 regNumberSmall scBaseReg;
 751                 NATIVE_OFFSET  scOffset;
 752             } u2;
 753         };
 754
 755         psiScope* scPrev;
 756         psiScope* scNext;
 757     };
 758
 759     psiScope psiOpenScopeList, psiScopeList, *psiOpenScopeLast, *psiScopeLast;
 760
 761     unsigned psiScopeCnt;
 762
 763     // Implementation Functions
 764
 765     psiScope* psiNewPrologScope(unsigned LVnum, unsigned slotNum);
 766
 767     void psiEndPrologScope(psiScope* scope);
 768
 769     void psSetScopeOffset(psiScope* newScope, LclVarDsc* lclVarDsc1);
 770
 771 /*****************************************************************************
 772  *                        TrnslLocalVarInfo
 773  *
 774  * This struct holds the LocalVarInfo in terms of the generated native code
 775  * after a call to genSetScopeInfo()
 776  */
 777
 778 #ifdef DEBUG
 779
 780     struct TrnslLocalVarInfo
 781     {
 782         unsigned           tlviVarNum;
 783         unsigned           tlviLVnum;
 784         VarName            tlviName;
 785         UNATIVE_OFFSET     tlviStartPC;
 786         size_t             tlviLength;
 787         bool               tlviAvailable;
 788         Compiler::siVarLoc tlviVarLoc;
 789     };
 790
 791     // Array of scopes of LocalVars in terms of native code
 792
 793     TrnslLocalVarInfo* genTrnslLocalVarInfo;
 794     unsigned           genTrnslLocalVarCount;
 795 #endif
 796
 797 #ifndef LEGACY_BACKEND
 798 #include "codegenlinear.h"
 799 #else // LEGACY_BACKEND
 800 #include "codegenclassic.h"
 801 #endif // LEGACY_BACKEND
 802
 803     /*
 804     XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 805     XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 806     XX                                                                           XX
 807     XX                           Instruction                                     XX
 808     XX                                                                           XX
 809     XX  The interface to generate a machine-instruction.                         XX
 810     XX  Currently specific to x86                                                XX
 811     XX  TODO-Cleanup: Consider factoring this out of CodeGen                     XX
 812     XX                                                                           XX
 813     XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 814     XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 815     */
 816
 817 public:
 818     void instInit();
 819
 820     regNumber genGetZeroRegister();
 821
 822     void instGen(instruction ins);
 823 #ifdef _TARGET_XARCH_
 824     void instNop(unsigned size);
 825 #endif
 826
 827     void inst_JMP(emitJumpKind jmp, BasicBlock* tgtBlock);
 828
 829     void inst_SET(emitJumpKind condition, regNumber reg);
 830
 831     void inst_RV(instruction ins, regNumber reg, var_types type, emitAttr size = EA_UNKNOWN);
 832
 833     void inst_RV_RV(instruction ins,
 834                     regNumber   reg1,
 835                     regNumber   reg2,
 836                     var_types   type  = TYP_I_IMPL,
 837                     emitAttr    size  = EA_UNKNOWN,
 838                     insFlags    flags = INS_FLAGS_DONT_CARE);
 839
 840     void inst_RV_RV_RV(instruction ins,
 841                        regNumber   reg1,
 842                        regNumber   reg2,
 843                        regNumber   reg3,
 844                        emitAttr    size,
 845                        insFlags    flags = INS_FLAGS_DONT_CARE);
 846
 847     void inst_IV(instruction ins, int val);
 848     void inst_IV_handle(instruction ins, int val);
 849     void inst_FS(instruction ins, unsigned stk = 0);
 850
 851     void inst_RV_IV(instruction ins, regNumber reg, ssize_t val, emitAttr size, insFlags flags = INS_FLAGS_DONT_CARE);
 852
 853     void inst_ST_RV(instruction ins, TempDsc* tmp, unsigned ofs, regNumber reg, var_types type);
 854     void inst_ST_IV(instruction ins, TempDsc* tmp, unsigned ofs, int val, var_types type);
 855
 856     void inst_SA_RV(instruction ins, unsigned ofs, regNumber reg, var_types type);
 857     void inst_SA_IV(instruction ins, unsigned ofs, int val, var_types type);
 858
 859     void inst_RV_ST(
 860         instruction ins, regNumber reg, TempDsc* tmp, unsigned ofs, var_types type, emitAttr size = EA_UNKNOWN);
 861     void inst_FS_ST(instruction ins, emitAttr size, TempDsc* tmp, unsigned ofs);
 862
 863     void instEmit_indCall(GenTreeCall* call,
 864                           size_t       argSize,
 865                           emitAttr retSize MULTIREG_HAS_SECOND_GC_RET_ONLY_ARG(emitAttr secondRetSize));
 866
 867     void instEmit_RM(instruction ins, GenTreePtr tree, GenTreePtr addr, unsigned offs);
 868
 869     void instEmit_RM_RV(instruction ins, emitAttr size, GenTreePtr tree, regNumber reg, unsigned offs);
 870
 871     void instEmit_RV_RM(instruction ins, emitAttr size, regNumber reg, GenTreePtr tree, unsigned offs);
 872
 873     void instEmit_RV_RIA(instruction ins, regNumber reg1, regNumber reg2, unsigned offs);
 874
 875     void inst_TT(instruction ins, GenTreePtr tree, unsigned offs = 0, int shfv = 0, emitAttr size = EA_UNKNOWN);
 876
 877     void inst_TT_RV(instruction ins,
 878                     GenTreePtr  tree,
 879                     regNumber   reg,
 880                     unsigned    offs  = 0,
 881                     emitAttr    size  = EA_UNKNOWN,
 882                     insFlags    flags = INS_FLAGS_DONT_CARE);
 883
 884     void inst_TT_IV(instruction ins,
 885                     GenTreePtr  tree,
 886                     ssize_t     val,
 887                     unsigned    offs  = 0,
 888                     emitAttr    size  = EA_UNKNOWN,
 889                     insFlags    flags = INS_FLAGS_DONT_CARE);
 890
 891     void inst_RV_AT(instruction ins,
 892                     emitAttr    size,
 893                     var_types   type,
 894                     regNumber   reg,
 895                     GenTreePtr  tree,
 896                     unsigned    offs  = 0,
 897                     insFlags    flags = INS_FLAGS_DONT_CARE);
 898
 899     void inst_AT_IV(instruction ins, emitAttr size, GenTreePtr baseTree, int icon, unsigned offs = 0);
 900
 901     void inst_RV_TT(instruction ins,
 902                     regNumber   reg,
 903                     GenTreePtr  tree,
 904                     unsigned    offs  = 0,
 905                     emitAttr    size  = EA_UNKNOWN,
 906                     insFlags    flags = INS_FLAGS_DONT_CARE);
 907
 908     void inst_RV_TT_IV(instruction ins, regNumber reg, GenTreePtr tree, int val);
 909
 910     void inst_FS_TT(instruction ins, GenTreePtr tree);
 911
 912     void inst_RV_SH(instruction ins, emitAttr size, regNumber reg, unsigned val, insFlags flags = INS_FLAGS_DONT_CARE);
 913
 914     void inst_TT_SH(instruction ins, GenTreePtr tree, unsigned val, unsigned offs = 0);
 915
 916     void inst_RV_CL(instruction ins, regNumber reg, var_types type = TYP_I_IMPL);
 917
 918     void inst_TT_CL(instruction ins, GenTreePtr tree, unsigned offs = 0);
 919
 920 #if defined(_TARGET_XARCH_)
 921     void inst_RV_RV_IV(instruction ins, emitAttr size, regNumber reg1, regNumber reg2, unsigned ival);
 922 #endif
 923
 924     void inst_RV_RR(instruction ins, emitAttr size, regNumber reg1, regNumber reg2);
 925
 926     void inst_RV_ST(instruction ins, emitAttr size, regNumber reg, GenTreePtr tree);
 927
 928     void inst_mov_RV_ST(regNumber reg, GenTreePtr tree);
 929
 930     void instGetAddrMode(GenTreePtr addr, regNumber* baseReg, unsigned* indScale, regNumber* indReg, unsigned* cns);
 931
 932     void inst_set_SV_var(GenTreePtr tree);
 933
 934 #ifdef _TARGET_ARM_
 935     bool arm_Valid_Imm_For_Instr(instruction ins, ssize_t imm, insFlags flags);
 936     bool arm_Valid_Disp_For_LdSt(ssize_t disp, var_types type);
 937     bool arm_Valid_Imm_For_Alu(ssize_t imm);
 938     bool arm_Valid_Imm_For_Mov(ssize_t imm);
 939     bool arm_Valid_Imm_For_Small_Mov(regNumber reg, ssize_t imm, insFlags flags);
 940     bool arm_Valid_Imm_For_Add(ssize_t imm, insFlags flag);
 941     bool arm_Valid_Imm_For_Add_SP(ssize_t imm);
 942     bool arm_Valid_Imm_For_BL(ssize_t addr);
 943
 944     bool ins_Writes_Dest(instruction ins);
 945 #endif
 946
 947     bool isMoveIns(instruction ins);
 948     instruction ins_Move_Extend(var_types srcType, bool srcInReg);
 949
 950     instruction ins_Copy(var_types dstType);
 951     instruction ins_CopyIntToFloat(var_types srcType, var_types dstTyp);
 952     instruction ins_CopyFloatToInt(var_types srcType, var_types dstTyp);
 953     static instruction ins_FloatStore(var_types type = TYP_DOUBLE);
 954     static instruction ins_FloatCopy(var_types type = TYP_DOUBLE);
 955     instruction ins_FloatConv(var_types to, var_types from);
 956     instruction ins_FloatCompare(var_types type);
 957     instruction ins_MathOp(genTreeOps oper, var_types type);
 958     instruction ins_FloatSqrt(var_types type);
 959
 960     void instGen_Return(unsigned stkArgSize);
 961
 962 #ifdef _TARGET_ARM64_
 963     void instGen_MemoryBarrier(insBarrier barrierType = INS_BARRIER_ISH);
 964 #else
 965     void instGen_MemoryBarrier();
 966 #endif
 967
 968     void instGen_Set_Reg_To_Zero(emitAttr size, regNumber reg, insFlags flags = INS_FLAGS_DONT_CARE);
 969
 970     void instGen_Set_Reg_To_Imm(emitAttr size, regNumber reg, ssize_t imm, insFlags flags = INS_FLAGS_DONT_CARE);
 971
 972     void instGen_Compare_Reg_To_Zero(emitAttr size, regNumber reg);
 973
 974     void instGen_Compare_Reg_To_Reg(emitAttr size, regNumber reg1, regNumber reg2);
 975
 976     void instGen_Compare_Reg_To_Imm(emitAttr size, regNumber reg, ssize_t imm);
 977
 978     void instGen_Load_Reg_From_Lcl(var_types srcType, regNumber dstReg, int varNum, int offs);
 979
 980     void instGen_Store_Reg_Into_Lcl(var_types dstType, regNumber srcReg, int varNum, int offs);
 981
 982     void instGen_Store_Imm_Into_Lcl(
 983         var_types dstType, emitAttr sizeAttr, ssize_t imm, int varNum, int offs, regNumber regToUse = REG_NA);
 984
 985 #ifdef DEBUG
 986     void __cdecl instDisp(instruction ins, bool noNL, const char* fmt, ...);
 987 #endif
 988
 989 #ifdef _TARGET_XARCH_
 990     instruction genMapShiftInsToShiftByConstantIns(instruction ins, int shiftByValue);
 991 #endif // _TARGET_XARCH_
 992 };
 993
 994 /*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 995 XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 996 XX                                                                           XX
 997 XX                       Instruction                                         XX
 998 XX                      Inline functions                                     XX
 999 XX                                                                           XX
1000 XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
1001 XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
1002 */
1003
1004 #ifdef _TARGET_XARCH_
1005 /*****************************************************************************
1006  *
1007  *  Generate a floating-point instruction that has one operand given by
1008  *  a tree (which has been made addressable).
1009  */
1010
1011 inline void CodeGen::inst_FS_TT(instruction ins, GenTreePtr tree)
1012 {
1013     assert(instIsFP(ins));
1014
1015     assert(varTypeIsFloating(tree->gtType));
1016
1017     inst_TT(ins, tree, 0);
1018 }
1019 #endif
1020
1021 /*****************************************************************************
1022  *
1023  *  Generate a "shift reg, cl" instruction.
1024  */
1025
1026 inline void CodeGen::inst_RV_CL(instruction ins, regNumber reg, var_types type)
1027 {
1028     inst_RV(ins, reg, type);
1029 }
1030
1031 #endif // _CODEGEN_H_