2 * Author: Brendan Le Foll <brendan.le.foll@intel.com>
3 * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
4 * Copyright (c) 2014 Intel Corporation.
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice shall be
15 * included in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 #include "intel_galileo_rev_g.h"
33 maa_intel_galileo_gen2()
35 maa_board_t* b = (maa_board_t*) malloc(sizeof(maa_board_t));
39 b->phy_pin_count = 20;
43 b->pins = (maa_pininfo_t*) malloc(sizeof(maa_pininfo_t)*MAA_INTEL_GALILEO_GEN_2_PINCOUNT);
45 strncpy(b->pins[0].name, "IO0", 8);
46 b->pins[0].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
47 b->pins[0].gpio.pinmap = 11;
48 b->pins[0].gpio.parent_id = 0;
49 b->pins[0].gpio.mux_total = 0;
50 b->pins[0].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
51 b->pins[0].gpio.output_enable = 32;
52 b->pins[0].gpio.pullup_enable = 33;
54 strncpy(b->pins[1].name, "IO1", 8);
55 b->pins[1].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
56 b->pins[1].gpio.pinmap = 12;
57 b->pins[1].gpio.parent_id = 0;
58 b->pins[1].gpio.mux_total = 1;
59 b->pins[1].gpio.mux[0].pin = 45;
60 b->pins[1].gpio.mux[0].value = 0;
61 b->pins[1].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
62 b->pins[1].gpio.output_enable = 28;
63 b->pins[1].gpio.pullup_enable = 29;
65 strncpy(b->pins[2].name, "IO2", 8);
66 b->pins[2].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
67 b->pins[2].gpio.pinmap = 13;
68 b->pins[2].gpio.parent_id = 0;
69 b->pins[2].gpio.mux_total = 1;
70 b->pins[2].gpio.mux[0].pin = 77;
71 b->pins[2].gpio.mux[0].value = 0;
72 b->pins[2].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
73 b->pins[2].gpio.output_enable = 34;
74 b->pins[2].gpio.pullup_enable = 35;
76 strncpy(b->pins[3].name, "IO3", 8);
77 b->pins[3].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
78 b->pins[3].gpio.pinmap = 14;
79 b->pins[3].gpio.parent_id = 0;
80 b->pins[3].gpio.mux_total = 2;
81 b->pins[3].gpio.mux[0].pin = 76;
82 b->pins[3].gpio.mux[0].value = 0;
83 b->pins[3].gpio.mux[1].pin = 64;
84 b->pins[3].gpio.mux[1].value = 0;
85 b->pins[3].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
86 b->pins[3].gpio.output_enable = 16;
87 b->pins[3].gpio.pullup_enable = 17;
88 b->pins[3].pwm.pinmap = 1;
89 b->pins[3].pwm.parent_id = 0;
90 b->pins[3].pwm.mux_total = 3;
91 b->pins[3].pwm.mux[0].pin = 76;
92 b->pins[3].pwm.mux[0].value = 0;
93 b->pins[3].pwm.mux[1].pin = 64;
94 b->pins[3].pwm.mux[1].value = 1;
95 b->pins[3].pwm.mux[2].pin = 16;
96 b->pins[3].pwm.mux[2].value = 0;
99 strncpy(b->pins[4].name, "IO4", 8);
100 b->pins[4].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
101 b->pins[4].gpio.pinmap = 6;
102 b->pins[4].gpio.parent_id = 0;
103 b->pins[4].gpio.mux_total = 0;
104 b->pins[4].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
105 b->pins[4].gpio.output_enable = 36;
106 b->pins[4].gpio.pullup_enable = 37;
108 strncpy(b->pins[5].name, "IO5", 8);
109 b->pins[5].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
110 b->pins[5].gpio.pinmap = 0;
111 b->pins[5].gpio.parent_id = 0;
112 b->pins[5].gpio.mux_total = 1;
113 b->pins[5].gpio.mux[0].pin = 66;
114 b->pins[5].gpio.mux[0].value = 0;
115 b->pins[5].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
116 b->pins[5].gpio.output_enable = 18;
117 b->pins[5].gpio.pullup_enable = 19;
118 b->pins[5].pwm.pinmap = 4;
119 b->pins[5].pwm.parent_id = 0;
120 b->pins[5].pwm.mux_total = 2;
121 b->pins[5].pwm.mux[0].pin = 66;
122 b->pins[5].pwm.mux[0].value = 1;
123 b->pins[5].pwm.mux[1].pin = 18;
124 b->pins[5].pwm.mux[1].value = 0;
126 strncpy(b->pins[6].name, "IO6", 8);
127 b->pins[6].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
128 b->pins[6].gpio.pinmap = 1;
129 b->pins[6].gpio.parent_id = 0;
130 b->pins[6].gpio.mux_total = 1;
131 b->pins[6].gpio.mux[0].pin = 68;
132 b->pins[6].gpio.mux[0].value = 0;
133 b->pins[6].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
134 b->pins[6].gpio.output_enable = 20;
135 b->pins[6].gpio.pullup_enable = 21;
136 b->pins[6].pwm.pinmap = 5;
137 b->pins[6].pwm.parent_id = 0;
138 b->pins[6].pwm.mux_total = 2;
139 b->pins[6].pwm.mux[0].pin = 68;
140 b->pins[6].pwm.mux[0].value = 1;
141 b->pins[6].pwm.mux[1].pin = 20;
142 b->pins[6].pwm.mux[1].value = 0;
144 strncpy(b->pins[7].name, "IO7", 8);
145 b->pins[7].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
146 b->pins[7].gpio.pinmap = 38;
147 b->pins[7].gpio.parent_id = 0;
148 b->pins[7].gpio.mux_total = 0;
149 b->pins[7].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
150 b->pins[7].gpio.pullup_enable = 39;
152 strncpy(b->pins[8].name, "IO8", 8);
153 b->pins[8].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
154 b->pins[8].gpio.pinmap = 40;
155 b->pins[8].gpio.parent_id = 0;
156 b->pins[8].gpio.mux_total = 0;
157 b->pins[8].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
158 b->pins[8].gpio.pullup_enable = 41;
160 strncpy(b->pins[9].name, "IO9", 8);
161 b->pins[9].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
162 b->pins[9].gpio.pinmap = 4;
163 b->pins[9].gpio.parent_id = 0;
164 b->pins[9].gpio.mux_total = 1;
165 b->pins[9].gpio.mux[0].pin = 70;
166 b->pins[9].gpio.mux[0].value = 0;
167 b->pins[9].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
168 b->pins[9].gpio.output_enable = 22;
169 b->pins[9].gpio.pullup_enable = 23;
170 b->pins[9].pwm.pinmap = 7;
171 b->pins[9].pwm.parent_id = 0;
172 b->pins[9].pwm.mux_total = 2;
173 b->pins[9].pwm.mux[0].pin = 70;
174 b->pins[9].pwm.mux[0].value = 1;
175 b->pins[9].pwm.mux[1].pin = 22;
176 b->pins[9].pwm.mux[1].value = 0;
178 strncpy(b->pins[10].name, "IO10", 8);
179 b->pins[10].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
180 b->pins[10].gpio.pinmap = 10;
181 b->pins[10].gpio.parent_id = 0;
182 b->pins[10].gpio.mux_total = 1;
183 b->pins[10].gpio.mux[0].pin = 74;
184 b->pins[10].gpio.mux[0].value = 0;
185 b->pins[10].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
186 b->pins[10].gpio.output_enable = 26;
187 b->pins[10].gpio.pullup_enable = 27;
188 b->pins[10].pwm.pinmap = 11;
189 b->pins[10].pwm.parent_id = 0;
190 b->pins[10].pwm.mux_total = 2;
191 b->pins[10].pwm.mux[0].pin = 74;
192 b->pins[10].pwm.mux[0].value = 1;
193 b->pins[10].pwm.mux[1].pin = 26;
194 b->pins[10].pwm.mux[1].value = 0;
196 strncpy(b->pins[11].name, "IO11", 8);
197 b->pins[11].capabilites = (maa_pincapabilities_t) {1,1,1,0,1,0,0};
198 b->pins[11].gpio.pinmap = 5;
199 b->pins[11].gpio.parent_id = 0;
200 b->pins[11].gpio.mux_total = 2;
201 b->pins[11].gpio.mux[0].pin = 72;
202 b->pins[11].gpio.mux[0].value = 0;
203 b->pins[11].gpio.mux[1].pin = 44;
204 b->pins[11].gpio.mux[1].value = 0;
205 b->pins[11].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
206 b->pins[11].gpio.output_enable = 24;
207 b->pins[11].gpio.pullup_enable = 25;
208 b->pins[11].pwm.pinmap = 9;
209 b->pins[11].pwm.parent_id = 0;
210 b->pins[11].pwm.mux_total = 3;
211 b->pins[11].pwm.mux[0].pin = 72;
212 b->pins[11].pwm.mux[0].value = 1;
213 b->pins[11].pwm.mux[1].pin = 44;
214 b->pins[11].pwm.mux[1].value = 0;
215 b->pins[11].pwm.mux[2].pin = 24;
216 b->pins[11].pwm.mux[2].value = 0;
217 b->pins[11].spi.pinmap = 1;
218 b->pins[11].spi.mux_total = 3;
219 b->pins[11].spi.mux[0].pin = 72;
220 b->pins[11].spi.mux[0].value = 0;
221 b->pins[11].spi.mux[1].pin = 44;
222 b->pins[11].spi.mux[2].value = 1;
223 b->pins[11].pwm.mux[2].pin = 24;
224 b->pins[11].pwm.mux[2].value = 0;
226 strncpy(b->pins[12].name, "IO12", 8);
227 b->pins[12].capabilites = (maa_pincapabilities_t) {1,1,0,0,1,0,0};
228 b->pins[12].gpio.pinmap = 15;
229 b->pins[12].gpio.parent_id = 0;
230 b->pins[12].gpio.mux_total = 0;
231 b->pins[12].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
232 b->pins[12].gpio.output_enable = 42;
233 b->pins[12].gpio.pullup_enable = 43;
234 b->pins[12].spi.pinmap = 1;
235 b->pins[12].spi.mux_total = 1;
236 b->pins[12].spi.mux[0].pin = 42;
237 b->pins[12].spi.mux[0].value = 0;
238 // THIS NEEDS TESTING UNSURE IF MOSI WILL BE EXPOSED.
240 strncpy(b->pins[13].name, "IO13", 8);
241 b->pins[13].capabilites = (maa_pincapabilities_t) {1,1,0,0,1,0,0};
242 b->pins[13].gpio.pinmap = 7;
243 b->pins[13].gpio.parent_id = 0;
244 b->pins[13].gpio.mux_total = 1;
245 b->pins[13].gpio.mux[0].pin = 46;
246 b->pins[13].gpio.mux[0].value = 0;
247 b->pins[13].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
248 b->pins[13].gpio.output_enable = 30;
249 b->pins[13].gpio.pullup_enable = 31;
250 b->pins[13].spi.pinmap = 1;
251 b->pins[13].spi.mux_total = 2;
252 b->pins[13].spi.mux[0].pin = 46;
253 b->pins[13].spi.mux[0].value = 1;
254 b->pins[13].spi.mux[1].pin = 30;
255 b->pins[13].spi.mux[1].value = 0;
258 strncpy(b->pins[14].name, "A0", 8);
259 b->pins[14].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1};
260 b->pins[14].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
261 b->pins[14].gpio.pullup_enable = 49;
262 b->pins[14].aio.pinmap = 0;
263 b->pins[14].aio.mux_total = 0;
265 strncpy(b->pins[15].name, "A1", 8);
266 b->pins[15].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1};
267 b->pins[15].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
268 b->pins[15].gpio.pullup_enable = 51;
269 b->pins[15].aio.pinmap = 1;
270 b->pins[15].aio.mux_total = 0;
272 strncpy(b->pins[16].name, "A2", 8);
273 b->pins[16].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1};
274 b->pins[16].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
275 b->pins[16].gpio.pullup_enable = 53;
276 b->pins[16].aio.pinmap = 2;
277 b->pins[16].aio.mux_total = 0;
279 strncpy(b->pins[17].name, "A3", 8);
280 b->pins[17].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1};
281 b->pins[17].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
282 b->pins[17].gpio.pullup_enable = 55;
283 b->pins[17].aio.pinmap = 3;
284 b->pins[17].aio.mux_total = 0;
286 strncpy(b->pins[18].name, "A4", 8);
287 b->pins[18].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,1,1};
288 b->pins[18].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
289 b->pins[18].gpio.pullup_enable = 57;
290 b->pins[18].i2c.pinmap = 1;
291 b->pins[18].i2c.mux_total = 1;
292 b->pins[18].i2c.mux[0].pin = 60;
293 b->pins[18].i2c.mux[0].value = 0;
294 b->pins[18].aio.pinmap = 4;
295 b->pins[18].aio.mux_total = 2;
296 b->pins[18].aio.mux[0].pin = 60;
297 b->pins[18].aio.mux[0].value = 1;
298 b->pins[18].aio.mux[1].pin = 78;
299 b->pins[18].aio.mux[1].value = 0;
301 strncpy(b->pins[19].name, "A5", 8);
302 b->pins[19].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,1,1};
303 b->pins[19].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
304 b->pins[19].gpio.pullup_enable = 59;
305 b->pins[19].i2c.pinmap = 1;
306 b->pins[19].i2c.mux_total = 1;
307 b->pins[19].i2c.mux[0].pin = 60;
308 b->pins[19].i2c.mux[0].value = 0;
309 b->pins[19].aio.pinmap = 5;
310 b->pins[19].aio.mux_total = 2;
311 b->pins[19].aio.mux[0].pin = 60;
312 b->pins[19].aio.mux[0].value = 1;
313 b->pins[19].aio.mux[1].pin = 79;
314 b->pins[19].aio.mux[1].value = 0;
317 b->i2c_bus_count = 1;
319 b->i2c_bus[0].bus_id = 0;
320 b->i2c_bus[0].sda = 18;
321 b->i2c_bus[0].scl = 19;
323 b->spi_bus_count = 1;
325 b->spi_bus[0].bus_id = 1;
326 b->spi_bus[0].slave_s = 0;
327 b->spi_bus[0].cs = 10;
328 b->spi_bus[0].mosi = 11;
329 b->spi_bus[0].miso = 12;
330 b->spi_bus[0].sclk = 13;