2 * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
3 * Copyright (c) 2014 Intel Corporation.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
20 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
31 maa_intel_galileo_rev_d()
33 maa_board_t* b = (maa_board_t*) malloc(sizeof(maa_board_t));
37 b->phy_pin_count = 20;
41 b->pins = (maa_pininfo_t*) malloc(sizeof(maa_pininfo_t)*25);
44 strncpy(b->pins[0].name, "IO0", 8);
45 b->pins[0].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
46 b->pins[0].gpio.pinmap = 50;
47 b->pins[0].gpio.parent_id = 0;
48 b->pins[0].gpio.mux_total = 1;
49 b->pins[0].gpio.mux[0].pin = 40;
50 b->pins[0].gpio.mux[0].value = 1;
52 strncpy(b->pins[1].name, "IO1", 8);
53 b->pins[1].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
54 b->pins[1].gpio.pinmap = 51;
55 b->pins[1].gpio.mux_total = 1;
56 b->pins[1].gpio.mux[0].pin = 41;
57 b->pins[1].gpio.mux[0].value = 1;
59 strncpy(b->pins[2].name, "IO2", 8);
60 b->pins[2].capabilites = (maa_pincapabilities_t) {1,1,0,1,0,0,0};
61 b->pins[2].gpio.pinmap = 32;
62 b->pins[2].gpio.mux_total = 1;
63 b->pins[2].gpio.mux[0].pin = 31;
64 b->pins[2].gpio.mux[0].value = 1;
65 b->pins[2].mmap.gpio.pinmap = 14;
66 strncpy(b->pins[2].mmap.mem_dev, "/dev/uio0", 12);
67 b->pins[2].mmap.gpio.mux_total = 2;
68 b->pins[2].mmap.gpio.mux[0].pin = 31;
69 b->pins[2].mmap.gpio.mux[0].value = 0;
70 b->pins[2].mmap.gpio.mux[1].pin = 14;
71 b->pins[2].mmap.gpio.mux[1].value = 0;
72 b->pins[2].mmap.mem_sz = 0x1000;
73 b->pins[2].mmap.bit_pos = 6;
75 strncpy(b->pins[3].name, "IO3", 8);
76 b->pins[3].capabilites = (maa_pincapabilities_t) {1,1,1,1,0,0,0};
77 b->pins[3].gpio.pinmap = 18;
78 b->pins[3].gpio.mux_total = 1;
79 b->pins[3].gpio.mux[0].pin = 30;
80 b->pins[3].gpio.mux[0].value = 1;
81 b->pins[3].mmap.gpio.pinmap = 15;
82 strncpy(b->pins[3].mmap.mem_dev, "/dev/uio0", 12);
83 b->pins[3].mmap.gpio.mux_total = 2;
84 b->pins[3].mmap.gpio.mux[0].pin = 30;
85 b->pins[3].mmap.gpio.mux[0].value = 0;
86 b->pins[3].mmap.gpio.mux[1].pin = 15;
87 b->pins[3].mmap.gpio.mux[1].value = 0;
88 b->pins[3].mmap.mem_sz = 0x1000;
89 b->pins[3].mmap.bit_pos = 7;
90 b->pins[3].pwm.pinmap = 3;
91 b->pins[3].pwm.parent_id = 0;
92 b->pins[3].pwm.mux_total = 1;
93 b->pins[3].pwm.mux[0].pin = 30;
94 b->pins[3].pwm.mux[0].value = 1;
97 strncpy(b->pins[4].name, "IO4", 8);
98 b->pins[4].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
99 b->pins[4].gpio.pinmap = 28;
100 b->pins[4].gpio.mux_total = 0;
102 strncpy(b->pins[5].name, "IO5", 8);
103 b->pins[5].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
104 b->pins[5].gpio.pinmap = 17;
105 b->pins[5].gpio.mux_total = 0;
106 b->pins[5].pwm.pinmap = 5;
107 b->pins[5].pwm.parent_id = 0;
108 b->pins[5].pwm.mux_total = 0;
110 strncpy(b->pins[6].name, "IO6", 8);
111 b->pins[6].gpio.pinmap = 24;
112 b->pins[6].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
113 b->pins[6].gpio.mux_total = 0;
114 b->pins[6].pwm.pinmap = 6;
115 b->pins[6].pwm.parent_id = 0;
116 b->pins[6].pwm.mux_total = 0;
118 strncpy(b->pins[7].name, "IO7", 8);
119 b->pins[7].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
120 b->pins[7].gpio.pinmap = 27;
121 b->pins[7].gpio.mux_total = 0;
123 strncpy(b->pins[8].name, "IO8", 8);
124 b->pins[8].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
125 b->pins[8].gpio.pinmap = 26;
126 b->pins[8].gpio.mux_total = 0;
128 strncpy(b->pins[9].name, "IO9", 8);
129 b->pins[9].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
130 b->pins[9].gpio.pinmap = 19;
131 b->pins[9].gpio.mux_total = 0;
132 b->pins[9].pwm.pinmap = 1;
133 b->pins[9].pwm.parent_id = 0;
134 b->pins[9].pwm.mux_total = 0;
136 strncpy(b->pins[10].name, "IO10", 8);
137 b->pins[10].capabilites = (maa_pincapabilities_t) {1,1,1,0,1,0,0};
138 b->pins[10].gpio.pinmap = 16;
139 b->pins[10].gpio.mux_total = 1;
140 b->pins[10].gpio.mux[0].pin = 42;
141 b->pins[10].gpio.mux[0].value = 1;
142 b->pins[10].pwm.pinmap = 7;
143 b->pins[10].pwm.parent_id = 0;
144 b->pins[10].pwm.mux_total = 1;
145 b->pins[10].pwm.mux[0].pin = 42;
146 b->pins[10].pwm.mux[0].value = 1;
147 b->pins[10].spi.pinmap = 1;
148 b->pins[10].spi.mux_total = 1;
149 b->pins[10].spi.mux[0].pin = 42;
150 b->pins[10].spi.mux[0].value = 0;
152 strncpy(b->pins[11].name, "IO11", 8);
153 b->pins[11].capabilites = (maa_pincapabilities_t) {1,1,1,0,1,0,0};
154 b->pins[11].gpio.pinmap = 25;
155 b->pins[11].gpio.mux_total = 1;
156 b->pins[11].gpio.mux[0].pin = 43;
157 b->pins[11].gpio.mux[0].value = 1;
158 b->pins[11].pwm.pinmap = 4;
159 b->pins[11].pwm.parent_id = 0;
160 b->pins[11].pwm.mux_total = 1;
161 b->pins[11].pwm.mux[0].pin = 43;
162 b->pins[11].pwm.mux[0].value = 1;
163 b->pins[11].spi.pinmap = 1;
164 b->pins[11].spi.mux_total = 1;
165 b->pins[11].spi.mux[0].pin = 43;
166 b->pins[11].spi.mux[0].value = 0;
168 strncpy(b->pins[12].name, "IO12", 8);
169 b->pins[12].capabilites = (maa_pincapabilities_t) {1,1,0,0,1,0,0};
170 b->pins[12].gpio.pinmap = 38;
171 b->pins[12].gpio.mux_total = 1;
172 b->pins[12].gpio.mux[0].pin = 54;
173 b->pins[12].gpio.mux[0].value = 1;
174 b->pins[12].spi.pinmap = 1;
175 b->pins[12].spi.mux_total = 1;
176 b->pins[12].spi.mux[0].pin = 54;
177 b->pins[12].spi.mux[0].value = 0;
179 strncpy(b->pins[13].name, "IO13", 8);
180 b->pins[13].capabilites = (maa_pincapabilities_t) {1,1,0,0,1,0,0};
181 b->pins[13].gpio.pinmap = 39;
182 b->pins[13].gpio.mux_total = 1;
183 b->pins[13].gpio.mux[0].pin = 55;
184 b->pins[13].gpio.mux[0].value = 1;
185 b->pins[13].spi.pinmap = 1;
186 b->pins[13].spi.mux_total = 1;
187 b->pins[13].spi.mux[0].pin = 55;
188 b->pins[13].spi.mux[0].value = 0;
190 strncpy(b->pins[14].name, "A0", 8);
191 b->pins[14].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,1};
192 b->pins[14].gpio.pinmap = 44;
193 b->pins[14].gpio.mux_total = 1;
194 b->pins[14].gpio.mux[0].pin = 37;
195 b->pins[14].gpio.mux[0].value = 1;
196 b->pins[14].aio.pinmap = 0;
197 b->pins[14].aio.mux_total = 1;
198 b->pins[14].aio.mux[0].pin = 37;
199 b->pins[14].aio.mux[0].value = 0;
201 strncpy(b->pins[15].name, "A1", 8);
202 b->pins[15].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,1};
203 b->pins[15].gpio.pinmap = 45;
204 b->pins[15].gpio.mux_total = 1;
205 b->pins[15].gpio.mux[0].pin = 36;
206 b->pins[15].gpio.mux[0].value = 1;
207 b->pins[15].aio.pinmap = 1;
208 b->pins[15].aio.mux_total = 1;
209 b->pins[15].aio.mux[0].pin = 36;
210 b->pins[15].aio.mux[0].value = 0;
212 strncpy(b->pins[16].name, "A2", 8);
213 b->pins[16].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,1};
214 b->pins[16].gpio.pinmap = 46;
215 b->pins[16].gpio.mux_total = 1;
216 b->pins[16].gpio.mux[0].pin = 23;
217 b->pins[16].gpio.mux[0].value = 1;
218 b->pins[16].aio.pinmap = 2;
219 b->pins[16].aio.mux_total = 1;
220 b->pins[16].aio.mux[0].pin = 23;
221 b->pins[16].aio.mux[0].value = 0;
223 strncpy(b->pins[17].name, "A3", 8);
224 b->pins[17].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,1};
225 b->pins[17].gpio.pinmap = 47;
226 b->pins[17].gpio.mux_total = 1;
227 b->pins[17].gpio.mux[0].pin = 22;
228 b->pins[17].gpio.mux[0].value = 1;
229 b->pins[17].aio.pinmap = 3;
230 b->pins[17].aio.mux_total = 1;
231 b->pins[17].aio.mux[0].pin = 22;
232 b->pins[17].aio.mux[0].value = 0;
234 strncpy(b->pins[18].name, "A4", 8);
235 b->pins[18].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,1,1};
236 b->pins[18].gpio.pinmap = 48;
237 b->pins[18].gpio.mux_total = 2;
238 b->pins[18].gpio.mux[0].pin = 29;
239 b->pins[18].gpio.mux[0].value = 1;
240 b->pins[18].gpio.mux[1].pin = 21;
241 b->pins[18].gpio.mux[1].value = 1;
242 b->pins[18].i2c.pinmap = 1;
243 b->pins[18].i2c.mux_total = 1;
244 b->pins[18].i2c.mux[0].pin = 29;
245 b->pins[18].i2c.mux[0].value = 0;
246 b->pins[18].aio.pinmap = 4;
247 b->pins[18].aio.mux_total = 2;
248 b->pins[18].aio.mux[0].pin = 29;
249 b->pins[18].aio.mux[0].value = 1;
250 b->pins[18].aio.mux[1].pin = 21;
251 b->pins[18].aio.mux[1].value = 0;
253 strncpy(b->pins[19].name, "A5", 8);
254 b->pins[19].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,1,1};
255 b->pins[19].gpio.pinmap = 49;
256 b->pins[19].gpio.mux_total = 2;
257 b->pins[19].gpio.mux[0].pin = 29;
258 b->pins[19].gpio.mux[0].value = 1;
259 b->pins[19].gpio.mux[1].pin = 20;
260 b->pins[19].gpio.mux[1].value = 1;
261 b->pins[19].i2c.pinmap = 1;
262 b->pins[19].i2c.mux_total = 1;
263 b->pins[19].i2c.mux[0].pin = 29;
264 b->pins[19].i2c.mux[0].value = 0;
265 b->pins[19].aio.pinmap = 5;
266 b->pins[19].aio.mux_total = 2;
267 b->pins[19].aio.mux[0].pin = 29;
268 b->pins[19].aio.mux[0].value = 1;
269 b->pins[19].aio.mux[1].pin = 20;
270 b->pins[19].aio.mux[1].value = 0;
273 b->i2c_bus_count = 1;
275 b->i2c_bus[0].bus_id = 0;
276 b->i2c_bus[0].sda = 18;
277 b->i2c_bus[0].scl = 19;
279 b->spi_bus_count = 1;
281 b->spi_bus[0].bus_id = 1;
282 b->spi_bus[0].slave_s = 0;
283 b->spi_bus[0].cs = 10;
284 b->spi_bus[0].mosi = 11;
285 b->spi_bus[0].miso = 12;
286 b->spi_bus[0].sclk = 13;