src/intel.h

   1 /**************************************************************************
   2
   3 Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
   4 Copyright © 2002 David Dawes
   5
   6 All Rights Reserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining a
   9 copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sub license, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial portions
  18 of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21 OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23 IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  24 ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25 TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Keith Whitwell <keith@tungstengraphics.com>
  33  *   David Dawes <dawes@xfree86.org>
  34  *
  35  */
  36
  37 #ifdef HAVE_CONFIG_H
  38 #include "config.h"
  39 #endif
  40
  41 #if 0
  42 #define I830DEBUG
  43 #endif
  44
  45 #include <stdint.h>
  46
  47 #ifndef REMAP_RESERVED
  48 #define REMAP_RESERVED 0
  49 #endif
  50
  51 #ifndef _I830_H_
  52 #define _I830_H_
  53
  54 #include "xf86_OSproc.h"
  55 #include "compiler.h"
  56 #include "xf86PciInfo.h"
  57 #include "xf86Pci.h"
  58 #include "xf86Cursor.h"
  59 #include "xf86xv.h"
  60 #include "vgaHW.h"
  61 #include "xf86Crtc.h"
  62 #include "xf86RandR12.h"
  63
  64 #include "xorg-server.h"
  65 #include <pciaccess.h>
  66
  67 #include "xf86drm.h"
  68 #include "sarea.h"
  69 #define _XF86DRI_SERVER_
  70 #include "dri.h"
  71 #include "dri2.h"
  72 #include "intel_bufmgr.h"
  73 #include "i915_drm.h"
  74
  75 #include "intel_driver.h"
  76
  77 #if HAVE_UDEV
  78 #include <libudev.h>
  79 #endif
  80
  81 #include "uxa.h"
  82 /* XXX
  83  * The X server gained an *almost* identical implementation in 1.9.
  84  *
  85  * Remove this duplicate code either in 2.16 (when we can depend upon 1.9)
  86  * or the drivers are merged back into the xserver tree, whichever happens
  87  * earlier.
  88  */
  89
  90 #ifndef _LIST_H_
  91 /* classic doubly-link circular list */
  92 struct list {
  93         struct list *next, *prev;
  94 };
  95
  96 static void
  97 list_init(struct list *list)
  98 {
  99         list->next = list->prev = list;
 100 }
 101
 102 static inline void
 103 __list_add(struct list *entry,
 104             struct list *prev,
 105             struct list *next)
 106 {
 107         next->prev = entry;
 108         entry->next = next;
 109         entry->prev = prev;
 110         prev->next = entry;
 111 }
 112
 113 static inline void
 114 list_add(struct list *entry, struct list *head)
 115 {
 116         __list_add(entry, head, head->next);
 117 }
 118
 119 static inline void
 120 __list_del(struct list *prev, struct list *next)
 121 {
 122         next->prev = prev;
 123         prev->next = next;
 124 }
 125
 126 static inline void
 127 list_del(struct list *entry)
 128 {
 129         __list_del(entry->prev, entry->next);
 130         list_init(entry);
 131 }
 132
 133 static inline Bool
 134 list_is_empty(struct list *head)
 135 {
 136         return head->next == head;
 137 }
 138 #endif
 139
 140 /* XXX work around a broken define in list.h currently [ickle 20100713] */
 141 #undef container_of
 142
 143 #ifndef container_of
 144 #define container_of(ptr, type, member) \
 145         ((type *)((char *)(ptr) - (char *) &((type *)0)->member))
 146 #endif
 147
 148 #ifndef list_entry
 149 #define list_entry(ptr, type, member) \
 150         container_of(ptr, type, member)
 151 #endif
 152
 153 #ifndef list_first_entry
 154 #define list_first_entry(ptr, type, member) \
 155         list_entry((ptr)->next, type, member)
 156 #endif
 157
 158 #ifndef list_foreach
 159 #define list_foreach(pos, head)                 \
 160         for (pos = (head)->next; pos != (head); pos = pos->next)
 161 #endif
 162
 163 /* XXX list.h from xserver-1.9 uses a GCC-ism to avoid having to pass type */
 164 #ifndef list_foreach_entry
 165 #define list_foreach_entry(pos, type, head, member)             \
 166         for (pos = list_entry((head)->next, type, member);\
 167              &pos->member != (head);                                    \
 168              pos = list_entry(pos->member.next, type, member))
 169 #endif
 170
 171 /* remain compatible to xorg-server 1.6 */
 172 #ifndef MONITOR_EDID_COMPLETE_RAWDATA
 173 #define MONITOR_EDID_COMPLETE_RAWDATA EDID_COMPLETE_RAWDATA
 174 #endif
 175
 176 struct intel_pixmap {
 177         dri_bo *bo;
 178
 179         struct list flush, batch, in_flight;
 180
 181         uint16_t src_bound, dst_bound;
 182         uint16_t stride;
 183         uint8_t tiling;
 184         int8_t busy :2;
 185         int8_t batch_write :1;
 186         int8_t offscreen :1;
 187         int8_t pinned :1;
 188 };
 189
 190 #if HAS_DEVPRIVATEKEYREC
 191 extern DevPrivateKeyRec uxa_pixmap_index;
 192 #else
 193 extern int uxa_pixmap_index;
 194 #endif
 195
 196 static inline struct intel_pixmap *intel_get_pixmap_private(PixmapPtr pixmap)
 197 {
 198 #if HAS_DEVPRIVATEKEYREC
 199         return dixGetPrivate(&pixmap->devPrivates, &uxa_pixmap_index);
 200 #else
 201         return dixLookupPrivate(&pixmap->devPrivates, &uxa_pixmap_index);
 202 #endif
 203 }
 204
 205 static inline Bool intel_pixmap_is_busy(struct intel_pixmap *priv)
 206 {
 207         if (priv->busy == -1)
 208                 priv->busy = drm_intel_bo_busy(priv->bo);
 209         return priv->busy;
 210 }
 211
 212 static inline void intel_set_pixmap_private(PixmapPtr pixmap, struct intel_pixmap *intel)
 213 {
 214         dixSetPrivate(&pixmap->devPrivates, &uxa_pixmap_index, intel);
 215 }
 216
 217 static inline Bool intel_pixmap_is_dirty(PixmapPtr pixmap)
 218 {
 219         return !list_is_empty(&intel_get_pixmap_private(pixmap)->flush);
 220 }
 221
 222 static inline Bool intel_pixmap_tiled(PixmapPtr pixmap)
 223 {
 224         return intel_get_pixmap_private(pixmap)->tiling != I915_TILING_NONE;
 225 }
 226
 227 dri_bo *intel_get_pixmap_bo(PixmapPtr pixmap);
 228 void intel_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo);
 229
 230 #include "common.h"
 231
 232 #ifdef XvMCExtension
 233 #ifdef ENABLE_XVMC
 234 #define INTEL_XVMC 1
 235 #endif
 236 #endif
 237
 238 #define PITCH_NONE 0
 239
 240 /** enumeration of 3d consumers so some can maintain invariant state. */
 241 enum last_3d {
 242         LAST_3D_OTHER,
 243         LAST_3D_VIDEO,
 244         LAST_3D_RENDER,
 245         LAST_3D_ROTATION
 246 };
 247
 248 enum dri_type {
 249         DRI_DISABLED,
 250         DRI_NONE,
 251         DRI_DRI2
 252 };
 253
 254 typedef struct intel_screen_private {
 255         ScrnInfoPtr scrn;
 256         int cpp;
 257
 258 #define RENDER_BATCH                    I915_EXEC_RENDER
 259 #define BLT_BATCH                       I915_EXEC_BLT
 260         unsigned int current_batch;
 261
 262         void *modes;
 263         drm_intel_bo *front_buffer;
 264         long front_pitch, front_tiling;
 265         void *shadow_buffer;
 266         int shadow_stride;
 267         DamagePtr shadow_damage;
 268
 269         dri_bufmgr *bufmgr;
 270
 271         uint32_t batch_ptr[4096];
 272         /** Byte offset in batch_ptr for the next dword to be emitted. */
 273         unsigned int batch_used;
 274         /** Position in batch_ptr at the start of the current BEGIN_BATCH */
 275         unsigned int batch_emit_start;
 276         /** Number of bytes to be emitted in the current BEGIN_BATCH. */
 277         uint32_t batch_emitting;
 278         dri_bo *batch_bo;
 279         /** Whether we're in a section of code that can't tolerate flushing */
 280         Bool in_batch_atomic;
 281         /** Ending batch_used that was verified by intel_start_batch_atomic() */
 282         int batch_atomic_limit;
 283         struct list batch_pixmaps;
 284         struct list flush_pixmaps;
 285         struct list in_flight;
 286
 287         /* For Xvideo */
 288         Bool use_overlay;
 289 #ifdef INTEL_XVMC
 290         /* For XvMC */
 291         Bool XvMCEnabled;
 292 #endif
 293
 294         CreateScreenResourcesProcPtr CreateScreenResources;
 295
 296         Bool shadow_present;
 297
 298         unsigned int tiling;
 299 #define INTEL_TILING_FB         0x1
 300 #define INTEL_TILING_2D         0x2
 301 #define INTEL_TILING_3D         0x4
 302 #define INTEL_TILING_ALL (~0)
 303
 304         Bool swapbuffers_wait;
 305         Bool has_relaxed_fencing;
 306
 307         int Chipset;
 308         EntityInfoPtr pEnt;
 309         struct pci_device *PciInfo;
 310         struct intel_chipset chipset;
 311
 312         unsigned int BR[20];
 313
 314         CloseScreenProcPtr CloseScreen;
 315
 316         void (*context_switch) (struct intel_screen_private *intel,
 317                                 int new_mode);
 318         void (*vertex_flush) (struct intel_screen_private *intel);
 319         void (*batch_flush) (struct intel_screen_private *intel);
 320         void (*batch_commit_notify) (struct intel_screen_private *intel);
 321
 322         uxa_driver_t *uxa_driver;
 323         Bool need_sync;
 324         int accel_pixmap_offset_alignment;
 325         int accel_max_x;
 326         int accel_max_y;
 327         int max_bo_size;
 328         int max_gtt_map_size;
 329         int max_tiling_size;
 330
 331         Bool XvDisabled;        /* Xv disabled in PreInit. */
 332         Bool XvEnabled;         /* Xv enabled for this generation. */
 333         Bool XvPreferOverlay;
 334
 335         int colorKey;
 336         XF86VideoAdaptorPtr adaptor;
 337         ScreenBlockHandlerProcPtr BlockHandler;
 338         Bool overlayOn;
 339
 340         struct {
 341                 drm_intel_bo *gen4_vs_bo;
 342                 drm_intel_bo *gen4_sf_bo;
 343                 drm_intel_bo *gen4_wm_packed_bo;
 344                 drm_intel_bo *gen4_wm_planar_bo;
 345                 drm_intel_bo *gen4_cc_bo;
 346                 drm_intel_bo *gen4_cc_vp_bo;
 347                 drm_intel_bo *gen4_sampler_bo;
 348                 drm_intel_bo *gen4_sip_kernel_bo;
 349                 drm_intel_bo *wm_prog_packed_bo;
 350                 drm_intel_bo *wm_prog_planar_bo;
 351                 drm_intel_bo *gen6_blend_bo;
 352                 drm_intel_bo *gen6_depth_stencil_bo;
 353         } video;
 354
 355         /* Render accel state */
 356         float scale_units[2][2];
 357         /** Transform pointers for src/mask, or NULL if identity */
 358         PictTransform *transform[2];
 359
 360         PixmapPtr render_source, render_mask, render_dest;
 361         PicturePtr render_source_picture, render_mask_picture, render_dest_picture;
 362         CARD32 render_source_solid;
 363         CARD32 render_mask_solid;
 364         PixmapPtr render_current_dest;
 365         Bool render_source_is_solid;
 366         Bool render_mask_is_solid;
 367         Bool needs_3d_invariant;
 368         Bool needs_render_state_emit;
 369         Bool needs_render_vertex_emit;
 370         Bool needs_render_ca_pass;
 371
 372         /* i830 render accel state */
 373         uint32_t render_dest_format;
 374         uint32_t cblend, ablend, s8_blendctl;
 375
 376         /* i915 render accel state */
 377         PixmapPtr texture[2];
 378         uint32_t mapstate[6];
 379         uint32_t samplerstate[6];
 380
 381         struct {
 382                 int op;
 383                 uint32_t dst_format;
 384         } i915_render_state;
 385
 386         struct {
 387                 int num_sf_outputs;
 388                 int drawrect;
 389                 uint32_t blend;
 390                 dri_bo *samplers;
 391                 dri_bo *kernel;
 392         } gen6_render_state;
 393
 394         uint32_t prim_offset;
 395         void (*prim_emit)(struct intel_screen_private *intel,
 396                           int srcX, int srcY,
 397                           int maskX, int maskY,
 398                           int dstX, int dstY,
 399                           int w, int h);
 400         int floats_per_vertex;
 401         int last_floats_per_vertex;
 402         uint16_t vertex_offset;
 403         uint16_t vertex_count;
 404         uint16_t vertex_index;
 405         uint16_t vertex_used;
 406         uint32_t vertex_id;
 407         float vertex_ptr[4*1024];
 408         dri_bo *vertex_bo;
 409
 410         uint8_t surface_data[16*1024];
 411         uint16_t surface_used;
 412         uint16_t surface_table;
 413         uint32_t surface_reloc;
 414         dri_bo *surface_bo;
 415
 416         /* 965 render acceleration state */
 417         struct gen4_render_state *gen4_render_state;
 418
 419         enum dri_type directRenderingType;      /* DRI enabled this generation. */
 420
 421         Bool directRenderingOpen;
 422         int drmSubFD;
 423         char *deviceName;
 424
 425         Bool use_pageflipping;
 426         Bool force_fallback;
 427         Bool can_blt;
 428         Bool has_kernel_flush;
 429         Bool needs_flush;
 430         Bool use_shadow;
 431
 432         /* Broken-out options. */
 433         OptionInfoPtr Options;
 434
 435         /* Driver phase/state information */
 436         Bool suspended;
 437
 438         enum last_3d last_3d;
 439
 440         /**
 441          * User option to print acceleration fallback info to the server log.
 442          */
 443         Bool fallback_debug;
 444         unsigned debug_flush;
 445 #if HAVE_UDEV
 446         struct udev_monitor *uevent_monitor;
 447         InputHandlerProc uevent_handler;
 448 #endif
 449 } intel_screen_private;
 450
 451 enum {
 452         DEBUG_FLUSH_BATCHES = 0x1,
 453         DEBUG_FLUSH_CACHES = 0x2,
 454         DEBUG_FLUSH_WAIT = 0x4,
 455 };
 456
 457 extern Bool intel_mode_pre_init(ScrnInfoPtr pScrn, int fd, int cpp);
 458 extern void intel_mode_init(struct intel_screen_private *intel);
 459 extern void intel_mode_remove_fb(intel_screen_private *intel);
 460 extern void intel_mode_fini(intel_screen_private *intel);
 461
 462 extern int intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, xf86CrtcPtr crtc);
 463 extern int intel_crtc_id(xf86CrtcPtr crtc);
 464 extern int intel_output_dpms_status(xf86OutputPtr output);
 465
 466 enum DRI2FrameEventType {
 467         DRI2_SWAP,
 468         DRI2_FLIP,
 469         DRI2_WAITMSC,
 470 };
 471
 472 #if XORG_VERSION_CURRENT <= XORG_VERSION_NUMERIC(1,7,99,3,0)
 473 typedef void (*DRI2SwapEventPtr)(ClientPtr client, void *data, int type,
 474                                  CARD64 ust, CARD64 msc, CARD64 sbc);
 475 #endif
 476
 477 typedef struct _DRI2FrameEvent {
 478         XID drawable_id;
 479         XID client_id;  /* fake client ID to track client destruction */
 480         ClientPtr client;
 481         enum DRI2FrameEventType type;
 482         int frame;
 483
 484         /* for swaps & flips only */
 485         DRI2SwapEventPtr event_complete;
 486         void *event_data;
 487         DRI2BufferPtr front;
 488         DRI2BufferPtr back;
 489 } DRI2FrameEventRec, *DRI2FrameEventPtr;
 490
 491 extern Bool intel_do_pageflip(intel_screen_private *intel,
 492                               dri_bo *new_front,
 493                               DRI2FrameEventPtr flip_info, int ref_crtc_hw_id);
 494
 495 static inline intel_screen_private *
 496 intel_get_screen_private(ScrnInfoPtr scrn)
 497 {
 498         return (intel_screen_private *)(scrn->driverPrivate);
 499 }
 500
 501 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
 502 #define ALIGN(i,m)      (((i) + (m) - 1) & ~((m) - 1))
 503 #define MIN(a,b)        ((a) < (b) ? (a) : (b))
 504
 505 static inline unsigned long intel_pixmap_pitch(PixmapPtr pixmap)
 506 {
 507         return (unsigned long)pixmap->devKind;
 508 }
 509
 510 /* Batchbuffer support macros and functions */
 511 #include "intel_batchbuffer.h"
 512
 513 /* I830 specific functions */
 514 extern void IntelEmitInvarientState(ScrnInfoPtr scrn);
 515 extern void I830EmitInvarientState(ScrnInfoPtr scrn);
 516 extern void I915EmitInvarientState(ScrnInfoPtr scrn);
 517
 518 extern void I830EmitFlush(ScrnInfoPtr scrn);
 519
 520 extern void I830InitVideo(ScreenPtr pScreen);
 521 extern xf86CrtcPtr intel_covering_crtc(ScrnInfoPtr scrn, BoxPtr box,
 522                                       xf86CrtcPtr desired, BoxPtr crtc_box_ret);
 523
 524 Bool I830DRI2ScreenInit(ScreenPtr pScreen);
 525 void I830DRI2CloseScreen(ScreenPtr pScreen);
 526 void I830DRI2FrameEventHandler(unsigned int frame, unsigned int tv_sec,
 527                                unsigned int tv_usec, DRI2FrameEventPtr flip_info);
 528 void I830DRI2FlipEventHandler(unsigned int frame, unsigned int tv_sec,
 529                               unsigned int tv_usec, DRI2FrameEventPtr flip_info);
 530
 531 extern Bool intel_crtc_on(xf86CrtcPtr crtc);
 532 int intel_crtc_to_pipe(xf86CrtcPtr crtc);
 533
 534 /* intel_memory.c */
 535 unsigned long intel_get_fence_size(intel_screen_private *intel, unsigned long size);
 536 unsigned long intel_get_fence_pitch(intel_screen_private *intel, unsigned long pitch,
 537                                    uint32_t tiling_mode);
 538 void intel_set_gem_max_sizes(ScrnInfoPtr scrn);
 539
 540 drm_intel_bo *intel_allocate_framebuffer(ScrnInfoPtr scrn,
 541                                         int w, int h, int cpp,
 542                                         unsigned long *pitch,
 543                                         uint32_t *tiling);
 544
 545 /* i830_render.c */
 546 Bool i830_check_composite(int op,
 547                           PicturePtr sourcec, PicturePtr mask, PicturePtr dest,
 548                           int width, int height);
 549 Bool i830_check_composite_target(PixmapPtr pixmap);
 550 Bool i830_check_composite_texture(ScreenPtr screen, PicturePtr picture);
 551 Bool i830_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask,
 552                             PicturePtr dest, PixmapPtr sourcecPixmap,
 553                             PixmapPtr maskPixmap, PixmapPtr destPixmap);
 554 void i830_composite(PixmapPtr dest, int srcX, int srcY,
 555                     int maskX, int maskY, int dstX, int dstY, int w, int h);
 556 void i830_vertex_flush(intel_screen_private *intel);
 557
 558 /* i915_render.c */
 559 Bool i915_check_composite(int op,
 560                           PicturePtr sourcec, PicturePtr mask, PicturePtr dest,
 561                           int width, int height);
 562 Bool i915_check_composite_target(PixmapPtr pixmap);
 563 Bool i915_check_composite_texture(ScreenPtr screen, PicturePtr picture);
 564 Bool i915_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask,
 565                             PicturePtr dest, PixmapPtr sourcecPixmap,
 566                             PixmapPtr maskPixmap, PixmapPtr destPixmap);
 567 void i915_composite(PixmapPtr dest, int srcX, int srcY,
 568                     int maskX, int maskY, int dstX, int dstY, int w, int h);
 569 void i915_vertex_flush(intel_screen_private *intel);
 570 void i915_batch_commit_notify(intel_screen_private *intel);
 571 void i830_batch_commit_notify(intel_screen_private *intel);
 572 /* i965_render.c */
 573 unsigned int gen4_render_state_size(ScrnInfoPtr scrn);
 574 void gen4_render_state_init(ScrnInfoPtr scrn);
 575 void gen4_render_state_cleanup(ScrnInfoPtr scrn);
 576 Bool i965_check_composite(int op,
 577                           PicturePtr sourcec, PicturePtr mask, PicturePtr dest,
 578                           int width, int height);
 579 Bool i965_check_composite_texture(ScreenPtr screen, PicturePtr picture);
 580 Bool i965_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask,
 581                             PicturePtr dest, PixmapPtr sourcecPixmap,
 582                             PixmapPtr maskPixmap, PixmapPtr destPixmap);
 583 void i965_composite(PixmapPtr dest, int srcX, int srcY,
 584                     int maskX, int maskY, int dstX, int dstY, int w, int h);
 585
 586 void i965_vertex_flush(intel_screen_private *intel);
 587 void i965_batch_flush(intel_screen_private *intel);
 588 void i965_batch_commit_notify(intel_screen_private *intel);
 589
 590 Bool intel_transform_is_affine(PictTransformPtr t);
 591 Bool
 592 intel_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
 593                                  float *x_out, float *y_out);
 594
 595 Bool
 596 intel_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
 597                                     float *x_out, float *y_out, float *z_out);
 598
 599 static inline void
 600 intel_debug_fallback(ScrnInfoPtr scrn, char *format, ...)
 601 {
 602         intel_screen_private *intel = intel_get_screen_private(scrn);
 603         va_list ap;
 604
 605         va_start(ap, format);
 606         if (intel->fallback_debug) {
 607                 xf86DrvMsg(scrn->scrnIndex, X_INFO, "fallback: ");
 608                 LogVMessageVerb(X_INFO, 1, format, ap);
 609         }
 610         va_end(ap);
 611 }
 612
 613 static inline Bool
 614 intel_check_pitch_2d(PixmapPtr pixmap)
 615 {
 616         uint32_t pitch = intel_pixmap_pitch(pixmap);
 617         if (pitch > KB(32)) {
 618                 ScrnInfoPtr scrn = xf86Screens[pixmap->drawable.pScreen->myNum];
 619                 intel_debug_fallback(scrn, "pitch exceeds 2d limit 32K\n");
 620                 return FALSE;
 621         }
 622         return TRUE;
 623 }
 624
 625 /* For pre-965 chip only, as they have 8KB limit for 3D */
 626 static inline Bool
 627 intel_check_pitch_3d(PixmapPtr pixmap)
 628 {
 629         uint32_t pitch = intel_pixmap_pitch(pixmap);
 630         if (pitch > KB(8)) {
 631                 ScrnInfoPtr scrn = xf86Screens[pixmap->drawable.pScreen->myNum];
 632                 intel_debug_fallback(scrn, "pitch exceeds 3d limit 8K\n");
 633                 return FALSE;
 634         }
 635         return TRUE;
 636 }
 637
 638 /**
 639  * Little wrapper around drm_intel_bo_reloc to return the initial value you
 640  * should stuff into the relocation entry.
 641  *
 642  * If only we'd done this before settling on the library API.
 643  */
 644 static inline uint32_t
 645 intel_emit_reloc(drm_intel_bo * bo, uint32_t offset,
 646                  drm_intel_bo * target_bo, uint32_t target_offset,
 647                  uint32_t read_domains, uint32_t write_domain)
 648 {
 649         drm_intel_bo_emit_reloc(bo, offset, target_bo, target_offset,
 650                                 read_domains, write_domain);
 651
 652         return target_bo->offset + target_offset;
 653 }
 654
 655 static inline drm_intel_bo *intel_bo_alloc_for_data(intel_screen_private *intel,
 656                                                     const void *data,
 657                                                     unsigned int size,
 658                                                     char *name)
 659 {
 660         drm_intel_bo *bo;
 661
 662         bo = drm_intel_bo_alloc(intel->bufmgr, name, size, 4096);
 663         if (bo)
 664                 drm_intel_bo_subdata(bo, 0, size, data);
 665         return bo;
 666 }
 667
 668 void intel_debug_flush(ScrnInfoPtr scrn);
 669
 670 static inline PixmapPtr get_drawable_pixmap(DrawablePtr drawable)
 671 {
 672         ScreenPtr screen = drawable->pScreen;
 673
 674         if (drawable->type == DRAWABLE_PIXMAP)
 675                 return (PixmapPtr) drawable;
 676         else
 677                 return screen->GetWindowPixmap((WindowPtr) drawable);
 678 }
 679
 680 static inline Bool pixmap_is_scanout(PixmapPtr pixmap)
 681 {
 682         ScreenPtr screen = pixmap->drawable.pScreen;
 683
 684         return pixmap == screen->GetScreenPixmap(screen);
 685 }
 686
 687 const OptionInfoRec *intel_uxa_available_options(int chipid, int busid);
 688
 689 Bool intel_uxa_init(ScreenPtr pScreen);
 690 Bool intel_uxa_create_screen_resources(ScreenPtr pScreen);
 691 void intel_uxa_block_handler(intel_screen_private *intel);
 692 Bool intel_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table,
 693                               int num_bos);
 694
 695 /* intel_shadow.c */
 696 void intel_shadow_blt(intel_screen_private *intel);
 697 void intel_shadow_create(struct intel_screen_private *intel);
 698
 699 #endif /* _I830_H_ */