src/i965_gpe_utils.h

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Xiang Haihao <haihao.xiang@intel.com>
  25  */
  26
  27 #ifndef _I965_GPE_UTILS_H_
  28 #define _I965_GPE_UTILS_H_
  29
  30 #include <i915_drm.h>
  31 #include <intel_bufmgr.h>
  32
  33 #include "i965_defines.h"
  34 #include "i965_drv_video.h"
  35 #include "i965_structs.h"
  36
  37 #define MAX_GPE_KERNELS    32
  38
  39 struct i965_buffer_surface
  40 {
  41     dri_bo *bo;
  42     unsigned int num_blocks;
  43     unsigned int size_block;
  44     unsigned int pitch;
  45 };
  46
  47 struct i965_gpe_context
  48 {
  49     struct {
  50         dri_bo *bo;
  51         unsigned int length;            /* in bytes */
  52     } surface_state_binding_table;
  53
  54     struct {
  55         dri_bo *bo;
  56         unsigned int max_entries;
  57         unsigned int entry_size;        /* in bytes */
  58     } idrt;
  59
  60     struct {
  61         dri_bo *bo;
  62         unsigned int length;            /* in bytes */
  63     } curbe;
  64
  65     struct {
  66         unsigned int gpgpu_mode : 1;
  67         unsigned int pad0 : 7;
  68         unsigned int max_num_threads : 16;
  69         unsigned int num_urb_entries : 8;
  70         unsigned int urb_entry_size : 16;
  71         unsigned int curbe_allocation_size : 16;
  72     } vfe_state;
  73
  74     unsigned int num_kernels;
  75     struct i965_kernel kernels[MAX_GPE_KERNELS];
  76 };
  77
  78 void i965_gpe_context_destroy(struct i965_gpe_context *gpe_context);
  79 void i965_gpe_context_init(VADriverContextP ctx,
  80                            struct i965_gpe_context *gpe_context);
  81 void i965_gpe_load_kernels(VADriverContextP ctx,
  82                            struct i965_gpe_context *gpe_context,
  83                            struct i965_kernel *kernel_list,
  84                            unsigned int num_kernels);
  85 void gen6_gpe_pipeline_setup(VADriverContextP ctx,
  86                              struct i965_gpe_context *gpe_context,
  87                              struct intel_batchbuffer *batch);
  88 void i965_gpe_surface2_setup(VADriverContextP ctx,
  89                              struct i965_gpe_context *gpe_context,
  90                              struct object_surface *obj_surface,
  91                              unsigned long binding_table_offset,
  92                              unsigned long surface_state_offset);
  93 void i965_gpe_media_rw_surface_setup(VADriverContextP ctx,
  94                                      struct i965_gpe_context *gpe_context,
  95                                      struct object_surface *obj_surface,
  96                                      unsigned long binding_table_offset,
  97                                      unsigned long surface_state_offset);
  98 void i965_gpe_buffer_suface_setup(VADriverContextP ctx,
  99                                   struct i965_gpe_context *gpe_context,
 100                                   struct i965_buffer_surface *buffer_surface,
 101                                   unsigned long binding_table_offset,
 102                                   unsigned long surface_state_offset);
 103 void gen7_gpe_surface2_setup(VADriverContextP ctx,
 104                              struct i965_gpe_context *gpe_context,
 105                              struct object_surface *obj_surface,
 106                              unsigned long binding_table_offset,
 107                              unsigned long surface_state_offset);
 108 void gen7_gpe_media_rw_surface_setup(VADriverContextP ctx,
 109                                      struct i965_gpe_context *gpe_context,
 110                                      struct object_surface *obj_surface,
 111                                      unsigned long binding_table_offset,
 112                                      unsigned long surface_state_offset);
 113 void gen7_gpe_buffer_suface_setup(VADriverContextP ctx,
 114                                   struct i965_gpe_context *gpe_context,
 115                                   struct i965_buffer_surface *buffer_surface,
 116                                   unsigned long binding_table_offset,
 117                                   unsigned long surface_state_offset);
 118 void gen75_gpe_media_chroma_surface_setup(VADriverContextP ctx,
 119                                      struct i965_gpe_context *gpe_context,
 120                                      struct object_surface *obj_surface,
 121                                      unsigned long binding_table_offset,
 122                                      unsigned long surface_state_offset);
 123 #endif /* _I965_GPE_UTILS_H_ */