src/i965_encoder.c

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Zhou Chang <chang.zhou@intel.com>
  26  *
  27  */
  28
  29 #include <stdio.h>
  30 #include <stdlib.h>
  31 #include <string.h>
  32 #include <assert.h>
  33
  34 #include "intel_batchbuffer.h"
  35 #include "intel_driver.h"
  36
  37 #include "i965_defines.h"
  38 #include "i965_drv_video.h"
  39 #include "i965_encoder.h"
  40 #include "gen6_vme.h"
  41 #include "gen6_mfc.h"
  42
  43 extern Bool gen6_mfc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context);
  44 extern Bool gen6_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context);
  45 extern Bool gen7_mfc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context);
  46
  47 VAStatus
  48 i965_DestroySurfaces(VADriverContextP ctx,
  49                      VASurfaceID *surface_list,
  50                      int num_surfaces);
  51 VAStatus
  52 i965_CreateSurfaces(VADriverContextP ctx,
  53                     int width,
  54                     int height,
  55                     int format,
  56                     int num_surfaces,
  57                     VASurfaceID *surfaces);
  58
  59 static VAStatus
  60 intel_encoder_check_yuv_surface(VADriverContextP ctx,
  61                                 VAProfile profile,
  62                                 struct encode_state *encode_state,
  63                                 struct intel_encoder_context *encoder_context)
  64 {
  65     struct i965_driver_data *i965 = i965_driver_data(ctx);
  66     struct i965_surface src_surface, dst_surface;
  67     struct object_surface *obj_surface;
  68     VAStatus status;
  69     VARectangle rect;
  70
  71     /* releae the temporary surface */
  72     if (encoder_context->is_tmp_id) {
  73         i965_DestroySurfaces(ctx, &encoder_context->input_yuv_surface, 1);
  74         encode_state->input_yuv_object = NULL;
  75     }
  76
  77     encoder_context->is_tmp_id = 0;
  78     obj_surface = SURFACE(encode_state->current_render_target);
  79     assert(obj_surface && obj_surface->bo);
  80
  81     if (!obj_surface || !obj_surface->bo)
  82         return VA_STATUS_ERROR_INVALID_PARAMETER;
  83
  84     if (obj_surface->fourcc == VA_FOURCC('N', 'V', '1', '2')) {
  85         unsigned int tiling = 0, swizzle = 0;
  86
  87         dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle);
  88
  89         if (tiling == I915_TILING_Y) {
  90             encoder_context->input_yuv_surface = encode_state->current_render_target;
  91             encode_state->input_yuv_object = obj_surface;
  92             return VA_STATUS_SUCCESS;
  93         }
  94     }
  95
  96     rect.x = 0;
  97     rect.y = 0;
  98     rect.width = obj_surface->orig_width;
  99     rect.height = obj_surface->orig_height;
 100
 101     src_surface.id = encode_state->current_render_target;
 102     src_surface.type = I965_SURFACE_TYPE_SURFACE;
 103     src_surface.flags = I965_SURFACE_FLAG_FRAME;
 104
 105     status = i965_CreateSurfaces(ctx,
 106                                  obj_surface->orig_width,
 107                                  obj_surface->orig_height,
 108                                  VA_RT_FORMAT_YUV420,
 109                                  1,
 110                                  &encoder_context->input_yuv_surface);
 111     assert(status == VA_STATUS_SUCCESS);
 112
 113     if (status != VA_STATUS_SUCCESS)
 114         return status;
 115
 116     obj_surface = SURFACE(encoder_context->input_yuv_surface);
 117     encode_state->input_yuv_object = obj_surface;
 118     i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N', 'V', '1', '2'), SUBSAMPLE_YUV420);
 119
 120     dst_surface.id = encoder_context->input_yuv_surface;
 121     dst_surface.type = I965_SURFACE_TYPE_SURFACE;
 122     dst_surface.flags = I965_SURFACE_FLAG_FRAME;
 123
 124     status = i965_image_processing(ctx,
 125                                    &src_surface,
 126                                    &rect,
 127                                    &dst_surface,
 128                                    &rect);
 129     assert(status == VA_STATUS_SUCCESS);
 130
 131     encoder_context->is_tmp_id = 1;
 132
 133     return VA_STATUS_SUCCESS;
 134 }
 135
 136 static VAStatus
 137 intel_encoder_end_picture(VADriverContextP ctx,
 138                           VAProfile profile,
 139                           union codec_state *codec_state,
 140                           struct hw_context *hw_context)
 141 {
 142     struct intel_encoder_context *encoder_context = (struct intel_encoder_context *)hw_context;
 143     struct encode_state *encode_state = &codec_state->encode;
 144     VAStatus vaStatus;
 145
 146     vaStatus = intel_encoder_check_yuv_surface(ctx, profile, encode_state, encoder_context);
 147
 148     if (vaStatus != VA_STATUS_SUCCESS)
 149         return vaStatus;
 150
 151     encoder_context->mfc_brc_prepare(encode_state, encoder_context);
 152
 153     vaStatus = encoder_context->vme_pipeline(ctx, profile, encode_state, encoder_context);
 154
 155     if (vaStatus == VA_STATUS_SUCCESS)
 156         encoder_context->mfc_pipeline(ctx, profile, encode_state, encoder_context);
 157     return VA_STATUS_SUCCESS;
 158 }
 159
 160 static void
 161 intel_encoder_context_destroy(void *hw_context)
 162 {
 163     struct intel_encoder_context *encoder_context = (struct intel_encoder_context *)hw_context;
 164
 165     encoder_context->mfc_context_destroy(encoder_context->mfc_context);
 166     encoder_context->vme_context_destroy(encoder_context->vme_context);
 167     intel_batchbuffer_free(encoder_context->base.batch);
 168     free(encoder_context);
 169 }
 170
 171 struct hw_context *
 172 gen6_enc_hw_context_init(VADriverContextP ctx, struct object_config *obj_config)
 173 {
 174     struct intel_driver_data *intel = intel_driver_data(ctx);
 175     struct intel_encoder_context *encoder_context = calloc(1, sizeof(struct intel_encoder_context));
 176     int i;
 177
 178     encoder_context->base.destroy = intel_encoder_context_destroy;
 179     encoder_context->base.run = intel_encoder_end_picture;
 180     encoder_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0);
 181     encoder_context->input_yuv_surface = VA_INVALID_SURFACE;
 182     encoder_context->is_tmp_id = 0;
 183     encoder_context->rate_control_mode = VA_RC_NONE;
 184     encoder_context->profile = obj_config->profile;
 185
 186     for (i = 0; i < obj_config->num_attribs; i++) {
 187         if (obj_config->attrib_list[i].type == VAConfigAttribRateControl) {
 188             encoder_context->rate_control_mode = obj_config->attrib_list[i].value;
 189             break;
 190         }
 191     }
 192
 193     gen6_vme_context_init(ctx, encoder_context);
 194     assert(encoder_context->vme_context);
 195     assert(encoder_context->vme_context_destroy);
 196     assert(encoder_context->vme_pipeline);
 197
 198     gen6_mfc_context_init(ctx, encoder_context);
 199     assert(encoder_context->mfc_context);
 200     assert(encoder_context->mfc_context_destroy);
 201     assert(encoder_context->mfc_pipeline);
 202
 203     return (struct hw_context *)encoder_context;
 204 }
 205
 206 struct hw_context *
 207 gen7_enc_hw_context_init(VADriverContextP ctx, struct object_config *obj_config)
 208 {
 209     struct intel_driver_data *intel = intel_driver_data(ctx);
 210     struct intel_encoder_context *encoder_context = calloc(1, sizeof(struct intel_encoder_context));
 211     int i;
 212
 213     encoder_context->base.destroy = intel_encoder_context_destroy;
 214     encoder_context->base.run = intel_encoder_end_picture;
 215     encoder_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0);
 216     encoder_context->input_yuv_surface = VA_INVALID_SURFACE;
 217     encoder_context->is_tmp_id = 0;
 218     encoder_context->rate_control_mode = VA_RC_NONE;
 219     encoder_context->profile = obj_config->profile;
 220
 221     for (i = 0; i < obj_config->num_attribs; i++) {
 222         if (obj_config->attrib_list[i].type == VAConfigAttribRateControl) {
 223             encoder_context->rate_control_mode = obj_config->attrib_list[i].value;
 224             break;
 225         }
 226     }
 227
 228     gen7_vme_context_init(ctx, encoder_context);
 229     assert(encoder_context->vme_context);
 230     assert(encoder_context->vme_context_destroy);
 231     assert(encoder_context->vme_pipeline);
 232
 233     gen7_mfc_context_init(ctx, encoder_context);
 234     assert(encoder_context->mfc_context);
 235     assert(encoder_context->mfc_context_destroy);
 236     assert(encoder_context->mfc_pipeline);
 237
 238     return (struct hw_context *)encoder_context;
 239 }
 240
 241 struct hw_context *
 242 gen75_enc_hw_context_init(VADriverContextP ctx, struct object_config *obj_config)
 243 {
 244     struct intel_driver_data *intel = intel_driver_data(ctx);
 245     struct intel_encoder_context *encoder_context = calloc(1, sizeof(struct intel_encoder_context));
 246     int i;
 247
 248     encoder_context->base.destroy = intel_encoder_context_destroy;
 249     encoder_context->base.run = intel_encoder_end_picture;
 250     encoder_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0);
 251     encoder_context->input_yuv_surface = VA_INVALID_SURFACE;
 252     encoder_context->is_tmp_id = 0;
 253     encoder_context->rate_control_mode = VA_RC_NONE;
 254     encoder_context->profile = obj_config->profile;
 255
 256     for (i = 0; i < obj_config->num_attribs; i++) {
 257         if (obj_config->attrib_list[i].type == VAConfigAttribRateControl) {
 258             encoder_context->rate_control_mode = obj_config->attrib_list[i].value;
 259             break;
 260         }
 261     }
 262
 263     gen75_vme_context_init(ctx, encoder_context);
 264     assert(encoder_context->vme_context);
 265     assert(encoder_context->vme_context_destroy);
 266     assert(encoder_context->vme_pipeline);
 267
 268     gen75_mfc_context_init(ctx, encoder_context);
 269     assert(encoder_context->mfc_context);
 270     assert(encoder_context->mfc_context_destroy);
 271     assert(encoder_context->mfc_pipeline);
 272
 273     return (struct hw_context *)encoder_context;
 274 }