Check the max resolution supported by hardware when create VA context
[platform/upstream/libva-intel-driver.git] / src / i965_drv_video.h
1 /*
2  * Copyright © 2009 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the
6  * "Software"), to deal in the Software without restriction, including
7  * without limitation the rights to use, copy, modify, merge, publish,
8  * distribute, sub license, and/or sell copies of the Software, and to
9  * permit persons to whom the Software is furnished to do so, subject to
10  * the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the
13  * next paragraph) shall be included in all copies or substantial portions
14  * of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *    Xiang Haihao <haihao.xiang@intel.com>
26  *    Zou Nan hai <nanhai.zou@intel.com>
27  *
28  */
29
30 #ifndef _I965_DRV_VIDEO_H_
31 #define _I965_DRV_VIDEO_H_
32
33 #include <va/va.h>
34 #include <va/va_enc_h264.h>
35 #include <va/va_vpp.h>
36 #include <va/va_backend.h>
37 #include <va/va_backend_vpp.h>
38
39 #include "i965_mutext.h"
40 #include "object_heap.h"
41 #include "intel_driver.h"
42
43 #define I965_MAX_PROFILES                       11
44 #define I965_MAX_ENTRYPOINTS                    5
45 #define I965_MAX_CONFIG_ATTRIBUTES              10
46 #define I965_MAX_IMAGE_FORMATS                  3
47 #define I965_MAX_SUBPIC_FORMATS                 4
48 #define I965_MAX_DISPLAY_ATTRIBUTES             4
49
50 #define INTEL_STR_DRIVER_VENDOR                 "Intel"
51 #define INTEL_STR_DRIVER_NAME                   "i965"
52
53 #define I965_SURFACE_TYPE_IMAGE                 0
54 #define I965_SURFACE_TYPE_SURFACE               1
55
56 #define I965_SURFACE_FLAG_FRAME                 0x00000000
57 #define I965_SURFACE_FLAG_TOP_FIELD_FIRST       0x00000001
58 #define I965_SURFACE_FLAG_BOTTOME_FIELD_FIRST   0x00000002
59
60 struct i965_surface
61 {
62     VAGenericID id;
63     int type;
64     int flags;
65 };
66
67 struct i965_kernel 
68 {
69     char *name;
70     int interface;
71     const uint32_t (*bin)[4];
72     int size;
73     dri_bo *bo;
74 };
75
76 struct buffer_store
77 {
78     unsigned char *buffer;
79     dri_bo *bo;
80     int ref_count;
81     int num_elements;
82 };
83     
84 struct object_config 
85 {
86     struct object_base base;
87     VAProfile profile;
88     VAEntrypoint entrypoint;
89     VAConfigAttrib attrib_list[I965_MAX_CONFIG_ATTRIBUTES];
90     int num_attribs;
91 };
92
93 #define NUM_SLICES     10
94
95 struct decode_state
96 {
97     struct buffer_store *pic_param;
98     struct buffer_store **slice_params;
99     struct buffer_store *iq_matrix;
100     struct buffer_store *bit_plane;
101     struct buffer_store *huffman_table;
102     struct buffer_store **slice_datas;
103     VASurfaceID current_render_target;
104     int max_slice_params;
105     int max_slice_datas;
106     int num_slice_params;
107     int num_slice_datas;
108 };
109
110 struct encode_state
111 {
112     struct buffer_store *seq_param;
113     struct buffer_store *pic_param;
114     struct buffer_store *pic_control;
115     struct buffer_store *iq_matrix;
116     struct buffer_store *q_matrix;
117     struct buffer_store **slice_params;
118     int max_slice_params;
119     int num_slice_params;
120
121     /* for ext */
122     struct buffer_store *seq_param_ext;
123     struct buffer_store *pic_param_ext;
124     struct buffer_store *packed_header_param[4];
125     struct buffer_store *packed_header_data[4];
126     struct buffer_store **slice_params_ext;
127     int max_slice_params_ext;
128     int num_slice_params_ext;
129     int last_packed_header_type;
130
131     struct buffer_store *misc_param[8];
132
133     VASurfaceID current_render_target;
134 };
135
136 struct proc_state
137 {
138     struct buffer_store *pipeline_param;
139
140     VASurfaceID current_render_target;
141 };
142
143 #define CODEC_DEC       0
144 #define CODEC_ENC       1
145 #define CODEC_PROC      2
146
147 union codec_state
148 {
149     struct decode_state decode;
150     struct encode_state encode;
151     struct proc_state proc;
152 };
153
154 struct hw_context
155 {
156     void (*run)(VADriverContextP ctx, 
157                 VAProfile profile, 
158                 union codec_state *codec_state,
159                 struct hw_context *hw_context);
160     void (*destroy)(void *);
161     struct intel_batchbuffer *batch;
162 };
163
164 struct object_context 
165 {
166     struct object_base base;
167     VAContextID context_id;
168     VAConfigID config_id;
169     VASurfaceID *render_targets;                //input->encode, output->decode
170     int num_render_targets;
171     int picture_width;
172     int picture_height;
173     int flags;
174     int codec_type;
175     union codec_state codec_state;
176     struct hw_context *hw_context;
177 };
178
179 #define SURFACE_REFERENCED      (1 << 0)
180 #define SURFACE_DISPLAYED       (1 << 1)
181 #define SURFACE_DERIVED         (1 << 2)
182 #define SURFACE_REF_DIS_MASK    ((SURFACE_REFERENCED) | \
183                                  (SURFACE_DISPLAYED))
184 #define SURFACE_ALL_MASK        ((SURFACE_REFERENCED) | \
185                                  (SURFACE_DISPLAYED) |  \
186                                  (SURFACE_DERIVED))
187
188 struct object_surface 
189 {
190     struct object_base base;
191     VASurfaceStatus status;
192     VASubpictureID subpic;
193     int width;
194     int height;
195     int size;
196     int orig_width;
197     int orig_height;
198     int flags;
199     unsigned int fourcc;    
200     dri_bo *bo;
201     VAImageID locked_image_id;
202     void (*free_private_data)(void **data);
203     void *private_data;
204     unsigned int subsampling;
205     int x_cb_offset;
206     int y_cb_offset;
207     int x_cr_offset;
208     int y_cr_offset;
209     int cb_cr_width;
210     int cb_cr_height;
211     int cb_cr_pitch;
212 };
213
214 struct object_buffer 
215 {
216     struct object_base base;
217     struct buffer_store *buffer_store;
218     int max_num_elements;
219     int num_elements;
220     int size_element;
221     VABufferType type;
222 };
223
224 struct object_image 
225 {
226     struct object_base base;
227     VAImage image;
228     dri_bo *bo;
229     unsigned int *palette;
230     VASurfaceID derived_surface;
231 };
232
233 struct object_subpic 
234 {
235     struct object_base base;
236     VAImageID image;
237     VARectangle src_rect;
238     VARectangle dst_rect;
239     unsigned int format;
240     int width;
241     int height;
242     int pitch;
243     dri_bo *bo;
244     unsigned int flags;
245 };
246
247 struct hw_codec_info
248 {
249     struct hw_context *(*dec_hw_context_init)(VADriverContextP, struct object_config *);
250     struct hw_context *(*enc_hw_context_init)(VADriverContextP, struct object_config *);
251     struct hw_context *(*proc_hw_context_init)(VADriverContextP, struct object_config *);
252     int max_width;
253     int max_height;
254 };
255
256
257 #include "i965_render.h"
258
259 struct i965_driver_data 
260 {
261     struct intel_driver_data intel;
262     struct object_heap config_heap;
263     struct object_heap context_heap;
264     struct object_heap surface_heap;
265     struct object_heap buffer_heap;
266     struct object_heap image_heap;
267     struct object_heap subpic_heap;
268     struct hw_codec_info *codec_info;
269
270     _I965Mutex render_mutex;
271     _I965Mutex pp_mutex;
272     struct intel_batchbuffer *batch;
273     struct i965_render_state render_state;
274     void *pp_context;
275     char va_vendor[256];
276     
277     VAContextID current_context_id;
278 };
279
280 #define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);
281 #define NEW_CONTEXT_ID() object_heap_allocate(&i965->context_heap);
282 #define NEW_SURFACE_ID() object_heap_allocate(&i965->surface_heap);
283 #define NEW_BUFFER_ID() object_heap_allocate(&i965->buffer_heap);
284 #define NEW_IMAGE_ID() object_heap_allocate(&i965->image_heap);
285 #define NEW_SUBPIC_ID() object_heap_allocate(&i965->subpic_heap);
286
287 #define CONFIG(id) ((struct object_config *)object_heap_lookup(&i965->config_heap, id))
288 #define CONTEXT(id) ((struct object_context *)object_heap_lookup(&i965->context_heap, id))
289 #define SURFACE(id) ((struct object_surface *)object_heap_lookup(&i965->surface_heap, id))
290 #define BUFFER(id) ((struct object_buffer *)object_heap_lookup(&i965->buffer_heap, id))
291 #define IMAGE(id) ((struct object_image *)object_heap_lookup(&i965->image_heap, id))
292 #define SUBPIC(id) ((struct object_subpic *)object_heap_lookup(&i965->subpic_heap, id))
293
294 #define FOURCC_IA44 0x34344149
295 #define FOURCC_AI44 0x34344941
296
297 #define STRIDE(w)               (((w) + 0xf) & ~0xf)
298 #define SIZE_YUV420(w, h)       (h * (STRIDE(w) + STRIDE(w >> 1)))
299
300 static INLINE struct i965_driver_data *
301 i965_driver_data(VADriverContextP ctx)
302 {
303     return (struct i965_driver_data *)(ctx->pDriverData);
304 }
305
306 void 
307 i965_check_alloc_surface_bo(VADriverContextP ctx,
308                             struct object_surface *obj_surface,
309                             int tiled,
310                             unsigned int fourcc,
311                             unsigned int subsampling);
312
313 #endif /* _I965_DRV_VIDEO_H_ */