2 * Copyright © 2009 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Xiang Haihao <haihao.xiang@intel.com>
26 * Zou Nan hai <nanhai.zou@intel.com>
30 #ifndef _I965_DRV_VIDEO_H_
31 #define _I965_DRV_VIDEO_H_
34 #include <va/va_enc_h264.h>
35 #include <va/va_enc_mpeg2.h>
36 #include <va/va_vpp.h>
37 #include <va/va_backend.h>
38 #include <va/va_backend_vpp.h>
40 #include "i965_mutext.h"
41 #include "object_heap.h"
42 #include "intel_driver.h"
43 #include "i965_fourcc.h"
45 #define I965_MAX_PROFILES 20
46 #define I965_MAX_ENTRYPOINTS 5
47 #define I965_MAX_CONFIG_ATTRIBUTES 10
48 #define I965_MAX_IMAGE_FORMATS 10
49 #define I965_MAX_SUBPIC_FORMATS 6
50 #define I965_MAX_SUBPIC_SUM 4
51 #define I965_MAX_SURFACE_ATTRIBUTES 16
53 #define INTEL_STR_DRIVER_VENDOR "Intel"
54 #define INTEL_STR_DRIVER_NAME "i965"
56 #define I965_SURFACE_TYPE_IMAGE 0
57 #define I965_SURFACE_TYPE_SURFACE 1
59 #define I965_SURFACE_FLAG_FRAME 0x00000000
60 #define I965_SURFACE_FLAG_TOP_FIELD_FIRST 0x00000001
61 #define I965_SURFACE_FLAG_BOTTOME_FIELD_FIRST 0x00000002
63 #define DEFAULT_BRIGHTNESS 0
64 #define DEFAULT_CONTRAST 50
66 #define DEFAULT_SATURATION 50
68 #define ENCODER_QUALITY_RANGE 2
69 #define ENCODER_DEFAULT_QUALITY 1
70 #define ENCODER_HIGH_QUALITY ENCODER_DEFAULT_QUALITY
71 #define ENCODER_LOW_QUALITY 2
75 struct object_base *base;
84 const uint32_t (*bin)[4];
87 unsigned int kernel_offset;
92 unsigned char *buffer;
100 struct object_base base;
102 VAEntrypoint entrypoint;
103 VAConfigAttrib attrib_list[I965_MAX_CONFIG_ATTRIBUTES];
107 #define NUM_SLICES 10
109 struct codec_state_base {
110 uint32_t chroma_formats;
115 struct codec_state_base base;
116 struct buffer_store *pic_param;
117 struct buffer_store **slice_params;
118 struct buffer_store *iq_matrix;
119 struct buffer_store *bit_plane;
120 struct buffer_store *huffman_table;
121 struct buffer_store **slice_datas;
122 struct buffer_store *probability_data;
123 VASurfaceID current_render_target;
124 int max_slice_params;
126 int num_slice_params;
129 struct object_surface *render_object;
130 struct object_surface *reference_objects[16]; /* Up to 2 reference surfaces are valid for MPEG-2,*/
133 #define SLICE_PACKED_DATA_INDEX_TYPE 0x80000000
134 #define SLICE_PACKED_DATA_INDEX_MASK 0x00FFFFFF
138 struct codec_state_base base;
139 struct buffer_store *seq_param;
140 struct buffer_store *pic_param;
141 struct buffer_store *pic_control;
142 struct buffer_store *iq_matrix;
143 struct buffer_store *q_matrix;
144 struct buffer_store **slice_params;
145 int max_slice_params;
146 int num_slice_params;
149 struct buffer_store *seq_param_ext;
150 struct buffer_store *pic_param_ext;
151 struct buffer_store *packed_header_param[4];
152 struct buffer_store *packed_header_data[4];
153 struct buffer_store **slice_params_ext;
154 int max_slice_params_ext;
155 int num_slice_params_ext;
157 /* Check the user-configurable packed_header attribute.
158 * Currently it is mainly used to check whether the packed slice_header data
159 * is provided by user or the driver.
160 * TBD: It will check for the packed SPS/PPS/MISC/RAWDATA and so on.
162 unsigned int packed_header_flag;
163 /* For the packed data that needs to be inserted into video clip */
164 /* currently it is mainly to track packed raw data and packed slice_header data. */
165 struct buffer_store **packed_header_params_ext;
166 int max_packed_header_params_ext;
167 int num_packed_header_params_ext;
168 struct buffer_store **packed_header_data_ext;
169 int max_packed_header_data_ext;
170 int num_packed_header_data_ext;
172 /* the index of current slice */
174 /* the array is determined by max_slice_params_ext */
176 /* This is to store the first index of packed data for one slice */
177 int *slice_rawdata_index;
178 /* This is to store the number of packed data for one slice.
179 * Both packed rawdata and slice_header data are tracked by this
180 * this variable. That is to say: When one packed slice_header is parsed,
181 * this variable will also be increased.
183 int *slice_rawdata_count;
185 /* This is to store the index of packed slice header for one slice */
186 int *slice_header_index;
188 int last_packed_header_type;
190 struct buffer_store *misc_param[16];
192 VASurfaceID current_render_target;
193 struct object_surface *input_yuv_object;
194 struct object_surface *reconstructed_object;
195 struct object_buffer *coded_buf_object;
196 struct object_surface *reference_objects[16]; /* Up to 2 reference surfaces are valid for MPEG-2,*/
201 struct codec_state_base base;
202 struct buffer_store *pipeline_param;
204 VASurfaceID current_render_target;
213 struct codec_state_base base;
214 struct decode_state decode;
215 struct encode_state encode;
216 struct proc_state proc;
221 VAStatus (*run)(VADriverContextP ctx,
223 union codec_state *codec_state,
224 struct hw_context *hw_context);
225 void (*destroy)(void *);
226 struct intel_batchbuffer *batch;
229 struct object_context
231 struct object_base base;
232 VAContextID context_id;
233 struct object_config *obj_config;
234 VASurfaceID *render_targets; //input->encode, output->decode
235 int num_render_targets;
240 union codec_state codec_state;
241 struct hw_context *hw_context;
244 #define SURFACE_REFERENCED (1 << 0)
245 #define SURFACE_DERIVED (1 << 2)
246 #define SURFACE_ALL_MASK ((SURFACE_REFERENCED) | \
249 struct object_surface
251 struct object_base base;
252 VASurfaceStatus status;
253 VASubpictureID subpic[I965_MAX_SUBPIC_SUM];
254 struct object_subpic *obj_subpic[I965_MAX_SUBPIC_SUM];
255 unsigned int subpic_render_idx;
257 int width; /* the pitch of plane 0 in bytes in horizontal direction */
258 int height; /* the pitch of plane 0 in bytes in vertical direction */
260 int orig_width; /* the width of plane 0 in pixels */
261 int orig_height; /* the height of plane 0 in pixels */
265 VAImageID locked_image_id;
266 void (*free_private_data)(void **data);
268 unsigned int subsampling;
276 /* user specified attributes see: VASurfaceAttribExternalBuffers/VA_SURFACE_ATTRIB_MEM_TYPE_VA */
277 uint32_t user_disable_tiling : 1;
278 uint32_t user_h_stride_set : 1;
279 uint32_t user_v_stride_set : 1;
284 struct object_base base;
285 struct buffer_store *buffer_store;
286 int max_num_elements;
292 unsigned int export_refcount;
293 VABufferInfo export_state;
298 struct object_base base;
301 unsigned int *palette;
302 VASurfaceID derived_surface;
307 struct object_base base;
309 struct object_image *obj_image;
310 VARectangle src_rect;
311 VARectangle dst_rect;
321 #define I965_RING_NULL 0
322 #define I965_RING_BSD 1
323 #define I965_RING_BLT 2
324 #define I965_RING_VEBOX 3
328 VAProcFilterType type;
334 struct hw_context *(*dec_hw_context_init)(VADriverContextP, struct object_config *);
335 struct hw_context *(*enc_hw_context_init)(VADriverContextP, struct object_config *);
336 struct hw_context *(*proc_hw_context_init)(VADriverContextP, struct object_config *);
337 bool (*render_init)(VADriverContextP);
338 void (*post_processing_context_init)(VADriverContextP, void *, struct intel_batchbuffer *);
342 int min_linear_wpitch;
343 int min_linear_hpitch;
345 unsigned int h264_mvc_dec_profiles;
346 unsigned int h264_dec_chroma_formats;
347 unsigned int jpeg_dec_chroma_formats;
349 unsigned int has_mpeg2_decoding:1;
350 unsigned int has_mpeg2_encoding:1;
351 unsigned int has_h264_decoding:1;
352 unsigned int has_h264_encoding:1;
353 unsigned int has_vc1_decoding:1;
354 unsigned int has_vc1_encoding:1;
355 unsigned int has_jpeg_decoding:1;
356 unsigned int has_jpeg_encoding:1;
357 unsigned int has_vpp:1;
358 unsigned int has_accelerated_getimage:1;
359 unsigned int has_accelerated_putimage:1;
360 unsigned int has_tiled_surface:1;
361 unsigned int has_di_motion_adptive:1;
362 unsigned int has_di_motion_compensated:1;
363 unsigned int has_vp8_decoding:1;
364 unsigned int has_vp8_encoding:1;
365 unsigned int has_h264_mvc_encoding:1;
367 unsigned int num_filters;
368 struct i965_filter filters[VAProcFilterCount];
372 #include "i965_render.h"
374 struct i965_driver_data
376 struct intel_driver_data intel;
377 struct object_heap config_heap;
378 struct object_heap context_heap;
379 struct object_heap surface_heap;
380 struct object_heap buffer_heap;
381 struct object_heap image_heap;
382 struct object_heap subpic_heap;
383 const struct hw_codec_info *codec_info;
385 _I965Mutex render_mutex;
387 struct intel_batchbuffer *batch;
388 struct intel_batchbuffer *pp_batch;
389 struct i965_render_state render_state;
393 VADisplayAttribute *display_attributes;
394 unsigned int num_display_attributes;
395 VADisplayAttribute *rotation_attrib;
396 VADisplayAttribute *brightness_attrib;
397 VADisplayAttribute *contrast_attrib;
398 VADisplayAttribute *hue_attrib;
399 VADisplayAttribute *saturation_attrib;
400 VAContextID current_context_id;
402 /* VA/DRI (X11) specific data */
403 struct va_dri_output *dri_output;
405 /* VA/Wayland specific data */
406 struct va_wl_output *wl_output;
409 #define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);
410 #define NEW_CONTEXT_ID() object_heap_allocate(&i965->context_heap);
411 #define NEW_SURFACE_ID() object_heap_allocate(&i965->surface_heap);
412 #define NEW_BUFFER_ID() object_heap_allocate(&i965->buffer_heap);
413 #define NEW_IMAGE_ID() object_heap_allocate(&i965->image_heap);
414 #define NEW_SUBPIC_ID() object_heap_allocate(&i965->subpic_heap);
416 #define CONFIG(id) ((struct object_config *)object_heap_lookup(&i965->config_heap, id))
417 #define CONTEXT(id) ((struct object_context *)object_heap_lookup(&i965->context_heap, id))
418 #define SURFACE(id) ((struct object_surface *)object_heap_lookup(&i965->surface_heap, id))
419 #define BUFFER(id) ((struct object_buffer *)object_heap_lookup(&i965->buffer_heap, id))
420 #define IMAGE(id) ((struct object_image *)object_heap_lookup(&i965->image_heap, id))
421 #define SUBPIC(id) ((struct object_subpic *)object_heap_lookup(&i965->subpic_heap, id))
423 #define FOURCC_IA44 0x34344149
424 #define FOURCC_AI44 0x34344941
426 #define STRIDE(w) (((w) + 0xf) & ~0xf)
427 #define SIZE_YUV420(w, h) (h * (STRIDE(w) + STRIDE(w >> 1)))
429 static INLINE struct i965_driver_data *
430 i965_driver_data(VADriverContextP ctx)
432 return (struct i965_driver_data *)(ctx->pDriverData);
436 i965_check_alloc_surface_bo(VADriverContextP ctx,
437 struct object_surface *obj_surface,
440 unsigned int subsampling);
443 va_enc_packed_type_to_idx(int packed_type);
445 /* reserve 2 byte for internal using */
447 #define CODEC_MPEG2 1
448 #define CODEC_H264_MVC 2
450 #define H264_DELIMITER0 0x00
451 #define H264_DELIMITER1 0x00
452 #define H264_DELIMITER2 0x00
453 #define H264_DELIMITER3 0x00
454 #define H264_DELIMITER4 0x00
456 #define MPEG2_DELIMITER0 0x00
457 #define MPEG2_DELIMITER1 0x00
458 #define MPEG2_DELIMITER2 0x00
459 #define MPEG2_DELIMITER3 0x00
460 #define MPEG2_DELIMITER4 0xb0
462 struct i965_coded_buffer_segment
464 VACodedBufferSegment base;
465 unsigned char mapped;
469 #define I965_CODEDBUFFER_HEADER_SIZE ALIGN(sizeof(struct i965_coded_buffer_segment), 64)
471 extern VAStatus i965_MapBuffer(VADriverContextP ctx,
472 VABufferID buf_id, /* in */
473 void **pbuf); /* out */
475 extern VAStatus i965_UnmapBuffer(VADriverContextP ctx, VABufferID buf_id);
477 extern VAStatus i965_DestroySurfaces(VADriverContextP ctx,
478 VASurfaceID *surface_list,
481 extern VAStatus i965_CreateSurfaces(VADriverContextP ctx,
486 VASurfaceID *surfaces);
488 #define I965_SURFACE_MEM_NATIVE 0
489 #define I965_SURFACE_MEM_GEM_FLINK 1
490 #define I965_SURFACE_MEM_DRM_PRIME 2
493 i965_destroy_surface_storage(struct object_surface *obj_surface);
495 #endif /* _I965_DRV_VIDEO_H_ */