Guess the format of a VA surface in vaDeriveImage()
[platform/upstream/libva-intel-driver.git] / src / i965_drv_video.h
1 /*
2  * Copyright © 2009 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the
6  * "Software"), to deal in the Software without restriction, including
7  * without limitation the rights to use, copy, modify, merge, publish,
8  * distribute, sub license, and/or sell copies of the Software, and to
9  * permit persons to whom the Software is furnished to do so, subject to
10  * the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the
13  * next paragraph) shall be included in all copies or substantial portions
14  * of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *    Xiang Haihao <haihao.xiang@intel.com>
26  *    Zou Nan hai <nanhai.zou@intel.com>
27  *
28  */
29
30 #ifndef _I965_DRV_VIDEO_H_
31 #define _I965_DRV_VIDEO_H_
32
33 #include <va/va.h>
34 #include <va/va_backend.h>
35
36 #include "i965_mutext.h"
37 #include "object_heap.h"
38 #include "intel_driver.h"
39
40 #define I965_MAX_PROFILES                       11
41 #define I965_MAX_ENTRYPOINTS                    5
42 #define I965_MAX_CONFIG_ATTRIBUTES              10
43 #define I965_MAX_IMAGE_FORMATS                  3
44 #define I965_MAX_SUBPIC_FORMATS                 4
45 #define I965_MAX_DISPLAY_ATTRIBUTES             4
46
47 #define INTEL_STR_DRIVER_VENDOR                 "Intel"
48 #define INTEL_STR_DRIVER_NAME                   "i965"
49
50 #define I965_SURFACE_TYPE_IMAGE                 0
51 #define I965_SURFACE_TYPE_SURFACE               1
52
53 #define I965_SURFACE_FLAG_FRAME                 0x00000000
54 #define I965_SURFACE_FLAG_TOP_FIELD_FIRST       0x00000001
55 #define I965_SURFACE_FLAG_BOTTOME_FIELD_FIRST   0x00000002
56
57 struct i965_surface
58 {
59     VAGenericID id;
60     int type;
61     int flags;
62 };
63
64 struct i965_kernel 
65 {
66     char *name;
67     int interface;
68     const uint32_t (*bin)[4];
69     int size;
70     dri_bo *bo;
71 };
72
73 struct buffer_store
74 {
75     unsigned char *buffer;
76     dri_bo *bo;
77     int ref_count;
78     int num_elements;
79 };
80     
81 struct object_config 
82 {
83     struct object_base base;
84     VAProfile profile;
85     VAEntrypoint entrypoint;
86     VAConfigAttrib attrib_list[I965_MAX_CONFIG_ATTRIBUTES];
87     int num_attribs;
88 };
89
90 #define NUM_SLICES     10
91
92 struct decode_state
93 {
94     struct buffer_store *pic_param;
95     struct buffer_store **slice_params;
96     struct buffer_store *iq_matrix;
97     struct buffer_store *bit_plane;
98     struct buffer_store *huffman_table;
99     struct buffer_store **slice_datas;
100     VASurfaceID current_render_target;
101     int max_slice_params;
102     int max_slice_datas;
103     int num_slice_params;
104     int num_slice_datas;
105 };
106
107 struct encode_state
108 {
109     struct buffer_store *seq_param;
110     struct buffer_store *pic_param;
111     struct buffer_store *pic_control;
112     struct buffer_store *iq_matrix;
113     struct buffer_store *q_matrix;
114     struct buffer_store **slice_params;
115     int max_slice_params;
116     int num_slice_params;
117
118     /* for ext */
119     struct buffer_store *seq_param_ext;
120     struct buffer_store *pic_param_ext;
121     struct buffer_store *dec_ref_pic_marking;
122     struct buffer_store *packed_header_param[4];
123     struct buffer_store *packed_header_data[4];
124     struct buffer_store **slice_params_ext;
125     int max_slice_params_ext;
126     int num_slice_params_ext;
127     int last_packed_header_type;
128
129     VASurfaceID current_render_target;
130 };
131
132 struct proc_state
133 {
134     struct buffer_store *pipeline_param;
135     struct buffer_store *input_param;
136     struct buffer_store *filter_param[VA_PROC_PIPELINE_MAX_NUM_FILTERS];
137
138     VASurfaceID current_render_target;
139 };
140
141 #define CODEC_DEC       0
142 #define CODEC_ENC       1
143 #define CODEC_PROC      2
144
145 union codec_state
146 {
147     struct decode_state decode;
148     struct encode_state encode;
149     struct proc_state proc;
150 };
151
152 struct hw_context
153 {
154     void (*run)(VADriverContextP ctx, 
155                 VAProfile profile, 
156                 union codec_state *codec_state,
157                 struct hw_context *hw_context);
158     void (*destroy)(void *);
159     struct intel_batchbuffer *batch;
160 };
161
162 struct object_context 
163 {
164     struct object_base base;
165     VAContextID context_id;
166     VAConfigID config_id;
167     VASurfaceID *render_targets;                //input->encode, output->decode
168     int num_render_targets;
169     int picture_width;
170     int picture_height;
171     int flags;
172     int codec_type;
173     union codec_state codec_state;
174     struct hw_context *hw_context;
175 };
176
177 #define SURFACE_REFERENCED      (1 << 0)
178 #define SURFACE_DISPLAYED       (1 << 1)
179 #define SURFACE_DERIVED         (1 << 2)
180 #define SURFACE_REF_DIS_MASK    ((SURFACE_REFERENCED) | \
181                                  (SURFACE_DISPLAYED))
182 #define SURFACE_ALL_MASK        ((SURFACE_REFERENCED) | \
183                                  (SURFACE_DISPLAYED) |  \
184                                  (SURFACE_DERIVED))
185
186 struct object_surface 
187 {
188     struct object_base base;
189     VASurfaceStatus status;
190     VASubpictureID subpic;
191     int width;
192     int height;
193     int size;
194     int orig_width;
195     int orig_height;
196     int flags;
197     unsigned int fourcc;    
198     dri_bo *bo;
199     VAImageID locked_image_id;
200     void (*free_private_data)(void **data);
201     void *private_data;
202     unsigned int subsampling;
203     int x_cb_offset;
204     int y_cb_offset;
205     int x_cr_offset;
206     int y_cr_offset;
207     int cb_cr_width;
208     int cb_cr_height;
209     int cb_cr_pitch;
210 };
211
212 struct object_buffer 
213 {
214     struct object_base base;
215     struct buffer_store *buffer_store;
216     int max_num_elements;
217     int num_elements;
218     int size_element;
219     VABufferType type;
220 };
221
222 struct object_image 
223 {
224     struct object_base base;
225     VAImage image;
226     dri_bo *bo;
227     unsigned int *palette;
228     VASurfaceID derived_surface;
229 };
230
231 struct object_subpic 
232 {
233     struct object_base base;
234     VAImageID image;
235     VARectangle src_rect;
236     VARectangle dst_rect;
237     unsigned int format;
238     int width;
239     int height;
240     int pitch;
241     dri_bo *bo;
242     unsigned int flags;
243 };
244
245 struct hw_codec_info
246 {
247     struct hw_context *(*dec_hw_context_init)(VADriverContextP, VAProfile);
248     struct hw_context *(*enc_hw_context_init)(VADriverContextP, VAProfile);
249     struct hw_context *(*proc_hw_context_init)(VADriverContextP, VAProfile);
250 };
251
252
253 #include "i965_render.h"
254
255 struct i965_driver_data 
256 {
257     struct intel_driver_data intel;
258     struct object_heap config_heap;
259     struct object_heap context_heap;
260     struct object_heap surface_heap;
261     struct object_heap buffer_heap;
262     struct object_heap image_heap;
263     struct object_heap subpic_heap;
264     struct hw_codec_info *codec_info;
265
266     _I965Mutex render_mutex;
267     struct intel_batchbuffer *batch;
268     struct i965_render_state render_state;
269     void *pp_context;
270     char va_vendor[256];
271     
272     VAContextID current_context_id;
273 };
274
275 #define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);
276 #define NEW_CONTEXT_ID() object_heap_allocate(&i965->context_heap);
277 #define NEW_SURFACE_ID() object_heap_allocate(&i965->surface_heap);
278 #define NEW_BUFFER_ID() object_heap_allocate(&i965->buffer_heap);
279 #define NEW_IMAGE_ID() object_heap_allocate(&i965->image_heap);
280 #define NEW_SUBPIC_ID() object_heap_allocate(&i965->subpic_heap);
281
282 #define CONFIG(id) ((struct object_config *)object_heap_lookup(&i965->config_heap, id))
283 #define CONTEXT(id) ((struct object_context *)object_heap_lookup(&i965->context_heap, id))
284 #define SURFACE(id) ((struct object_surface *)object_heap_lookup(&i965->surface_heap, id))
285 #define BUFFER(id) ((struct object_buffer *)object_heap_lookup(&i965->buffer_heap, id))
286 #define IMAGE(id) ((struct object_image *)object_heap_lookup(&i965->image_heap, id))
287 #define SUBPIC(id) ((struct object_subpic *)object_heap_lookup(&i965->subpic_heap, id))
288
289 #define FOURCC_IA44 0x34344149
290 #define FOURCC_AI44 0x34344941
291
292 #define STRIDE(w)               (((w) + 0xf) & ~0xf)
293 #define SIZE_YUV420(w, h)       (h * (STRIDE(w) + STRIDE(w >> 1)))
294
295 static INLINE struct i965_driver_data *
296 i965_driver_data(VADriverContextP ctx)
297 {
298     return (struct i965_driver_data *)(ctx->pDriverData);
299 }
300
301 void 
302 i965_check_alloc_surface_bo(VADriverContextP ctx,
303                             struct object_surface *obj_surface,
304                             int tiled,
305                             unsigned int fourcc,
306                             unsigned int subsampling);
307
308 #endif /* _I965_DRV_VIDEO_H_ */