2 * Copyright © 2009 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Xiang Haihao <haihao.xiang@intel.com>
26 * Zou Nan hai <nanhai.zou@intel.com>
30 #ifndef _I965_DRV_VIDEO_H_
31 #define _I965_DRV_VIDEO_H_
34 #include <va/va_enc_h264.h>
35 #include <va/va_enc_mpeg2.h>
36 #include <va/va_vpp.h>
37 #include <va/va_backend.h>
38 #include <va/va_backend_vpp.h>
40 #include "i965_mutext.h"
41 #include "object_heap.h"
42 #include "intel_driver.h"
44 #define I965_MAX_PROFILES 11
45 #define I965_MAX_ENTRYPOINTS 5
46 #define I965_MAX_CONFIG_ATTRIBUTES 10
47 #define I965_MAX_IMAGE_FORMATS 10
48 #define I965_MAX_SUBPIC_FORMATS 6
49 #define I965_MAX_SUBPIC_SUM 4
51 #define INTEL_STR_DRIVER_VENDOR "Intel"
52 #define INTEL_STR_DRIVER_NAME "i965"
54 #define I965_SURFACE_TYPE_IMAGE 0
55 #define I965_SURFACE_TYPE_SURFACE 1
57 #define I965_SURFACE_FLAG_FRAME 0x00000000
58 #define I965_SURFACE_FLAG_TOP_FIELD_FIRST 0x00000001
59 #define I965_SURFACE_FLAG_BOTTOME_FIELD_FIRST 0x00000002
63 struct object_base *base;
72 const uint32_t (*bin)[4];
79 unsigned char *buffer;
87 struct object_base base;
89 VAEntrypoint entrypoint;
90 VAConfigAttrib attrib_list[I965_MAX_CONFIG_ATTRIBUTES];
98 struct buffer_store *pic_param;
99 struct buffer_store **slice_params;
100 struct buffer_store *iq_matrix;
101 struct buffer_store *bit_plane;
102 struct buffer_store *huffman_table;
103 struct buffer_store **slice_datas;
104 VASurfaceID current_render_target;
105 int max_slice_params;
107 int num_slice_params;
110 struct object_surface *render_object;
111 struct object_surface *reference_objects[16]; /* Up to 2 reference surfaces are valid for MPEG-2,*/
116 struct buffer_store *seq_param;
117 struct buffer_store *pic_param;
118 struct buffer_store *pic_control;
119 struct buffer_store *iq_matrix;
120 struct buffer_store *q_matrix;
121 struct buffer_store **slice_params;
122 int max_slice_params;
123 int num_slice_params;
126 struct buffer_store *seq_param_ext;
127 struct buffer_store *pic_param_ext;
128 struct buffer_store *packed_header_param[4];
129 struct buffer_store *packed_header_data[4];
130 struct buffer_store **slice_params_ext;
131 int max_slice_params_ext;
132 int num_slice_params_ext;
133 int last_packed_header_type;
135 struct buffer_store *misc_param[8];
137 VASurfaceID current_render_target;
138 struct object_surface *input_yuv_object;
139 struct object_surface *reconstructed_object;
140 struct object_buffer *coded_buf_object;
141 struct object_surface *reference_objects[16]; /* Up to 2 reference surfaces are valid for MPEG-2,*/
146 struct buffer_store *pipeline_param;
148 VASurfaceID current_render_target;
157 struct decode_state decode;
158 struct encode_state encode;
159 struct proc_state proc;
164 VAStatus (*run)(VADriverContextP ctx,
166 union codec_state *codec_state,
167 struct hw_context *hw_context);
168 void (*destroy)(void *);
169 struct intel_batchbuffer *batch;
172 struct object_context
174 struct object_base base;
175 VAContextID context_id;
176 VAConfigID config_id;
177 VASurfaceID *render_targets; //input->encode, output->decode
178 int num_render_targets;
183 union codec_state codec_state;
184 struct hw_context *hw_context;
187 #define SURFACE_REFERENCED (1 << 0)
188 #define SURFACE_DISPLAYED (1 << 1)
189 #define SURFACE_DERIVED (1 << 2)
190 #define SURFACE_REF_DIS_MASK ((SURFACE_REFERENCED) | \
192 #define SURFACE_ALL_MASK ((SURFACE_REFERENCED) | \
193 (SURFACE_DISPLAYED) | \
196 struct object_surface
198 struct object_base base;
199 VASurfaceStatus status;
200 VASubpictureID subpic[I965_MAX_SUBPIC_SUM];
201 unsigned int subpic_render_idx;
211 VAImageID locked_image_id;
212 void (*free_private_data)(void **data);
214 unsigned int subsampling;
226 struct object_base base;
227 struct buffer_store *buffer_store;
228 int max_num_elements;
236 struct object_base base;
239 unsigned int *palette;
240 VASurfaceID derived_surface;
245 struct object_base base;
247 VARectangle src_rect;
248 VARectangle dst_rect;
260 struct hw_context *(*dec_hw_context_init)(VADriverContextP, struct object_config *);
261 struct hw_context *(*enc_hw_context_init)(VADriverContextP, struct object_config *);
262 struct hw_context *(*proc_hw_context_init)(VADriverContextP, struct object_config *);
266 unsigned int has_mpeg2_decoding:1;
267 unsigned int has_mpeg2_encoding:1;
268 unsigned int has_h264_decoding:1;
269 unsigned int has_h264_encoding:1;
270 unsigned int has_vc1_decoding:1;
271 unsigned int has_vc1_encoding:1;
272 unsigned int has_jpeg_decoding:1;
273 unsigned int has_jpeg_encoding:1;
274 unsigned int has_vpp:1;
275 unsigned int has_accelerated_getimage:1;
276 unsigned int has_accelerated_putimage:1;
277 unsigned int has_tiled_surface:1;
281 #include "i965_render.h"
283 struct i965_driver_data
285 struct intel_driver_data intel;
286 struct object_heap config_heap;
287 struct object_heap context_heap;
288 struct object_heap surface_heap;
289 struct object_heap buffer_heap;
290 struct object_heap image_heap;
291 struct object_heap subpic_heap;
292 struct hw_codec_info *codec_info;
294 _I965Mutex render_mutex;
296 struct intel_batchbuffer *batch;
297 struct i965_render_state render_state;
301 VADisplayAttribute *display_attributes;
302 unsigned int num_display_attributes;
303 VADisplayAttribute *rotation_attrib;
305 VAContextID current_context_id;
307 /* VA/DRI (X11) specific data */
308 struct va_dri_output *dri_output;
310 /* VA/Wayland specific data */
311 struct va_wl_output *wl_output;
314 #define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);
315 #define NEW_CONTEXT_ID() object_heap_allocate(&i965->context_heap);
316 #define NEW_SURFACE_ID() object_heap_allocate(&i965->surface_heap);
317 #define NEW_BUFFER_ID() object_heap_allocate(&i965->buffer_heap);
318 #define NEW_IMAGE_ID() object_heap_allocate(&i965->image_heap);
319 #define NEW_SUBPIC_ID() object_heap_allocate(&i965->subpic_heap);
321 #define CONFIG(id) ((struct object_config *)object_heap_lookup(&i965->config_heap, id))
322 #define CONTEXT(id) ((struct object_context *)object_heap_lookup(&i965->context_heap, id))
323 #define SURFACE(id) ((struct object_surface *)object_heap_lookup(&i965->surface_heap, id))
324 #define BUFFER(id) ((struct object_buffer *)object_heap_lookup(&i965->buffer_heap, id))
325 #define IMAGE(id) ((struct object_image *)object_heap_lookup(&i965->image_heap, id))
326 #define SUBPIC(id) ((struct object_subpic *)object_heap_lookup(&i965->subpic_heap, id))
328 #define FOURCC_IA44 0x34344149
329 #define FOURCC_AI44 0x34344941
331 #define STRIDE(w) (((w) + 0xf) & ~0xf)
332 #define SIZE_YUV420(w, h) (h * (STRIDE(w) + STRIDE(w >> 1)))
334 static INLINE struct i965_driver_data *
335 i965_driver_data(VADriverContextP ctx)
337 return (struct i965_driver_data *)(ctx->pDriverData);
341 i965_check_alloc_surface_bo(VADriverContextP ctx,
342 struct object_surface *obj_surface,
345 unsigned int subsampling);
348 va_enc_packed_type_to_idx(int packed_type);
350 /* reserve 2 byte for internal using */
352 #define CODED_MPEG2 1
354 #define H264_DELIMITER0 0x00
355 #define H264_DELIMITER1 0x00
356 #define H264_DELIMITER2 0x00
357 #define H264_DELIMITER3 0x00
358 #define H264_DELIMITER4 0x00
360 #define MPEG2_DELIMITER0 0x00
361 #define MPEG2_DELIMITER1 0x00
362 #define MPEG2_DELIMITER2 0x00
363 #define MPEG2_DELIMITER3 0x00
364 #define MPEG2_DELIMITER4 0xb0
366 struct i965_coded_buffer_segment
368 VACodedBufferSegment base;
369 unsigned char mapped;
373 #define I965_CODEDBUFFER_HEADER_SIZE ALIGN(sizeof(struct i965_coded_buffer_segment), 64)
376 extern VAStatus i965_MapBuffer(VADriverContextP ctx,
377 VABufferID buf_id, /* in */
378 void **pbuf); /* out */
380 extern VAStatus i965_UnmapBuffer(VADriverContextP ctx, VABufferID buf_id);
382 #endif /* _I965_DRV_VIDEO_H_ */