2 * Copyright (C) 2006-2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
28 #include "intel_batchbuffer.h"
29 #include "i965_drv_video.h"
30 #include "i965_decoder_utils.h"
31 #include "i965_defines.h"
33 /* Set reference surface if backing store exists */
36 struct i965_driver_data *i965,
37 GenFrameStore *ref_frame,
38 VASurfaceID va_surface,
39 struct object_surface *obj_surface
42 if (va_surface == VA_INVALID_ID)
45 if (!obj_surface || !obj_surface->bo)
48 ref_frame->surface_id = va_surface;
49 ref_frame->obj_surface = obj_surface;
53 /* Check wether codec layer incorrectly fills in slice_vertical_position */
55 mpeg2_wa_slice_vertical_position(
56 struct decode_state *decode_state,
57 VAPictureParameterBufferMPEG2 *pic_param
60 unsigned int i, j, mb_height, vpos, last_vpos = 0;
62 /* Assume progressive sequence if we got a progressive frame */
63 if (pic_param->picture_coding_extension.bits.progressive_frame)
66 /* Wait for a field coded picture */
67 if (pic_param->picture_coding_extension.bits.picture_structure == MPEG_FRAME)
70 assert(decode_state && decode_state->slice_params);
72 mb_height = (pic_param->vertical_size + 31) / 32;
74 for (j = 0; j < decode_state->num_slice_params; j++) {
75 struct buffer_store * const buffer_store =
76 decode_state->slice_params[j];
78 for (i = 0; i < buffer_store->num_elements; i++) {
79 VASliceParameterBufferMPEG2 * const slice_param =
80 ((VASliceParameterBufferMPEG2 *)buffer_store->buffer) + i;
82 vpos = slice_param->slice_vertical_position;
83 if (vpos >= mb_height || vpos == last_vpos + 2) {
84 WARN_ONCE("codec layer incorrectly fills in MPEG-2 slice_vertical_position. Workaround applied\n");
93 /* Build MPEG-2 reference frames array */
95 mpeg2_set_reference_surfaces(
97 GenFrameStore ref_frames[MAX_GEN_REFERENCE_FRAMES],
98 struct decode_state *decode_state,
99 VAPictureParameterBufferMPEG2 *pic_param
102 struct i965_driver_data * const i965 = i965_driver_data(ctx);
103 VASurfaceID va_surface;
104 unsigned pic_structure, is_second_field, n = 0;
105 struct object_surface *obj_surface;
107 pic_structure = pic_param->picture_coding_extension.bits.picture_structure;
108 is_second_field = pic_structure != MPEG_FRAME &&
109 !pic_param->picture_coding_extension.bits.is_first_field;
111 ref_frames[0].surface_id = VA_INVALID_ID;
112 ref_frames[0].obj_surface = NULL;
114 /* Reference frames are indexed by frame store ID (0:top, 1:bottom) */
115 switch (pic_param->picture_coding_type) {
117 if (is_second_field && pic_structure == MPEG_BOTTOM_FIELD) {
118 va_surface = decode_state->current_render_target;
119 obj_surface = decode_state->render_object;
120 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
122 va_surface = pic_param->forward_reference_picture;
123 obj_surface = decode_state->reference_objects[0];
124 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
128 va_surface = pic_param->forward_reference_picture;
129 obj_surface = decode_state->reference_objects[0];
130 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
131 va_surface = pic_param->backward_reference_picture;
132 obj_surface = decode_state->reference_objects[1];
133 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
138 ref_frames[n].obj_surface = ref_frames[0].obj_surface;
139 ref_frames[n++].surface_id = ref_frames[0].surface_id;
142 if (pic_param->picture_coding_extension.bits.frame_pred_frame_dct)
145 ref_frames[2].surface_id = VA_INVALID_ID;
146 ref_frames[2].obj_surface = NULL;
148 /* Bottom field pictures used as reference */
149 switch (pic_param->picture_coding_type) {
151 if (is_second_field && pic_structure == MPEG_TOP_FIELD) {
152 va_surface = decode_state->current_render_target;
153 obj_surface = decode_state->render_object;
154 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
156 va_surface = pic_param->forward_reference_picture;
157 obj_surface = decode_state->reference_objects[0];
158 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
162 va_surface = pic_param->forward_reference_picture;
163 obj_surface = decode_state->reference_objects[0];
164 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
165 va_surface = pic_param->backward_reference_picture;
166 obj_surface = decode_state->reference_objects[1];
167 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
172 ref_frames[n].obj_surface = ref_frames[2].obj_surface;
173 ref_frames[n++].surface_id = ref_frames[2].surface_id;
177 /* Ensure the supplied VA surface has valid storage for decoding the
180 avc_ensure_surface_bo(
181 VADriverContextP ctx,
182 struct decode_state *decode_state,
183 struct object_surface *obj_surface,
184 const VAPictureParameterBufferH264 *pic_param
188 uint32_t hw_fourcc, fourcc, subsample, chroma_format;
190 /* Validate chroma format */
191 switch (pic_param->seq_fields.bits.chroma_format_idc) {
193 fourcc = VA_FOURCC_Y800;
194 subsample = SUBSAMPLE_YUV400;
195 chroma_format = VA_RT_FORMAT_YUV400;
198 fourcc = VA_FOURCC_NV12;
199 subsample = SUBSAMPLE_YUV420;
200 chroma_format = VA_RT_FORMAT_YUV420;
203 return VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT;
206 /* Determine the HW surface format, bound to VA config needs */
207 if ((decode_state->base.chroma_formats & chroma_format) == chroma_format)
212 case VA_FOURCC_Y800: // Implement with an NV12 surface
213 if (decode_state->base.chroma_formats & VA_RT_FORMAT_YUV420) {
214 hw_fourcc = VA_FOURCC_NV12;
215 subsample = SUBSAMPLE_YUV420;
221 return VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT;
223 /* (Re-)allocate the underlying surface buffer store, if necessary */
224 if (!obj_surface->bo || obj_surface->fourcc != hw_fourcc) {
225 struct i965_driver_data * const i965 = i965_driver_data(ctx);
227 i965_destroy_surface_storage(obj_surface);
228 va_status = i965_check_alloc_surface_bo(ctx, obj_surface,
229 i965->codec_info->has_tiled_surface, hw_fourcc, subsample);
230 if (va_status != VA_STATUS_SUCCESS)
234 /* Fake chroma components if grayscale is implemented on top of NV12 */
235 if (fourcc == VA_FOURCC_Y800 && hw_fourcc == VA_FOURCC_NV12) {
236 const uint32_t uv_offset = obj_surface->width * obj_surface->height;
237 const uint32_t uv_size = obj_surface->width * obj_surface->height / 2;
239 drm_intel_gem_bo_map_gtt(obj_surface->bo);
240 memset(obj_surface->bo->virtual + uv_offset, 0x80, uv_size);
241 drm_intel_gem_bo_unmap_gtt(obj_surface->bo);
243 return VA_STATUS_SUCCESS;
246 /* Generate flat scaling matrices for H.264 decoding */
248 avc_gen_default_iq_matrix(VAIQMatrixBufferH264 *iq_matrix)
251 memset(&iq_matrix->ScalingList4x4, 16, sizeof(iq_matrix->ScalingList4x4));
254 memset(&iq_matrix->ScalingList8x8, 16, sizeof(iq_matrix->ScalingList8x8));
257 /* Get first macroblock bit offset for BSD, minus EPB count (AVC) */
258 /* XXX: slice_data_bit_offset does not account for EPB */
260 avc_get_first_mb_bit_offset(
261 dri_bo *slice_data_bo,
262 VASliceParameterBufferH264 *slice_param,
263 unsigned int mode_flag
266 unsigned int slice_data_bit_offset = slice_param->slice_data_bit_offset;
268 if (mode_flag == ENTROPY_CABAC)
269 slice_data_bit_offset = ALIGN(slice_data_bit_offset, 0x8);
270 return slice_data_bit_offset;
273 /* Get first macroblock bit offset for BSD, with EPB count (AVC) */
274 /* XXX: slice_data_bit_offset does not account for EPB */
276 avc_get_first_mb_bit_offset_with_epb(
277 dri_bo *slice_data_bo,
278 VASliceParameterBufferH264 *slice_param,
279 unsigned int mode_flag
282 unsigned int in_slice_data_bit_offset = slice_param->slice_data_bit_offset;
283 unsigned int out_slice_data_bit_offset;
284 unsigned int i, j, n, buf_size, data_size, header_size;
288 header_size = slice_param->slice_data_bit_offset / 8;
289 data_size = slice_param->slice_data_size - slice_param->slice_data_offset;
290 buf_size = (header_size * 3 + 1) / 2; // Max possible header size (x1.5)
292 if (buf_size > data_size)
293 buf_size = data_size;
295 buf = alloca(buf_size);
296 ret = dri_bo_get_subdata(
297 slice_data_bo, slice_param->slice_data_offset,
302 for (i = 2, j = 2, n = 0; i < buf_size && j < header_size; i++, j++) {
303 if (buf[i] == 0x03 && buf[i - 1] == 0x00 && buf[i - 2] == 0x00)
307 out_slice_data_bit_offset = in_slice_data_bit_offset + n * 8;
309 if (mode_flag == ENTROPY_CABAC)
310 out_slice_data_bit_offset = ALIGN(out_slice_data_bit_offset, 0x8);
311 return out_slice_data_bit_offset;
314 static inline uint8_t
315 get_ref_idx_state_1(const VAPictureH264 *va_pic, unsigned int frame_store_id)
317 const unsigned int is_long_term =
318 !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE);
319 const unsigned int is_top_field =
320 !!(va_pic->flags & VA_PICTURE_H264_TOP_FIELD);
321 const unsigned int is_bottom_field =
322 !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD);
324 return ((is_long_term << 6) |
325 ((is_top_field ^ is_bottom_field ^ 1) << 5) |
326 (frame_store_id << 1) |
327 ((is_top_field ^ 1) & is_bottom_field));
330 /* Fill in Reference List Entries (Gen5+: ILK, SNB, IVB) */
332 gen5_fill_avc_ref_idx_state(
334 const VAPictureH264 ref_list[32],
335 unsigned int ref_list_count,
336 const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
339 unsigned int i, n, frame_idx;
342 for (i = 0, n = 0; i < ref_list_count; i++) {
343 const VAPictureH264 * const va_pic = &ref_list[i];
345 if (va_pic->flags & VA_PICTURE_H264_INVALID)
349 for (frame_idx = 0; frame_idx < MAX_GEN_REFERENCE_FRAMES; frame_idx++) {
350 const GenFrameStore * const fs = &frame_store[frame_idx];
351 if (fs->surface_id != VA_INVALID_ID &&
352 fs->surface_id == va_pic->picture_id) {
359 state[n++] = get_ref_idx_state_1(va_pic, frame_idx);
361 WARN_ONCE("Invalid Slice reference frame list !!!. It is not included in DPB \n");
369 /* Emit Reference List Entries (Gen6+: SNB, IVB) */
371 gen6_send_avc_ref_idx_state_1(
372 struct intel_batchbuffer *batch,
374 const VAPictureH264 *ref_list,
375 unsigned int ref_list_count,
376 const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
379 uint8_t ref_idx_state[32];
381 BEGIN_BCS_BATCH(batch, 10);
382 OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | (10 - 2));
383 OUT_BCS_BATCH(batch, list);
384 gen5_fill_avc_ref_idx_state(
386 ref_list, ref_list_count,
389 intel_batchbuffer_data(batch, ref_idx_state, sizeof(ref_idx_state));
390 ADVANCE_BCS_BATCH(batch);
394 gen6_send_avc_ref_idx_state(
395 struct intel_batchbuffer *batch,
396 const VASliceParameterBufferH264 *slice_param,
397 const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
400 if (slice_param->slice_type == SLICE_TYPE_I ||
401 slice_param->slice_type == SLICE_TYPE_SI)
405 gen6_send_avc_ref_idx_state_1(
407 slice_param->RefPicList0, slice_param->num_ref_idx_l0_active_minus1 + 1,
411 if (slice_param->slice_type != SLICE_TYPE_B)
415 gen6_send_avc_ref_idx_state_1(
417 slice_param->RefPicList1, slice_param->num_ref_idx_l1_active_minus1 + 1,
423 intel_update_avc_frame_store_index(VADriverContextP ctx,
424 struct decode_state *decode_state,
425 VAPictureParameterBufferH264 *pic_param,
426 GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES])
430 assert(MAX_GEN_REFERENCE_FRAMES == ARRAY_ELEMS(pic_param->ReferenceFrames));
432 for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) {
435 if (frame_store[i].surface_id == VA_INVALID_ID ||
436 frame_store[i].obj_surface == NULL)
439 assert(frame_store[i].frame_store_id != -1);
441 for (j = 0; j < MAX_GEN_REFERENCE_FRAMES; j++) {
442 VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[j];
443 if (ref_pic->flags & VA_PICTURE_H264_INVALID)
446 if (frame_store[i].surface_id == ref_pic->picture_id) {
452 /* remove it from the internal DPB */
454 struct object_surface *obj_surface = frame_store[i].obj_surface;
456 obj_surface->flags &= ~SURFACE_REFERENCED;
458 if ((obj_surface->flags & SURFACE_ALL_MASK) == SURFACE_DISPLAYED) {
459 obj_surface->flags &= ~SURFACE_REF_DIS_MASK;
460 i965_destroy_surface_storage(obj_surface);
463 frame_store[i].surface_id = VA_INVALID_ID;
464 frame_store[i].frame_store_id = -1;
465 frame_store[i].obj_surface = NULL;
469 for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) {
470 VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[i];
473 if (ref_pic->flags & VA_PICTURE_H264_INVALID ||
474 ref_pic->picture_id == VA_INVALID_SURFACE ||
475 decode_state->reference_objects[i] == NULL)
478 for (j = 0; j < MAX_GEN_REFERENCE_FRAMES; j++) {
479 if (frame_store[j].surface_id == ref_pic->picture_id) {
485 /* add the new reference frame into the internal DPB */
489 struct object_surface *obj_surface = decode_state->reference_objects[i];
492 * Sometimes a dummy frame comes from the upper layer library, call i965_check_alloc_surface_bo()
493 * to ake sure the store buffer is allocated for this reference frame
495 avc_ensure_surface_bo(ctx, decode_state, obj_surface, pic_param);
499 /* Find a free frame store index */
500 for (j = 0; j < MAX_GEN_REFERENCE_FRAMES; j++) {
501 if (frame_store[j].surface_id == VA_INVALID_ID ||
502 frame_store[j].obj_surface == NULL) {
511 frame_store[j].surface_id = ref_pic->picture_id;
512 frame_store[j].frame_store_id = frame_idx;
513 frame_store[j].obj_surface = obj_surface;
515 WARN_ONCE("Not free slot for DPB reference list!!!\n");
523 intel_update_vc1_frame_store_index(VADriverContextP ctx,
524 struct decode_state *decode_state,
525 VAPictureParameterBufferVC1 *pic_param,
526 GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES])
528 struct object_surface *obj_surface;
531 obj_surface = decode_state->reference_objects[0];
533 if (pic_param->forward_reference_picture == VA_INVALID_ID ||
536 frame_store[0].surface_id = VA_INVALID_ID;
537 frame_store[0].obj_surface = NULL;
539 frame_store[0].surface_id = pic_param->forward_reference_picture;
540 frame_store[0].obj_surface = obj_surface;
543 obj_surface = decode_state->reference_objects[1];
545 if (pic_param->backward_reference_picture == VA_INVALID_ID ||
548 frame_store[1].surface_id = frame_store[0].surface_id;
549 frame_store[1].obj_surface = frame_store[0].obj_surface;
551 frame_store[1].surface_id = pic_param->backward_reference_picture;
552 frame_store[1].obj_surface = obj_surface;
554 for (i = 2; i < MAX_GEN_REFERENCE_FRAMES; i++) {
555 frame_store[i].surface_id = frame_store[i % 2].surface_id;
556 frame_store[i].obj_surface = frame_store[i % 2].obj_surface;
562 intel_update_vp8_frame_store_index(VADriverContextP ctx,
563 struct decode_state *decode_state,
564 VAPictureParameterBufferVP8 *pic_param,
565 GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES])
567 struct object_surface *obj_surface;
570 obj_surface = decode_state->reference_objects[0];
572 if (pic_param->last_ref_frame == VA_INVALID_ID ||
575 frame_store[0].surface_id = VA_INVALID_ID;
576 frame_store[0].obj_surface = NULL;
578 frame_store[0].surface_id = pic_param->last_ref_frame;
579 frame_store[0].obj_surface = obj_surface;
582 obj_surface = decode_state->reference_objects[1];
584 if (pic_param->golden_ref_frame == VA_INVALID_ID ||
587 frame_store[1].surface_id = frame_store[0].surface_id;
588 frame_store[1].obj_surface = frame_store[0].obj_surface;
590 frame_store[1].surface_id = pic_param->golden_ref_frame;
591 frame_store[1].obj_surface = obj_surface;
594 obj_surface = decode_state->reference_objects[2];
596 if (pic_param->alt_ref_frame == VA_INVALID_ID ||
599 frame_store[2].surface_id = frame_store[0].surface_id;
600 frame_store[2].obj_surface = frame_store[0].obj_surface;
602 frame_store[2].surface_id = pic_param->alt_ref_frame;
603 frame_store[2].obj_surface = obj_surface;
606 for (i = 3; i < MAX_GEN_REFERENCE_FRAMES; i++) {
607 frame_store[i].surface_id = frame_store[i % 2].surface_id;
608 frame_store[i].obj_surface = frame_store[i % 2].obj_surface;
614 intel_decoder_check_avc_parameter(VADriverContextP ctx,
615 VAProfile h264_profile,
616 struct decode_state *decode_state)
618 struct i965_driver_data *i965 = i965_driver_data(ctx);
619 VAPictureParameterBufferH264 *pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer;
620 struct object_surface *obj_surface;
623 assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID));
624 assert(pic_param->CurrPic.picture_id != VA_INVALID_SURFACE);
626 if (pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID ||
627 pic_param->CurrPic.picture_id == VA_INVALID_SURFACE)
630 assert(pic_param->CurrPic.picture_id == decode_state->current_render_target);
632 if (pic_param->CurrPic.picture_id != decode_state->current_render_target)
635 if ((h264_profile != VAProfileH264Baseline)) {
636 if (pic_param->num_slice_groups_minus1 ||
637 pic_param->pic_fields.bits.redundant_pic_cnt_present_flag) {
638 WARN_ONCE("Unsupported the FMO/ASO constraints!!!\n");
643 for (i = 0; i < 16; i++) {
644 if (pic_param->ReferenceFrames[i].flags & VA_PICTURE_H264_INVALID ||
645 pic_param->ReferenceFrames[i].picture_id == VA_INVALID_SURFACE)
648 obj_surface = SURFACE(pic_param->ReferenceFrames[i].picture_id);
654 if (!obj_surface->bo) { /* a reference frame without store buffer */
655 WARN_ONCE("Invalid reference frame!!!\n");
658 decode_state->reference_objects[i] = obj_surface;
663 decode_state->reference_objects[i] = NULL;
665 return VA_STATUS_SUCCESS;
668 return VA_STATUS_ERROR_INVALID_PARAMETER;
672 intel_decoder_check_mpeg2_parameter(VADriverContextP ctx,
673 struct decode_state *decode_state)
675 struct i965_driver_data *i965 = i965_driver_data(ctx);
676 VAPictureParameterBufferMPEG2 *pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer;
677 struct object_surface *obj_surface;
680 if (pic_param->picture_coding_type == MPEG_I_PICTURE) {
681 } else if (pic_param->picture_coding_type == MPEG_P_PICTURE) {
682 obj_surface = SURFACE(pic_param->forward_reference_picture);
684 if (!obj_surface || !obj_surface->bo)
685 decode_state->reference_objects[i++] = NULL;
687 decode_state->reference_objects[i++] = obj_surface;
688 } else if (pic_param->picture_coding_type == MPEG_B_PICTURE) {
689 obj_surface = SURFACE(pic_param->forward_reference_picture);
691 if (!obj_surface || !obj_surface->bo)
692 decode_state->reference_objects[i++] = NULL;
694 decode_state->reference_objects[i++] = obj_surface;
696 obj_surface = SURFACE(pic_param->backward_reference_picture);
698 if (!obj_surface || !obj_surface->bo)
699 decode_state->reference_objects[i++] = NULL;
701 decode_state->reference_objects[i++] = obj_surface;
706 decode_state->reference_objects[i] = NULL;
708 return VA_STATUS_SUCCESS;
711 return VA_STATUS_ERROR_INVALID_PARAMETER;
715 intel_decoder_check_vc1_parameter(VADriverContextP ctx,
716 struct decode_state *decode_state)
718 struct i965_driver_data *i965 = i965_driver_data(ctx);
719 VAPictureParameterBufferVC1 *pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer;
720 struct object_surface *obj_surface;
723 if (pic_param->sequence_fields.bits.interlace == 1 &&
724 pic_param->picture_fields.bits.frame_coding_mode != 0) { /* frame-interlace or field-interlace */
725 return VA_STATUS_ERROR_DECODING_ERROR;
728 if (pic_param->picture_fields.bits.picture_type == 0 ||
729 pic_param->picture_fields.bits.picture_type == 3) {
730 } else if (pic_param->picture_fields.bits.picture_type == 1 ||
731 pic_param->picture_fields.bits.picture_type == 4) {
732 obj_surface = SURFACE(pic_param->forward_reference_picture);
734 if (!obj_surface || !obj_surface->bo)
735 decode_state->reference_objects[i++] = NULL;
737 decode_state->reference_objects[i++] = obj_surface;
738 } else if (pic_param->picture_fields.bits.picture_type == 2) {
739 obj_surface = SURFACE(pic_param->forward_reference_picture);
741 if (!obj_surface || !obj_surface->bo)
742 decode_state->reference_objects[i++] = NULL;
744 decode_state->reference_objects[i++] = obj_surface;
746 obj_surface = SURFACE(pic_param->backward_reference_picture);
748 if (!obj_surface || !obj_surface->bo)
749 decode_state->reference_objects[i++] = NULL;
751 decode_state->reference_objects[i++] = obj_surface;
756 decode_state->reference_objects[i] = NULL;
758 return VA_STATUS_SUCCESS;
761 return VA_STATUS_ERROR_INVALID_PARAMETER;
765 intel_decoder_check_vp8_parameter(VADriverContextP ctx,
766 struct decode_state *decode_state)
768 struct i965_driver_data *i965 = i965_driver_data(ctx);
769 VAPictureParameterBufferVP8 *pic_param = (VAPictureParameterBufferVP8 *)decode_state->pic_param->buffer;
770 struct object_surface *obj_surface;
773 if (pic_param->last_ref_frame != VA_INVALID_SURFACE) {
774 obj_surface = SURFACE(pic_param->last_ref_frame);
776 if (obj_surface && obj_surface->bo)
777 decode_state->reference_objects[i++] = obj_surface;
779 decode_state->reference_objects[i++] = NULL;
782 if (pic_param->golden_ref_frame != VA_INVALID_SURFACE) {
783 obj_surface = SURFACE(pic_param->golden_ref_frame);
785 if (obj_surface && obj_surface->bo)
786 decode_state->reference_objects[i++] = obj_surface;
788 decode_state->reference_objects[i++] = NULL;
791 if (pic_param->alt_ref_frame != VA_INVALID_SURFACE) {
792 obj_surface = SURFACE(pic_param->alt_ref_frame);
794 if (obj_surface && obj_surface->bo)
795 decode_state->reference_objects[i++] = obj_surface;
797 decode_state->reference_objects[i++] = NULL;
801 decode_state->reference_objects[i] = NULL;
803 return VA_STATUS_SUCCESS;
807 intel_decoder_sanity_check_input(VADriverContextP ctx,
809 struct decode_state *decode_state)
811 struct i965_driver_data *i965 = i965_driver_data(ctx);
812 struct object_surface *obj_surface;
813 VAStatus vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER;
815 if (decode_state->current_render_target == VA_INVALID_SURFACE)
818 obj_surface = SURFACE(decode_state->current_render_target);
823 decode_state->render_object = obj_surface;
826 case VAProfileMPEG2Simple:
827 case VAProfileMPEG2Main:
828 vaStatus = intel_decoder_check_mpeg2_parameter(ctx, decode_state);
831 case VAProfileH264ConstrainedBaseline:
832 case VAProfileH264Main:
833 case VAProfileH264High:
834 vaStatus = intel_decoder_check_avc_parameter(ctx, profile, decode_state);
837 case VAProfileVC1Simple:
838 case VAProfileVC1Main:
839 case VAProfileVC1Advanced:
840 vaStatus = intel_decoder_check_vc1_parameter(ctx, decode_state);
843 case VAProfileJPEGBaseline:
844 vaStatus = VA_STATUS_SUCCESS;
847 case VAProfileVP8Version0_3:
848 vaStatus = intel_decoder_check_vp8_parameter(ctx, decode_state);
852 vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER;
861 * Return the next slice paramter
864 * slice_param: the current slice
865 * *group_idx & *element_idx the current slice position in slice groups
867 * Return the next slice parameter
868 * *group_idx & *element_idx the next slice position in slice groups,
869 * if the next slice is NULL, *group_idx & *element_idx will be ignored
871 VASliceParameterBufferMPEG2 *
872 intel_mpeg2_find_next_slice(struct decode_state *decode_state,
873 VAPictureParameterBufferMPEG2 *pic_param,
874 VASliceParameterBufferMPEG2 *slice_param,
878 VASliceParameterBufferMPEG2 *next_slice_param;
879 unsigned int width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16;
880 int j = *group_idx, i = *element_idx + 1;
882 for (; j < decode_state->num_slice_params; j++) {
883 for (; i < decode_state->slice_params[j]->num_elements; i++) {
884 next_slice_param = ((VASliceParameterBufferMPEG2 *)decode_state->slice_params[j]->buffer) + i;
886 if ((next_slice_param->slice_vertical_position * width_in_mbs + next_slice_param->slice_horizontal_position) >=
887 (slice_param->slice_vertical_position * width_in_mbs + slice_param->slice_horizontal_position)) {
891 return next_slice_param;
901 /* Ensure the segmentation buffer is large enough for the supplied
902 number of MBs, or re-allocate it */
904 intel_ensure_vp8_segmentation_buffer(VADriverContextP ctx, GenBuffer *buf,
905 unsigned int mb_width, unsigned int mb_height)
907 struct i965_driver_data * const i965 = i965_driver_data(ctx);
908 /* The segmentation map is a 64-byte aligned linear buffer, with
909 each cache line holding only 8 bits for 4 continuous MBs */
910 const unsigned int buf_size = ((mb_width + 3) / 4) * 64 * mb_height;
913 if (buf->bo && buf->bo->size >= buf_size)
915 drm_intel_bo_unreference(buf->bo);
919 buf->bo = drm_intel_bo_alloc(i965->intel.bufmgr, "segmentation map",
921 buf->valid = buf->bo != NULL;