src/i965_avc_bsd.c

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Xiang Haihao <haihao.xiang@intel.com>
  26  *
  27  */
  28 #include <stdio.h>
  29 #include <stdlib.h>
  30 #include <string.h>
  31 #include <assert.h>
  32
  33 #include "intel_batchbuffer.h"
  34 #include "intel_driver.h"
  35
  36 #include "i965_defines.h"
  37 #include "i965_drv_video.h"
  38 #include "i965_avc_bsd.h"
  39 #include "i965_media_h264.h"
  40 #include "i965_media.h"
  41 #include "i965_decoder_utils.h"
  42 #include "intel_media.h"
  43
  44 static void
  45 i965_avc_bsd_init_avc_bsd_surface(VADriverContextP ctx,
  46                                   struct object_surface *obj_surface,
  47                                   VAPictureParameterBufferH264 *pic_param,
  48                                   struct i965_h264_context *i965_h264_context)
  49 {
  50     struct i965_driver_data *i965 = i965_driver_data(ctx);
  51     GenAvcSurface *avc_bsd_surface = obj_surface->private_data;
  52
  53     obj_surface->free_private_data = gen_free_avc_surface;
  54
  55     if (!avc_bsd_surface) {
  56         avc_bsd_surface = calloc(sizeof(GenAvcSurface), 1);
  57         assert((obj_surface->size & 0x3f) == 0);
  58         obj_surface->private_data = avc_bsd_surface;
  59     }
  60
  61     avc_bsd_surface->dmv_bottom_flag = (pic_param->pic_fields.bits.field_pic_flag &&
  62                                         !pic_param->seq_fields.bits.direct_8x8_inference_flag);
  63
  64     if (avc_bsd_surface->dmv_top == NULL) {
  65         avc_bsd_surface->dmv_top = dri_bo_alloc(i965->intel.bufmgr,
  66                                                 "direct mv w/r buffer",
  67                                                 DMV_SIZE,
  68                                                 0x1000);
  69     }
  70
  71     if (avc_bsd_surface->dmv_bottom_flag &&
  72         avc_bsd_surface->dmv_bottom == NULL) {
  73         avc_bsd_surface->dmv_bottom = dri_bo_alloc(i965->intel.bufmgr,
  74                                                    "direct mv w/r buffer",
  75                                                    DMV_SIZE,
  76                                                    0x1000);
  77     }
  78 }
  79
  80 static void
  81 i965_bsd_ind_obj_base_address(VADriverContextP ctx,
  82                               struct decode_state *decode_state,
  83                               int slice,
  84                               struct i965_h264_context *i965_h264_context)
  85
  86 {
  87     struct intel_batchbuffer *batch = i965_h264_context->batch;
  88
  89     dri_bo *ind_bo = decode_state->slice_datas[slice]->bo;
  90
  91     BEGIN_BCS_BATCH(batch, 3);
  92     OUT_BCS_BATCH(batch, CMD_BSD_IND_OBJ_BASE_ADDR | (3 - 2));
  93     OUT_BCS_RELOC(batch, ind_bo,
  94                   I915_GEM_DOMAIN_INSTRUCTION, 0,
  95                   0);
  96     OUT_BCS_BATCH(batch, 0);
  97     ADVANCE_BCS_BATCH(batch);
  98 }
  99
 100 static void
 101 i965_avc_bsd_img_state(VADriverContextP ctx,
 102                        struct decode_state *decode_state,
 103                        struct i965_h264_context *i965_h264_context)
 104 {
 105     struct intel_batchbuffer *batch = i965_h264_context->batch;
 106     int qm_present_flag;
 107     int img_struct;
 108     int mbaff_frame_flag;
 109     unsigned int avc_it_command_header;
 110     unsigned int width_in_mbs, height_in_mbs;
 111     VAPictureParameterBufferH264 *pic_param;
 112
 113     if (decode_state->iq_matrix && decode_state->iq_matrix->buffer)
 114         qm_present_flag = 1;
 115     else
 116         qm_present_flag = 0; /* built-in QM matrices */
 117
 118     assert(decode_state->pic_param && decode_state->pic_param->buffer);
 119     pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer;
 120
 121     assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID));
 122
 123     if (pic_param->CurrPic.flags & VA_PICTURE_H264_TOP_FIELD)
 124         img_struct = 1;
 125     else if (pic_param->CurrPic.flags & VA_PICTURE_H264_BOTTOM_FIELD)
 126         img_struct = 3;
 127     else
 128         img_struct = 0;
 129
 130     if ((img_struct & 0x1) == 0x1) {
 131         assert(pic_param->pic_fields.bits.field_pic_flag == 0x1);
 132     } else {
 133         assert(pic_param->pic_fields.bits.field_pic_flag == 0x0);
 134     }
 135
 136     if (pic_param->seq_fields.bits.frame_mbs_only_flag) { /* a frame containing only frame macroblocks */
 137         assert(pic_param->seq_fields.bits.mb_adaptive_frame_field_flag == 0);
 138         assert(pic_param->pic_fields.bits.field_pic_flag == 0);
 139     } else {
 140         assert(pic_param->seq_fields.bits.direct_8x8_inference_flag == 1); /* see H.264 spec */
 141     }
 142
 143     mbaff_frame_flag = (pic_param->seq_fields.bits.mb_adaptive_frame_field_flag &&
 144                         !pic_param->pic_fields.bits.field_pic_flag);
 145
 146     width_in_mbs = ((pic_param->picture_width_in_mbs_minus1 + 1) & 0xff);
 147     height_in_mbs = ((pic_param->picture_height_in_mbs_minus1 + 1) & 0xff); /* frame height */
 148
 149     assert(!((width_in_mbs * height_in_mbs) & 0x8000)); /* hardware requirement */
 150
 151     /* BSD unit doesn't support 4:2:2 and 4:4:4 picture */
 152     assert(pic_param->seq_fields.bits.chroma_format_idc == 0 || /* monochrome picture */
 153            pic_param->seq_fields.bits.chroma_format_idc == 1);  /* 4:2:0 */
 154     assert(pic_param->seq_fields.bits.residual_colour_transform_flag == 0); /* only available for 4:4:4 */
 155
 156     avc_it_command_header = (CMD_MEDIA_OBJECT_EX | (12 - 2));
 157
 158     BEGIN_BCS_BATCH(batch, 6);
 159     OUT_BCS_BATCH(batch, CMD_AVC_BSD_IMG_STATE | (6 - 2));
 160     OUT_BCS_BATCH(batch,
 161                   ((width_in_mbs * height_in_mbs) & 0x7fff));
 162     OUT_BCS_BATCH(batch,
 163                   (height_in_mbs << 16) |
 164                   (width_in_mbs << 0));
 165     OUT_BCS_BATCH(batch,
 166                   ((pic_param->second_chroma_qp_index_offset & 0x1f) << 24) |
 167                   ((pic_param->chroma_qp_index_offset & 0x1f) << 16) |
 168                   (SCAN_RASTER_ORDER << 15) | /* AVC ILDB Data */
 169                   (SCAN_SPECIAL_ORDER << 14) | /* AVC IT Command */
 170                   (SCAN_RASTER_ORDER << 13) | /* AVC IT Data */
 171                   (1 << 12) | /* always 1, hardware requirement */
 172                   (qm_present_flag << 10) |
 173                   (img_struct << 8) |
 174                   (16 << 0)); /* FIXME: always support 16 reference frames ??? */
 175     OUT_BCS_BATCH(batch,
 176                   (RESIDUAL_DATA_OFFSET << 24) | /* residual data offset */
 177                   (0 << 17) | /* don't overwrite SRT */
 178                   (0 << 16) | /* Un-SRT (Unsynchronized Root Thread) */
 179                   (0 << 12) | /* FIXME: no 16MV ??? */
 180                   (pic_param->seq_fields.bits.chroma_format_idc << 10) |
 181                   (i965_h264_context->enable_avc_ildb << 8)  | /* Enable ILDB writing output */
 182                   (pic_param->pic_fields.bits.entropy_coding_mode_flag << 7) |
 183                   ((!pic_param->pic_fields.bits.reference_pic_flag) << 6) |
 184                   (pic_param->pic_fields.bits.constrained_intra_pred_flag << 5) |
 185                   (pic_param->seq_fields.bits.direct_8x8_inference_flag << 4) |
 186                   (pic_param->pic_fields.bits.transform_8x8_mode_flag << 3) |
 187                   (pic_param->seq_fields.bits.frame_mbs_only_flag << 2) |
 188                   (mbaff_frame_flag << 1) |
 189                   (pic_param->pic_fields.bits.field_pic_flag << 0));
 190     OUT_BCS_BATCH(batch, avc_it_command_header);
 191     ADVANCE_BCS_BATCH(batch);
 192 }
 193
 194 static void
 195 i965_avc_bsd_qm_state(VADriverContextP ctx,
 196                       struct decode_state *decode_state,
 197                       struct i965_h264_context *i965_h264_context)
 198 {
 199     struct intel_batchbuffer *batch = i965_h264_context->batch;
 200     int cmd_len;
 201     VAIQMatrixBufferH264 *iq_matrix;
 202     VAPictureParameterBufferH264 *pic_param;
 203
 204     if (!decode_state->iq_matrix || !decode_state->iq_matrix->buffer)
 205         return;
 206
 207     iq_matrix = (VAIQMatrixBufferH264 *)decode_state->iq_matrix->buffer;
 208
 209     assert(decode_state->pic_param && decode_state->pic_param->buffer);
 210     pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer;
 211
 212     cmd_len = 2 + 6 * 4; /* always load six 4x4 scaling matrices */
 213
 214     if (pic_param->pic_fields.bits.transform_8x8_mode_flag)
 215         cmd_len += 2 * 16; /* load two 8x8 scaling matrices */
 216
 217     BEGIN_BCS_BATCH(batch, cmd_len);
 218     OUT_BCS_BATCH(batch, CMD_AVC_BSD_QM_STATE | (cmd_len - 2));
 219
 220     if (pic_param->pic_fields.bits.transform_8x8_mode_flag)
 221         OUT_BCS_BATCH(batch,
 222                       (0x0  << 8) | /* don't use default built-in matrices */
 223                       (0xff << 0)); /* six 4x4 and two 8x8 scaling matrices */
 224     else
 225         OUT_BCS_BATCH(batch,
 226                       (0x0  << 8) | /* don't use default built-in matrices */
 227                       (0x3f << 0)); /* six 4x4 scaling matrices */
 228
 229     intel_batchbuffer_data(batch, &iq_matrix->ScalingList4x4[0][0], 6 * 4 * 4);
 230
 231     if (pic_param->pic_fields.bits.transform_8x8_mode_flag)
 232         intel_batchbuffer_data(batch, &iq_matrix->ScalingList8x8[0][0], 2 * 16 * 4);
 233
 234     ADVANCE_BCS_BATCH(batch);
 235 }
 236
 237 static void
 238 i965_avc_bsd_slice_state(VADriverContextP ctx,
 239                          VAPictureParameterBufferH264 *pic_param,
 240                          VASliceParameterBufferH264 *slice_param,
 241                          struct i965_h264_context *i965_h264_context)
 242 {
 243     struct intel_batchbuffer *batch = i965_h264_context->batch;
 244     int present_flag, cmd_len, list, j;
 245     uint8_t ref_idx_state[32];
 246     char weightoffsets[32 * 6];
 247
 248     /* don't issue SLICE_STATE for intra-prediction decoding */
 249     if (slice_param->slice_type == SLICE_TYPE_I ||
 250         slice_param->slice_type == SLICE_TYPE_SI)
 251         return;
 252
 253     cmd_len = 2;
 254
 255     if (slice_param->slice_type == SLICE_TYPE_P ||
 256         slice_param->slice_type == SLICE_TYPE_SP) {
 257         present_flag = PRESENT_REF_LIST0;
 258         cmd_len += 8;
 259     } else {
 260         present_flag = PRESENT_REF_LIST0 | PRESENT_REF_LIST1;
 261         cmd_len += 16;
 262     }
 263
 264     if ((slice_param->slice_type == SLICE_TYPE_P ||
 265          slice_param->slice_type == SLICE_TYPE_SP) &&
 266         (pic_param->pic_fields.bits.weighted_pred_flag == 1)) {
 267         present_flag |= PRESENT_WEIGHT_OFFSET_L0;
 268         cmd_len += 48;
 269     }
 270
 271     if ((slice_param->slice_type == SLICE_TYPE_B) &&
 272         (pic_param->pic_fields.bits.weighted_bipred_idc == 1)) {
 273         present_flag |= PRESENT_WEIGHT_OFFSET_L0 | PRESENT_WEIGHT_OFFSET_L1;
 274         cmd_len += 96;
 275     }
 276
 277     BEGIN_BCS_BATCH(batch, cmd_len);
 278     OUT_BCS_BATCH(batch, CMD_AVC_BSD_SLICE_STATE | (cmd_len - 2));
 279     OUT_BCS_BATCH(batch, present_flag);
 280
 281     for (list = 0; list < 2; list++) {
 282         int flag, num_va_pics;
 283         VAPictureH264 *va_pic;
 284
 285         if (list == 0) {
 286             flag        = PRESENT_REF_LIST0;
 287             va_pic      = slice_param->RefPicList0;
 288             num_va_pics = slice_param->num_ref_idx_l0_active_minus1 + 1;
 289         } else {
 290             flag        = PRESENT_REF_LIST1;
 291             va_pic      = slice_param->RefPicList1;
 292             num_va_pics = slice_param->num_ref_idx_l1_active_minus1 + 1;
 293         }
 294
 295         if (!(present_flag & flag))
 296             continue;
 297
 298         gen5_fill_avc_ref_idx_state(
 299             ref_idx_state,
 300             va_pic, num_va_pics,
 301             i965_h264_context->fsid_list
 302         );
 303         intel_batchbuffer_data(batch, ref_idx_state, sizeof(ref_idx_state));
 304     }
 305
 306     i965_h264_context->weight128_luma_l0 = 0;
 307     i965_h264_context->weight128_luma_l1 = 0;
 308     i965_h264_context->weight128_chroma_l0 = 0;
 309     i965_h264_context->weight128_chroma_l1 = 0;
 310
 311     i965_h264_context->weight128_offset0_flag = 0;
 312     i965_h264_context->weight128_offset0 = 0;
 313
 314     if (present_flag & PRESENT_WEIGHT_OFFSET_L0) {
 315         for (j = 0; j < 32; j++) {
 316             weightoffsets[j * 6 + 0] = slice_param->luma_offset_l0[j];
 317             weightoffsets[j * 6 + 1] = slice_param->luma_weight_l0[j];
 318             weightoffsets[j * 6 + 2] = slice_param->chroma_offset_l0[j][0];
 319             weightoffsets[j * 6 + 3] = slice_param->chroma_weight_l0[j][0];
 320             weightoffsets[j * 6 + 4] = slice_param->chroma_offset_l0[j][1];
 321             weightoffsets[j * 6 + 5] = slice_param->chroma_weight_l0[j][1];
 322
 323             if (pic_param->pic_fields.bits.weighted_pred_flag == 1 ||
 324                 pic_param->pic_fields.bits.weighted_bipred_idc == 1) {
 325                 if (i965_h264_context->use_hw_w128) {
 326                     if (slice_param->luma_weight_l0[j] == 128)
 327                         i965_h264_context->weight128_luma_l0 |= (1 << j);
 328
 329                     if (slice_param->chroma_weight_l0[j][0] == 128 ||
 330                         slice_param->chroma_weight_l0[j][1] == 128)
 331                         i965_h264_context->weight128_chroma_l0 |= (1 << j);
 332                 } else {
 333                     /* FIXME: workaround for weight 128 */
 334                     if (slice_param->luma_weight_l0[j] == 128 ||
 335                         slice_param->chroma_weight_l0[j][0] == 128 ||
 336                         slice_param->chroma_weight_l0[j][1] == 128)
 337                         i965_h264_context->weight128_offset0_flag = 1;
 338                 }
 339             }
 340         }
 341
 342         intel_batchbuffer_data(batch, weightoffsets, sizeof(weightoffsets));
 343     }
 344
 345     if (present_flag & PRESENT_WEIGHT_OFFSET_L1) {
 346         for (j = 0; j < 32; j++) {
 347             weightoffsets[j * 6 + 0] = slice_param->luma_offset_l1[j];
 348             weightoffsets[j * 6 + 1] = slice_param->luma_weight_l1[j];
 349             weightoffsets[j * 6 + 2] = slice_param->chroma_offset_l1[j][0];
 350             weightoffsets[j * 6 + 3] = slice_param->chroma_weight_l1[j][0];
 351             weightoffsets[j * 6 + 4] = slice_param->chroma_offset_l1[j][1];
 352             weightoffsets[j * 6 + 5] = slice_param->chroma_weight_l1[j][1];
 353
 354             if (pic_param->pic_fields.bits.weighted_bipred_idc == 1) {
 355                 if (i965_h264_context->use_hw_w128) {
 356                     if (slice_param->luma_weight_l1[j] == 128)
 357                         i965_h264_context->weight128_luma_l1 |= (1 << j);
 358
 359                     if (slice_param->chroma_weight_l1[j][0] == 128 ||
 360                         slice_param->chroma_weight_l1[j][1] == 128)
 361                         i965_h264_context->weight128_chroma_l1 |= (1 << j);
 362                 } else {
 363                     if (slice_param->luma_weight_l0[j] == 128 ||
 364                         slice_param->chroma_weight_l0[j][0] == 128 ||
 365                         slice_param->chroma_weight_l0[j][1] == 128)
 366                         i965_h264_context->weight128_offset0_flag = 1;
 367                 }
 368             }
 369         }
 370
 371         intel_batchbuffer_data(batch, weightoffsets, sizeof(weightoffsets));
 372     }
 373
 374     ADVANCE_BCS_BATCH(batch);
 375 }
 376
 377 static void
 378 i965_avc_bsd_buf_base_state(VADriverContextP ctx,
 379                             VAPictureParameterBufferH264 *pic_param,
 380                             VASliceParameterBufferH264 *slice_param,
 381                             struct i965_h264_context *i965_h264_context)
 382 {
 383     struct i965_driver_data *i965 = i965_driver_data(ctx);
 384     struct intel_batchbuffer *batch = i965_h264_context->batch;
 385     struct i965_avc_bsd_context *i965_avc_bsd_context;
 386     int i, j;
 387     VAPictureH264 *va_pic;
 388     struct object_surface *obj_surface;
 389     GenAvcSurface *avc_bsd_surface;
 390
 391     i965_avc_bsd_context = &i965_h264_context->i965_avc_bsd_context;
 392
 393     BEGIN_BCS_BATCH(batch, 74);
 394     OUT_BCS_BATCH(batch, CMD_AVC_BSD_BUF_BASE_STATE | (74 - 2));
 395     OUT_BCS_RELOC(batch, i965_avc_bsd_context->bsd_raw_store.bo,
 396                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 397                   0);
 398     OUT_BCS_RELOC(batch, i965_avc_bsd_context->mpr_row_store.bo,
 399                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 400                   0);
 401     OUT_BCS_RELOC(batch, i965_h264_context->avc_it_command_mb_info.bo,
 402                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 403                   i965_h264_context->avc_it_command_mb_info.mbs * i965_h264_context->use_avc_hw_scoreboard * MB_CMD_IN_BYTES);
 404     OUT_BCS_RELOC(batch, i965_h264_context->avc_it_data.bo,
 405                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 406                   (i965_h264_context->avc_it_data.write_offset << 6));
 407
 408     if (i965_h264_context->enable_avc_ildb)
 409         OUT_BCS_RELOC(batch, i965_h264_context->avc_ildb_data.bo,
 410                       I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 411                       0);
 412     else
 413         OUT_BCS_BATCH(batch, 0);
 414
 415     for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) {
 416         if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID) {
 417             int found = 0;
 418             for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) {
 419                 va_pic = &pic_param->ReferenceFrames[j];
 420
 421                 if (va_pic->flags & VA_PICTURE_H264_INVALID)
 422                     continue;
 423
 424                 if (va_pic->picture_id == i965_h264_context->fsid_list[i].surface_id) {
 425                     found = 1;
 426                     break;
 427                 }
 428             }
 429
 430             assert(found == 1);
 431
 432             if (!(va_pic->flags & VA_PICTURE_H264_INVALID)) {
 433                 obj_surface = SURFACE(va_pic->picture_id);
 434                 assert(obj_surface);
 435                 avc_bsd_surface = obj_surface->private_data;
 436
 437                 if (avc_bsd_surface == NULL) {
 438                     OUT_BCS_BATCH(batch, 0);
 439                     OUT_BCS_BATCH(batch, 0);
 440                 } else {
 441                     OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
 442                                   I915_GEM_DOMAIN_INSTRUCTION, 0,
 443                                   0);
 444
 445                     if (avc_bsd_surface->dmv_bottom_flag == 1)
 446                         OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_bottom,
 447                                       I915_GEM_DOMAIN_INSTRUCTION, 0,
 448                                       0);
 449                     else
 450                         OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
 451                                       I915_GEM_DOMAIN_INSTRUCTION, 0,
 452                                       0);
 453                 }
 454             }
 455         } else {
 456             OUT_BCS_BATCH(batch, 0);
 457             OUT_BCS_BATCH(batch, 0);
 458         }
 459     }
 460
 461     va_pic = &pic_param->CurrPic;
 462     assert(!(va_pic->flags & VA_PICTURE_H264_INVALID));
 463     obj_surface = SURFACE(va_pic->picture_id);
 464     assert(obj_surface);
 465     obj_surface->flags &= ~SURFACE_REF_DIS_MASK;
 466     obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0);
 467     i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2'), SUBSAMPLE_YUV420);
 468
 469     /* initial uv component for YUV400 case */
 470     if (pic_param->seq_fields.bits.chroma_format_idc == 0) {
 471          unsigned int uv_offset = obj_surface->width * obj_surface->height;
 472          unsigned int uv_size   = obj_surface->width * obj_surface->height / 2;
 473
 474          dri_bo_map(obj_surface->bo, 1);
 475          memset(obj_surface->bo->virtual + uv_offset, 0x80, uv_size);
 476          dri_bo_unmap(obj_surface->bo);
 477     }
 478
 479     i965_avc_bsd_init_avc_bsd_surface(ctx, obj_surface, pic_param, i965_h264_context);
 480     avc_bsd_surface = obj_surface->private_data;
 481
 482     OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
 483                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 484                   0);
 485
 486     if (avc_bsd_surface->dmv_bottom_flag == 1)
 487         OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_bottom,
 488                       I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 489                       0);
 490     else
 491         OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
 492                       I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 493                       0);
 494
 495     /* POC List */
 496     for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) {
 497         if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID) {
 498             int found = 0;
 499             for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) {
 500                 va_pic = &pic_param->ReferenceFrames[j];
 501
 502                 if (va_pic->flags & VA_PICTURE_H264_INVALID)
 503                     continue;
 504
 505                 if (va_pic->picture_id == i965_h264_context->fsid_list[i].surface_id) {
 506                     found = 1;
 507                     break;
 508                 }
 509             }
 510
 511             assert(found == 1);
 512
 513             if (!(va_pic->flags & VA_PICTURE_H264_INVALID)) {
 514                 OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt);
 515                 OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt);
 516             }
 517         } else {
 518             OUT_BCS_BATCH(batch, 0);
 519             OUT_BCS_BATCH(batch, 0);
 520         }
 521     }
 522
 523     va_pic = &pic_param->CurrPic;
 524     OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt);
 525     OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt);
 526
 527     ADVANCE_BCS_BATCH(batch);
 528 }
 529
 530 /*
 531  * Return the bit offset to the first bit of the slice data
 532  *
 533  * VASliceParameterBufferH264.slice_data_bit_offset will point into the part
 534  * of slice header if there are some escaped bytes in the slice header. The offset
 535  * to slice data is needed for BSD unit so that BSD unit can fetch right slice data
 536  * for processing. This fixes conformance case BASQP1_Sony_C.jsv
 537  */
 538 static int
 539 i965_avc_bsd_get_slice_bit_offset(uint8_t *buf, int mode_flag, int in_slice_data_bit_offset)
 540 {
 541     int out_slice_data_bit_offset;
 542     int slice_header_size = in_slice_data_bit_offset / 8;
 543     int i, j;
 544
 545     for (i = 0, j = 0; i < slice_header_size; i++, j++) {
 546         if (!buf[j] && !buf[j + 1] && buf[j + 2] == 3) {
 547             i++, j += 2;
 548         }
 549     }
 550
 551     out_slice_data_bit_offset = 8 * j + in_slice_data_bit_offset % 8;
 552
 553     if (mode_flag == ENTROPY_CABAC)
 554         out_slice_data_bit_offset = ALIGN(out_slice_data_bit_offset, 0x8);
 555
 556     return out_slice_data_bit_offset;
 557 }
 558
 559 static void
 560 g4x_avc_bsd_object(VADriverContextP ctx,
 561                    struct decode_state *decode_state,
 562                    VAPictureParameterBufferH264 *pic_param,
 563                    VASliceParameterBufferH264 *slice_param,
 564                    int slice_index,
 565                    struct i965_h264_context *i965_h264_context)
 566 {
 567     struct intel_batchbuffer *batch = i965_h264_context->batch;
 568     int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1;
 569     int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */
 570
 571     if (slice_param) {
 572         int encrypted, counter_value, cmd_len;
 573         int slice_hor_pos, slice_ver_pos;
 574         int num_ref_idx_l0, num_ref_idx_l1;
 575         int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag &&
 576                              pic_param->seq_fields.bits.mb_adaptive_frame_field_flag);
 577         int slice_data_bit_offset;
 578         int weighted_pred_idc = 0;
 579         int first_mb_in_slice = 0;
 580         int slice_type;
 581         uint8_t *slice_data = NULL;
 582
 583         encrypted = 0; /* FIXME: which flag in VAAPI is used for encryption? */
 584
 585         if (encrypted) {
 586             cmd_len = 9;
 587             counter_value = 0; /* FIXME: ??? */
 588         } else
 589             cmd_len = 8;
 590
 591         dri_bo_map(decode_state->slice_datas[slice_index]->bo, 0);
 592         slice_data = (uint8_t *)(decode_state->slice_datas[slice_index]->bo->virtual + slice_param->slice_data_offset);
 593         slice_data_bit_offset = i965_avc_bsd_get_slice_bit_offset(slice_data,
 594                                                                   pic_param->pic_fields.bits.entropy_coding_mode_flag,
 595                                                                   slice_param->slice_data_bit_offset);
 596         dri_bo_unmap(decode_state->slice_datas[slice_index]->bo);
 597
 598         if (slice_param->slice_type == SLICE_TYPE_I ||
 599             slice_param->slice_type == SLICE_TYPE_SI)
 600             slice_type = SLICE_TYPE_I;
 601         else if (slice_param->slice_type == SLICE_TYPE_P ||
 602                  slice_param->slice_type == SLICE_TYPE_SP)
 603             slice_type = SLICE_TYPE_P;
 604         else {
 605             assert(slice_param->slice_type == SLICE_TYPE_B);
 606             slice_type = SLICE_TYPE_B;
 607         }
 608
 609         if (slice_type == SLICE_TYPE_I) {
 610             assert(slice_param->num_ref_idx_l0_active_minus1 == 0);
 611             assert(slice_param->num_ref_idx_l1_active_minus1 == 0);
 612             num_ref_idx_l0 = 0;
 613             num_ref_idx_l1 = 0;
 614         } else if (slice_type == SLICE_TYPE_P) {
 615             assert(slice_param->num_ref_idx_l1_active_minus1 == 0);
 616             num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1;
 617             num_ref_idx_l1 = 0;
 618         } else {
 619             num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1;
 620             num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1;
 621         }
 622
 623         if (slice_type == SLICE_TYPE_P)
 624             weighted_pred_idc = pic_param->pic_fields.bits.weighted_pred_flag;
 625         else if (slice_type == SLICE_TYPE_B)
 626             weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc;
 627
 628         first_mb_in_slice = slice_param->first_mb_in_slice << mbaff_picture;
 629         slice_hor_pos = first_mb_in_slice % width_in_mbs;
 630         slice_ver_pos = first_mb_in_slice / width_in_mbs;
 631
 632         BEGIN_BCS_BATCH(batch, cmd_len);
 633         OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (cmd_len - 2));
 634         OUT_BCS_BATCH(batch,
 635                       (encrypted << 31) |
 636                       ((slice_param->slice_data_size - (slice_data_bit_offset >> 3)) << 0));
 637         OUT_BCS_BATCH(batch,
 638                       (slice_param->slice_data_offset +
 639                        (slice_data_bit_offset >> 3)));
 640         OUT_BCS_BATCH(batch,
 641                       (0 << 31) | /* concealment mode: 0->intra 16x16 prediction, 1->inter P Copy */
 642                       (0 << 14) | /* ignore BSDPrematureComplete Error handling */
 643                       (0 << 13) | /* FIXME: ??? */
 644                       (0 << 12) | /* ignore MPR Error handling */
 645                       (0 << 10) | /* ignore Entropy Error handling */
 646                       (0 << 8)  | /* ignore MB Header Error handling */
 647                       (slice_type << 0));
 648         OUT_BCS_BATCH(batch,
 649                       (num_ref_idx_l1 << 24) |
 650                       (num_ref_idx_l0 << 16) |
 651                       (slice_param->chroma_log2_weight_denom << 8) |
 652                       (slice_param->luma_log2_weight_denom << 0));
 653         OUT_BCS_BATCH(batch,
 654                       (weighted_pred_idc << 30) |
 655                       (slice_param->direct_spatial_mv_pred_flag << 29) |
 656                       (slice_param->disable_deblocking_filter_idc << 27) |
 657                       (slice_param->cabac_init_idc << 24) |
 658                       ((pic_param->pic_init_qp_minus26 + 26 + slice_param->slice_qp_delta) << 16) |
 659                       ((slice_param->slice_beta_offset_div2 & 0xf) << 8) |
 660                       ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0));
 661         OUT_BCS_BATCH(batch,
 662                       (slice_ver_pos << 24) |
 663                       (slice_hor_pos << 16) |
 664                       (first_mb_in_slice << 0));
 665         OUT_BCS_BATCH(batch,
 666                       (0 << 7) | /* FIXME: ??? */
 667                       ((0x7 - (slice_data_bit_offset & 0x7)) << 0));
 668
 669         if (encrypted) {
 670             OUT_BCS_BATCH(batch, counter_value);
 671         }
 672
 673         ADVANCE_BCS_BATCH(batch);
 674     } else {
 675         BEGIN_BCS_BATCH(batch, 8);
 676         OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (8 - 2));
 677         OUT_BCS_BATCH(batch, 0); /* indirect data length for phantom slice is 0 */
 678         OUT_BCS_BATCH(batch, 0); /* indirect data start address for phantom slice is 0 */
 679         OUT_BCS_BATCH(batch, 0);
 680         OUT_BCS_BATCH(batch, 0);
 681         OUT_BCS_BATCH(batch, 0);
 682         OUT_BCS_BATCH(batch, width_in_mbs * height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag));
 683         OUT_BCS_BATCH(batch, 0);
 684         ADVANCE_BCS_BATCH(batch);
 685     }
 686 }
 687
 688 static void
 689 ironlake_avc_bsd_object(VADriverContextP ctx,
 690                         struct decode_state *decode_state,
 691                         VAPictureParameterBufferH264 *pic_param,
 692                         VASliceParameterBufferH264 *slice_param,
 693                         int slice_index,
 694                         struct i965_h264_context *i965_h264_context)
 695 {
 696     struct intel_batchbuffer *batch = i965_h264_context->batch;
 697     int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1;
 698     int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */
 699
 700     if (slice_param) {
 701         int encrypted, counter_value;
 702         int slice_hor_pos, slice_ver_pos;
 703         int num_ref_idx_l0, num_ref_idx_l1;
 704         int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag &&
 705                              pic_param->seq_fields.bits.mb_adaptive_frame_field_flag);
 706         int slice_data_bit_offset;
 707         int weighted_pred_idc = 0;
 708         int first_mb_in_slice;
 709         int slice_type;
 710         uint8_t *slice_data = NULL;
 711
 712         encrypted = 0; /* FIXME: which flag in VAAPI is used for encryption? */
 713
 714         if (encrypted) {
 715             counter_value = 0; /* FIXME: ??? */
 716         } else
 717             counter_value = 0;
 718
 719         dri_bo_map(decode_state->slice_datas[slice_index]->bo, 0);
 720         slice_data = (uint8_t *)(decode_state->slice_datas[slice_index]->bo->virtual + slice_param->slice_data_offset);
 721         slice_data_bit_offset = i965_avc_bsd_get_slice_bit_offset(slice_data,
 722                                                                   pic_param->pic_fields.bits.entropy_coding_mode_flag,
 723                                                                   slice_param->slice_data_bit_offset);
 724         dri_bo_unmap(decode_state->slice_datas[slice_index]->bo);
 725
 726         if (slice_param->slice_type == SLICE_TYPE_I ||
 727             slice_param->slice_type == SLICE_TYPE_SI)
 728             slice_type = SLICE_TYPE_I;
 729         else if (slice_param->slice_type == SLICE_TYPE_P ||
 730                  slice_param->slice_type == SLICE_TYPE_SP)
 731             slice_type = SLICE_TYPE_P;
 732         else {
 733             assert(slice_param->slice_type == SLICE_TYPE_B);
 734             slice_type = SLICE_TYPE_B;
 735         }
 736
 737         if (slice_type == SLICE_TYPE_I) {
 738             assert(slice_param->num_ref_idx_l0_active_minus1 == 0);
 739             assert(slice_param->num_ref_idx_l1_active_minus1 == 0);
 740             num_ref_idx_l0 = 0;
 741             num_ref_idx_l1 = 0;
 742         } else if (slice_type == SLICE_TYPE_P) {
 743             assert(slice_param->num_ref_idx_l1_active_minus1 == 0);
 744             num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1;
 745             num_ref_idx_l1 = 0;
 746         } else {
 747             num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1;
 748             num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1;
 749         }
 750
 751         if (slice_type == SLICE_TYPE_P)
 752             weighted_pred_idc = pic_param->pic_fields.bits.weighted_pred_flag;
 753         else if (slice_type == SLICE_TYPE_B)
 754             weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc;
 755
 756         first_mb_in_slice = slice_param->first_mb_in_slice << mbaff_picture;
 757         slice_hor_pos = first_mb_in_slice % width_in_mbs;
 758         slice_ver_pos = first_mb_in_slice / width_in_mbs;
 759
 760         BEGIN_BCS_BATCH(batch, 16);
 761         OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (16 - 2));
 762         OUT_BCS_BATCH(batch,
 763                       (encrypted << 31) |
 764                       (0 << 30) | /* FIXME: packet based bit stream */
 765                       (0 << 29) | /* FIXME: packet format */
 766                       ((slice_param->slice_data_size - (slice_data_bit_offset >> 3)) << 0));
 767         OUT_BCS_BATCH(batch,
 768                       (slice_param->slice_data_offset +
 769                        (slice_data_bit_offset >> 3)));
 770         OUT_BCS_BATCH(batch,
 771                       (0 << 31) | /* concealment mode: 0->intra 16x16 prediction, 1->inter P Copy */
 772                       (0 << 14) | /* ignore BSDPrematureComplete Error handling */
 773                       (0 << 13) | /* FIXME: ??? */
 774                       (0 << 12) | /* ignore MPR Error handling */
 775                       (0 << 10) | /* ignore Entropy Error handling */
 776                       (0 << 8)  | /* ignore MB Header Error handling */
 777                       (slice_type << 0));
 778         OUT_BCS_BATCH(batch,
 779                       (num_ref_idx_l1 << 24) |
 780                       (num_ref_idx_l0 << 16) |
 781                       (slice_param->chroma_log2_weight_denom << 8) |
 782                       (slice_param->luma_log2_weight_denom << 0));
 783         OUT_BCS_BATCH(batch,
 784                       (weighted_pred_idc << 30) |
 785                       (slice_param->direct_spatial_mv_pred_flag << 29) |
 786                       (slice_param->disable_deblocking_filter_idc << 27) |
 787                       (slice_param->cabac_init_idc << 24) |
 788                       ((pic_param->pic_init_qp_minus26 + 26 + slice_param->slice_qp_delta) << 16) |
 789                       ((slice_param->slice_beta_offset_div2 & 0xf) << 8) |
 790                       ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0));
 791         OUT_BCS_BATCH(batch,
 792                       (slice_ver_pos << 24) |
 793                       (slice_hor_pos << 16) |
 794                       (first_mb_in_slice << 0));
 795         OUT_BCS_BATCH(batch,
 796                       (0 << 7) | /* FIXME: ??? */
 797                       ((0x7 - (slice_data_bit_offset & 0x7)) << 0));
 798         OUT_BCS_BATCH(batch, counter_value);
 799
 800         /* FIXME: dw9-dw11 */
 801         OUT_BCS_BATCH(batch, 0);
 802         OUT_BCS_BATCH(batch, 0);
 803         OUT_BCS_BATCH(batch, 0);
 804         OUT_BCS_BATCH(batch, i965_h264_context->weight128_luma_l0);
 805         OUT_BCS_BATCH(batch, i965_h264_context->weight128_luma_l1);
 806         OUT_BCS_BATCH(batch, i965_h264_context->weight128_chroma_l0);
 807         OUT_BCS_BATCH(batch, i965_h264_context->weight128_chroma_l1);
 808
 809         ADVANCE_BCS_BATCH(batch);
 810     } else {
 811         BEGIN_BCS_BATCH(batch, 16);
 812         OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (16 - 2));
 813         OUT_BCS_BATCH(batch, 0); /* indirect data length for phantom slice is 0 */
 814         OUT_BCS_BATCH(batch, 0); /* indirect data start address for phantom slice is 0 */
 815         OUT_BCS_BATCH(batch, 0);
 816         OUT_BCS_BATCH(batch, 0);
 817         OUT_BCS_BATCH(batch, 0);
 818         OUT_BCS_BATCH(batch, width_in_mbs * height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag));
 819         OUT_BCS_BATCH(batch, 0);
 820         OUT_BCS_BATCH(batch, 0);
 821         OUT_BCS_BATCH(batch, 0);
 822         OUT_BCS_BATCH(batch, 0);
 823         OUT_BCS_BATCH(batch, 0);
 824         OUT_BCS_BATCH(batch, 0);
 825         OUT_BCS_BATCH(batch, 0);
 826         OUT_BCS_BATCH(batch, 0);
 827         OUT_BCS_BATCH(batch, 0);
 828         ADVANCE_BCS_BATCH(batch);
 829     }
 830 }
 831
 832 static void
 833 i965_avc_bsd_object(VADriverContextP ctx,
 834                     struct decode_state *decode_state,
 835                     VAPictureParameterBufferH264 *pic_param,
 836                     VASliceParameterBufferH264 *slice_param,
 837                     int slice_index,
 838                     struct i965_h264_context *i965_h264_context)
 839 {
 840     struct i965_driver_data *i965 = i965_driver_data(ctx);
 841
 842     if (IS_IRONLAKE(i965->intel.device_id))
 843         ironlake_avc_bsd_object(ctx, decode_state, pic_param, slice_param, slice_index, i965_h264_context);
 844     else
 845         g4x_avc_bsd_object(ctx, decode_state, pic_param, slice_param, slice_index, i965_h264_context);
 846 }
 847
 848 static void
 849 i965_avc_bsd_phantom_slice(VADriverContextP ctx,
 850                            struct decode_state *decode_state,
 851                            VAPictureParameterBufferH264 *pic_param,
 852                            struct i965_h264_context *i965_h264_context)
 853 {
 854     i965_avc_bsd_object(ctx, decode_state, pic_param, NULL, 0, i965_h264_context);
 855 }
 856
 857 static void
 858 i965_avc_bsd_frame_store_index(VADriverContextP ctx,
 859                                VAPictureParameterBufferH264 *pic_param,
 860                                struct i965_h264_context *i965_h264_context)
 861 {
 862     struct i965_driver_data *i965 = i965_driver_data(ctx);
 863     int i, j;
 864
 865     assert(ARRAY_ELEMS(i965_h264_context->fsid_list) == ARRAY_ELEMS(pic_param->ReferenceFrames));
 866
 867     for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) {
 868         int found = 0;
 869
 870         if (i965_h264_context->fsid_list[i].surface_id == VA_INVALID_ID)
 871             continue;
 872
 873         for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) {
 874             VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[j];
 875             if (ref_pic->flags & VA_PICTURE_H264_INVALID)
 876                 continue;
 877
 878             if (i965_h264_context->fsid_list[i].surface_id == ref_pic->picture_id) {
 879                 found = 1;
 880                 break;
 881             }
 882         }
 883
 884         if (!found) {
 885             struct object_surface *obj_surface = SURFACE(i965_h264_context->fsid_list[i].surface_id);
 886             obj_surface->flags &= ~SURFACE_REFERENCED;
 887
 888             if ((obj_surface->flags & SURFACE_ALL_MASK) == SURFACE_DISPLAYED) {
 889                 dri_bo_unreference(obj_surface->bo);
 890                 obj_surface->bo = NULL;
 891                 obj_surface->flags &= ~SURFACE_REF_DIS_MASK;
 892             }
 893
 894             if (obj_surface->free_private_data)
 895                 obj_surface->free_private_data(&obj_surface->private_data);
 896
 897             i965_h264_context->fsid_list[i].surface_id = VA_INVALID_ID;
 898             i965_h264_context->fsid_list[i].frame_store_id = -1;
 899         }
 900     }
 901
 902     for (i = 0; i < ARRAY_ELEMS(pic_param->ReferenceFrames); i++) {
 903         VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[i];
 904         int found = 0;
 905
 906         if (ref_pic->flags & VA_PICTURE_H264_INVALID)
 907             continue;
 908
 909         for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) {
 910             if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID)
 911                 continue;
 912
 913             if (i965_h264_context->fsid_list[j].surface_id == ref_pic->picture_id) {
 914                 found = 1;
 915                 break;
 916             }
 917         }
 918
 919         if (!found) {
 920             int frame_idx;
 921             struct object_surface *obj_surface = SURFACE(ref_pic->picture_id);
 922             assert(obj_surface);
 923             i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2'), SUBSAMPLE_YUV420);
 924
 925             for (frame_idx = 0; frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list); frame_idx++) {
 926                 for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) {
 927                     if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID)
 928                         continue;
 929
 930                     if (i965_h264_context->fsid_list[j].frame_store_id == frame_idx)
 931                         break;
 932                 }
 933
 934                 if (j == ARRAY_ELEMS(i965_h264_context->fsid_list))
 935                     break;
 936             }
 937
 938             assert(frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list));
 939
 940             for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) {
 941                 if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID) {
 942                     i965_h264_context->fsid_list[j].surface_id = ref_pic->picture_id;
 943                     i965_h264_context->fsid_list[j].frame_store_id = frame_idx;
 944                     break;
 945                 }
 946             }
 947         }
 948     }
 949
 950     for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list) - 1; i++) {
 951         if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID &&
 952             i965_h264_context->fsid_list[i].frame_store_id == i)
 953             continue;
 954
 955         for (j = i + 1; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) {
 956             if (i965_h264_context->fsid_list[j].surface_id != VA_INVALID_ID &&
 957                 i965_h264_context->fsid_list[j].frame_store_id == i) {
 958                 VASurfaceID id = i965_h264_context->fsid_list[i].surface_id;
 959                 int frame_idx = i965_h264_context->fsid_list[i].frame_store_id;
 960
 961                 i965_h264_context->fsid_list[i].surface_id = i965_h264_context->fsid_list[j].surface_id;
 962                 i965_h264_context->fsid_list[i].frame_store_id = i965_h264_context->fsid_list[j].frame_store_id;
 963                 i965_h264_context->fsid_list[j].surface_id = id;
 964                 i965_h264_context->fsid_list[j].frame_store_id = frame_idx;
 965                 break;
 966             }
 967         }
 968     }
 969 }
 970
 971 void
 972 i965_avc_bsd_pipeline(VADriverContextP ctx, struct decode_state *decode_state, void *h264_context)
 973 {
 974     struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)h264_context;
 975     struct intel_batchbuffer *batch = i965_h264_context->batch;
 976     VAPictureParameterBufferH264 *pic_param;
 977     VASliceParameterBufferH264 *slice_param;
 978     int i, j;
 979
 980     assert(decode_state->pic_param && decode_state->pic_param->buffer);
 981     pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer;
 982     i965_avc_bsd_frame_store_index(ctx, pic_param, i965_h264_context);
 983
 984     i965_h264_context->enable_avc_ildb = 0;
 985     i965_h264_context->picture.i_flag = 1;
 986
 987     for (j = 0; j < decode_state->num_slice_params && i965_h264_context->enable_avc_ildb == 0; j++) {
 988         assert(decode_state->slice_params && decode_state->slice_params[j]->buffer);
 989         slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer;
 990
 991         for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) {
 992             assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL);
 993             assert((slice_param->slice_type == SLICE_TYPE_I) ||
 994                    (slice_param->slice_type == SLICE_TYPE_SI) ||
 995                    (slice_param->slice_type == SLICE_TYPE_P) ||
 996                    (slice_param->slice_type == SLICE_TYPE_SP) ||
 997                    (slice_param->slice_type == SLICE_TYPE_B));
 998
 999             if (slice_param->disable_deblocking_filter_idc != 1) {
1000                 i965_h264_context->enable_avc_ildb = 1;
1001                 break;
1002             }
1003
1004             slice_param++;
1005         }
1006     }
1007
1008     intel_batchbuffer_start_atomic_bcs(batch, 0x1000);
1009
1010     i965_avc_bsd_img_state(ctx, decode_state, i965_h264_context);
1011     i965_avc_bsd_qm_state(ctx, decode_state, i965_h264_context);
1012
1013     for (j = 0; j < decode_state->num_slice_params; j++) {
1014         assert(decode_state->slice_params && decode_state->slice_params[j]->buffer);
1015         slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer;
1016
1017         i965_bsd_ind_obj_base_address(ctx, decode_state, j, i965_h264_context);
1018
1019         for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) {
1020             assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL);
1021             assert((slice_param->slice_type == SLICE_TYPE_I) ||
1022                    (slice_param->slice_type == SLICE_TYPE_SI) ||
1023                    (slice_param->slice_type == SLICE_TYPE_P) ||
1024                    (slice_param->slice_type == SLICE_TYPE_SP) ||
1025                    (slice_param->slice_type == SLICE_TYPE_B));
1026
1027             if (i965_h264_context->picture.i_flag &&
1028                 (slice_param->slice_type != SLICE_TYPE_I ||
1029                  slice_param->slice_type != SLICE_TYPE_SI))
1030                 i965_h264_context->picture.i_flag = 0;
1031
1032             i965_avc_bsd_slice_state(ctx, pic_param, slice_param, i965_h264_context);
1033             i965_avc_bsd_buf_base_state(ctx, pic_param, slice_param, i965_h264_context);
1034             i965_avc_bsd_object(ctx, decode_state, pic_param, slice_param, j, i965_h264_context);
1035             slice_param++;
1036         }
1037     }
1038
1039     i965_avc_bsd_phantom_slice(ctx, decode_state, pic_param, i965_h264_context);
1040     intel_batchbuffer_emit_mi_flush(batch);
1041     intel_batchbuffer_end_atomic(batch);
1042     intel_batchbuffer_flush(batch);
1043 }
1044
1045 void
1046 i965_avc_bsd_decode_init(VADriverContextP ctx, void *h264_context)
1047 {
1048     struct i965_driver_data *i965 = i965_driver_data(ctx);
1049     struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)h264_context;
1050     struct i965_avc_bsd_context *i965_avc_bsd_context;
1051     dri_bo *bo;
1052
1053     assert(i965_h264_context);
1054     i965_avc_bsd_context = &i965_h264_context->i965_avc_bsd_context;
1055
1056     dri_bo_unreference(i965_avc_bsd_context->bsd_raw_store.bo);
1057     bo = dri_bo_alloc(i965->intel.bufmgr,
1058                       "bsd raw store",
1059                       0x3000, /* at least 11520 bytes to support 120 MBs per row */
1060                       64);
1061     assert(bo);
1062     i965_avc_bsd_context->bsd_raw_store.bo = bo;
1063
1064     dri_bo_unreference(i965_avc_bsd_context->mpr_row_store.bo);
1065     bo = dri_bo_alloc(i965->intel.bufmgr,
1066                       "mpr row store",
1067                       0x2000, /* at least 7680 bytes to support 120 MBs per row */
1068                       64);
1069     assert(bo);
1070     i965_avc_bsd_context->mpr_row_store.bo = bo;
1071 }
1072
1073 Bool
1074 i965_avc_bsd_ternimate(struct i965_avc_bsd_context *i965_avc_bsd_context)
1075 {
1076     dri_bo_unreference(i965_avc_bsd_context->bsd_raw_store.bo);
1077     dri_bo_unreference(i965_avc_bsd_context->mpr_row_store.bo);
1078
1079     return True;
1080 }