2 * Author: Brendan Le Foll <brendan.le.foll@intel.com>
3 * Copyright (c) 2014 Intel Corporation.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
20 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 #define MAX_BUFFER_LENGTH 6
29 #define HMC5883L_I2C_ADDR 0x1E
31 //configuration registers
32 #define HMC5883L_CONF_REG_A 0x00
33 #define HMC5883L_CONF_REG_B 0x01
36 #define HMC5883L_MODE_REG 0x02
39 #define HMC5883L_X_MSB_REG 0
40 #define HMC5883L_X_LSB_REG 1
41 #define HMC5883L_Z_MSB_REG 2
42 #define HMC5883L_Z_LSB_REG 3
43 #define HMC5883L_Y_MSB_REG 4
44 #define HMC5883L_Y_LSB_REG 5
45 #define DATA_REG_SIZE 6
48 #define HMC5883L_STATUS_REG 0x09
51 #define HMC5883L_ID_A_REG 0x0A
52 #define HMC5883L_ID_B_REG 0x0B
53 #define HMC5883L_ID_C_REG 0x0C
55 #define HMC5883L_CONT_MODE 0x00
56 #define HMC5883L_DATA_REG 0x03
59 #define GA_0_88_REG 0x00 << 5
60 #define GA_1_3_REG 0x01 << 5
61 #define GA_1_9_REG 0x02 << 5
62 #define GA_2_5_REG 0x03 << 5
63 #define GA_4_0_REG 0x04 << 5
64 #define GA_4_7_REG 0x05 << 5
65 #define GA_5_6_REG 0x06 << 5
66 #define GA_8_1_REG 0x07 << 5
69 #define SCALE_0_73_MG 0.73
70 #define SCALE_0_92_MG 0.92
71 #define SCALE_1_22_MG 1.22
72 #define SCALE_1_52_MG 1.52
73 #define SCALE_2_27_MG 2.27
74 #define SCALE_2_56_MG 2.56
75 #define SCALE_3_03_MG 3.03
76 #define SCALE_4_35_MG 4.35
80 Hmc5883l::Hmc5883l(int bus)
82 m_i2c = maa_i2c_init(bus);
84 maa_i2c_address(m_i2c, HMC5883L_I2C_ADDR);
85 m_rx_tx_buf[0] = HMC5883L_CONF_REG_B;
86 m_rx_tx_buf[1] = GA_1_3_REG;
87 maa_i2c_write(m_i2c, m_rx_tx_buf, 2);
89 maa_i2c_address(m_i2c, HMC5883L_I2C_ADDR);
90 m_rx_tx_buf[0] = HMC5883L_MODE_REG;
91 m_rx_tx_buf[1] = HMC5883L_CONT_MODE;
92 maa_i2c_write(m_i2c, m_rx_tx_buf, 2);
98 Hmc5883l::update(void)
100 maa_i2c_address(m_i2c, HMC5883L_I2C_ADDR);
101 maa_i2c_write_byte(m_i2c, HMC5883L_DATA_REG);
103 maa_i2c_address(m_i2c, HMC5883L_I2C_ADDR);
104 maa_i2c_read(m_i2c, m_rx_tx_buf, DATA_REG_SIZE);
107 m_coor[0] = (m_rx_tx_buf[HMC5883L_X_MSB_REG] << 8 ) | m_rx_tx_buf[HMC5883L_X_LSB_REG];
109 m_coor[2] = (m_rx_tx_buf[HMC5883L_Z_MSB_REG] << 8 ) | m_rx_tx_buf[HMC5883L_Z_LSB_REG];
111 m_coor[1] = (m_rx_tx_buf[HMC5883L_Y_MSB_REG] << 8 ) | m_rx_tx_buf[HMC5883L_Y_LSB_REG];
117 Hmc5883l::direction(void)
119 return atan2(m_coor[1] * SCALE_0_92_MG, m_coor[0] * SCALE_0_92_MG);
123 Hmc5883l::heading(void)
125 return Hmc5883l::direction() * 180/M_PI;
129 Hmc5883l::coordinates(void)