pass-hal: tm2: Update TMU HAL functions to use pass_res_thermal_name
[platform/adaptation/tm2/pass-hal-tm2.git] / src / gpu / gpu.c
1 /*
2  * PASS (Power Aware System Service)
3  *
4  * Copyright (c) 2017 Samsung Electronics Co., Ltd.
5  *
6  * Licensed under the Apache License, Version 2.0 (the License);
7  * you may not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  *     http://www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an "AS IS" BASIS,
14  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  */
18 #include <errno.h>
19 #include <limits.h>
20 #include <pass/hal.h>
21 #include <pass/hal-log.h>
22 #include <stdio.h>
23 #include <stdlib.h>
24 #include <string.h>
25
26 #include "../shared/sysfs.h"
27
28 /* TODO: Version! */
29 #define HAL_VERSION     MAKE_2B_CODE_4(VER_MAJOR,VER_MINOR,VER_REVISION,VER_RELEASE)
30 #define DEV_VERSION_GPU MAKE_2B_CODE_2(1,0)
31
32 #define DEVFREQ_GPU_PATH_PREFIX                 "/sys/class/devfreq/"
33 #define DEVFREQ_GPU_CURR_GOVERNOR_PATH_SUFFIX   "/governor"
34 #define DEVFREQ_GPU_CURR_FREQ_PATH_SUFFIX       "/cur_freq"
35 #define DEVFREQ_GPU_MIN_FREQ_PATH_SUFFIX        "/min_freq"
36 #define DEVFREQ_GPU_MAX_FREQ_PATH_SUFFIX        "/max_freq"
37
38 #define TMU_PATH_PREFIX                         "/sys/class/thermal/"
39 #define TMU_TEMP_PATH_SUFFIX                    "/temp"
40 #define TMU_POLICY_PATH_SUFFIX                  "/policy"
41
42 static int tm2_dvfs_get_curr_governor(char *res_name, char *governor)
43 {
44         char path[PATH_MAX];
45         int ret;
46
47         if ((!res_name) || (!governor))
48                 return -EINVAL;
49
50         snprintf(path, PATH_MAX, "%s%s%s",
51                 DEVFREQ_GPU_PATH_PREFIX,
52                 res_name,
53                 DEVFREQ_GPU_CURR_GOVERNOR_PATH_SUFFIX);
54
55         ret = sysfs_read_str(path, governor, BUFF_MAX);
56         if (ret < 0)
57                 return ret;
58
59         return 0;
60 }
61
62 static int tm2_dvfs_set_curr_governor(char *res_name, char *governor)
63 {
64         char path[PATH_MAX];
65         int ret;
66
67         if ((!res_name) || (!governor))
68                 return -EINVAL;
69
70         snprintf(path, PATH_MAX, "%s%s%s",
71                 DEVFREQ_GPU_PATH_PREFIX,
72                 res_name,
73                 DEVFREQ_GPU_CURR_GOVERNOR_PATH_SUFFIX);
74
75         ret = sysfs_write_str(path, governor);
76         if (ret < 0)
77                 return ret;
78
79         return 0;
80 }
81
82 static int tm2_dvfs_get_curr_freq(char *res_name)
83 {
84         char path[PATH_MAX];
85         int freq, ret;
86
87         if (!res_name)
88                 return -EINVAL;
89
90         snprintf(path, PATH_MAX, "%s%s%s",
91                 DEVFREQ_GPU_PATH_PREFIX,
92                 res_name,
93                 DEVFREQ_GPU_CURR_FREQ_PATH_SUFFIX);
94
95         ret = sysfs_read_int(path, &freq);
96         if (ret < 0)
97                 return ret;
98
99         return freq;
100 }
101
102 static int tm2_dvfs_get_min_freq(char *res_name)
103 {
104         char path[PATH_MAX];
105         int freq, ret;
106
107         if (!res_name)
108                 return -EINVAL;
109
110         snprintf(path, PATH_MAX, "%s%s%s",
111                 DEVFREQ_GPU_PATH_PREFIX,
112                 res_name,
113                 DEVFREQ_GPU_MIN_FREQ_PATH_SUFFIX);
114
115         ret = sysfs_read_int(path, &freq);
116         if (ret < 0)
117                 return ret;
118
119         return freq;
120 }
121
122 static int tm2_dvfs_set_min_freq(char *res_name, int freq)
123 {
124         char path[PATH_MAX];
125         int ret;
126
127         if ((!res_name) || (freq < 0))
128                 return -EINVAL;
129
130         snprintf(path, PATH_MAX, "%s%s%s",
131                 DEVFREQ_GPU_PATH_PREFIX,
132                 res_name,
133                 DEVFREQ_GPU_MIN_FREQ_PATH_SUFFIX);
134
135         ret = sysfs_write_int(path, freq);
136         if (ret < 0)
137                 return ret;
138
139         return 0;
140 }
141
142 static int tm2_dvfs_get_max_freq(char *res_name)
143 {
144         char path[PATH_MAX];
145         int freq, ret;
146
147         if (!res_name)
148                 return -EINVAL;
149
150         snprintf(path, PATH_MAX, "%s%s%s",
151                 DEVFREQ_GPU_PATH_PREFIX,
152                 res_name,
153                 DEVFREQ_GPU_MAX_FREQ_PATH_SUFFIX);
154
155         ret = sysfs_read_int(path, &freq);
156         if (ret < 0)
157                 return ret;
158
159         return freq;
160 }
161
162 static int tm2_dvfs_set_max_freq(char *res_name, int freq)
163 {
164         char path[PATH_MAX];
165         int ret;
166
167         if ((!res_name) || (freq < 0))
168                 return -EINVAL;
169
170         snprintf(path, PATH_MAX, "%s%s%s",
171                 DEVFREQ_GPU_PATH_PREFIX,
172                 res_name,
173                 DEVFREQ_GPU_MAX_FREQ_PATH_SUFFIX);
174
175         ret = sysfs_write_int(path, freq);
176         if (ret < 0)
177                 return ret;
178         return 0;
179 }
180
181
182 static struct pass_resource_dvfs_ops tm2_gpu_dvfs_ops =  {
183         .get_curr_governor = tm2_dvfs_get_curr_governor,
184         .set_curr_governor = tm2_dvfs_set_curr_governor,
185         .get_avail_governor = NULL,
186         .get_curr_freq = tm2_dvfs_get_curr_freq,
187         .get_min_freq = tm2_dvfs_get_min_freq,
188         .set_min_freq = tm2_dvfs_set_min_freq,
189         .get_max_freq = tm2_dvfs_get_max_freq,
190         .set_max_freq = tm2_dvfs_set_max_freq,
191         .get_up_threshold = NULL,
192         .set_up_threshold = NULL,
193         .get_load_table = NULL,
194 };
195
196 static int tm2_tmu_get_temp(char *res_thermal_name);
197 {
198         char path[PATH_MAX];
199         int temp;
200         int ret;
201
202         if (!res_name)
203                 return -EINVAL;
204
205         snprintf(path, PATH_MAX, "%s%s%s",
206                 TMU_PATH_PREFIX,
207                 res_thermal_name,
208                 TMU_TEMP_PATH_SUFFIX);
209
210         ret = sysfs_read_int(path, &temp);
211         if (ret < 0)
212                 return ret;
213
214         return temp;
215 }
216
217 static int tm2_tmu_get_policy(char *res_thermal_name, char *policy)
218 {
219         char path[PATH_MAX];
220         int ret;
221
222         if ((!res_name) || (!policy))
223                 return -EINVAL;
224
225         snprintf(path, PATH_MAX, "%s%s%s",
226                 TMU_PATH_PREFIX,
227                 res_thermal_name,
228                 TMU_POLICY_PATH_SUFFIX);
229
230         ret = sysfs_read_str(path, policy, BUFF_MAX);
231         if (ret < 0)
232                 return ret;
233
234         return 0;
235 }
236
237 static struct pass_resource_tmu_ops tm2_gpu_tmu_ops = {
238         .get_temp = tm2_tmu_get_temp,
239         .get_policy = tm2_tmu_get_policy,
240 };
241
242 static int tm2_gpu_open(char *res_name, struct pass_resource_info *info,
243                 struct pass_resource_common **common)
244 {
245         struct pass_resource_gpu *gpu_res;
246
247         if (!info)
248                 return -EINVAL;
249
250         /* TODO: Possibility of a memory leak */
251         gpu_res = calloc(1, sizeof(struct pass_resource_gpu));
252         if (!gpu_res)
253                 return -ENOMEM;
254
255         gpu_res->common.info = info;
256         gpu_res->dvfs = tm2_gpu_dvfs_ops;
257         gpu_res->tmu = tm2_gpu_tmu_ops;
258
259         *common = (struct pass_resource_common *) gpu_res;
260
261         return 0;
262 }
263
264 static int tm2_gpu_close(char *res_name, struct pass_resource_common *common)
265 {
266         if (!common)
267                 return -EINVAL;
268
269         free(common);
270
271         return 0;
272 }
273
274 HAL_MODULE_STRUCTURE = {
275         .magic = HAL_INFO_TAG,
276         .hal_version = HAL_VERSION,
277         .device_version = DEV_VERSION_GPU,
278         .id = PASS_RESOURCE_GPU_ID,
279         .name = PASS_RESOURCE_GPU_NAME,
280         .author = "Wook Song <wook16.song@samsung.com>",
281         .open = tm2_gpu_open,
282         .close = tm2_gpu_close,
283 };