2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Zhao Yakui <yakui.zhao@intel.com>
26 * Xiang Haihao <haihao.xiang@intel.com>
35 #include "intel_batchbuffer.h"
36 #include "intel_driver.h"
38 #include "i965_defines.h"
39 #include "i965_drv_video.h"
40 #include "i965_encoder.h"
44 #ifdef SURFACE_STATE_PADDED_SIZE
45 #undef SURFACE_STATE_PADDED_SIZE
48 #define SURFACE_STATE_PADDED_SIZE SURFACE_STATE_PADDED_SIZE_GEN8
49 #define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index)
50 #define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index)
52 #define VME_INTRA_SHADER 0
53 #define VME_INTER_SHADER 1
54 #define VME_BINTER_SHADER 3
55 #define VME_BATCHBUFFER 2
57 #define CURBE_ALLOCATION_SIZE 37 /* in 256-bit */
58 #define CURBE_TOTAL_DATA_LENGTH (4 * 32) /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */
59 #define CURBE_URB_ENTRY_LENGTH 4 /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */
61 #define VME_MSG_LENGTH 32
63 static const uint32_t gen8_vme_intra_frame[][4] = {
64 #include "shaders/vme/intra_frame_haswell.g75b"
67 static const uint32_t gen8_vme_inter_frame[][4] = {
68 #include "shaders/vme/inter_frame_haswell.g75b"
71 static const uint32_t gen8_vme_inter_bframe[][4] = {
72 #include "shaders/vme/inter_bframe_haswell.g75b"
75 static const uint32_t gen8_vme_batchbuffer[][4] = {
76 #include "shaders/vme/batchbuffer.g75b"
79 static struct i965_kernel gen8_vme_kernels[] = {
82 VME_INTRA_SHADER, /*index*/
84 sizeof(gen8_vme_intra_frame),
91 sizeof(gen8_vme_inter_frame),
98 sizeof(gen8_vme_batchbuffer),
104 gen8_vme_inter_bframe,
105 sizeof(gen8_vme_inter_bframe),
110 static const uint32_t gen8_vme_mpeg2_intra_frame[][4] = {
111 #include "shaders/vme/intra_frame_haswell.g75b"
114 static const uint32_t gen8_vme_mpeg2_inter_frame[][4] = {
115 #include "shaders/vme/mpeg2_inter_haswell.g75b"
118 static const uint32_t gen8_vme_mpeg2_batchbuffer[][4] = {
119 #include "shaders/vme/batchbuffer.g75b"
122 static struct i965_kernel gen8_vme_mpeg2_kernels[] = {
125 VME_INTRA_SHADER, /*index*/
126 gen8_vme_mpeg2_intra_frame,
127 sizeof(gen8_vme_mpeg2_intra_frame),
133 gen8_vme_mpeg2_inter_frame,
134 sizeof(gen8_vme_mpeg2_inter_frame),
140 gen8_vme_mpeg2_batchbuffer,
141 sizeof(gen8_vme_mpeg2_batchbuffer),
146 /* only used for VME source surface state */
148 gen8_vme_source_surface_state(VADriverContextP ctx,
150 struct object_surface *obj_surface,
151 struct intel_encoder_context *encoder_context)
153 struct gen6_vme_context *vme_context = encoder_context->vme_context;
155 vme_context->vme_surface2_setup(ctx,
156 &vme_context->gpe_context,
158 BINDING_TABLE_OFFSET(index),
159 SURFACE_STATE_OFFSET(index));
163 gen8_vme_media_source_surface_state(VADriverContextP ctx,
165 struct object_surface *obj_surface,
166 struct intel_encoder_context *encoder_context)
168 struct gen6_vme_context *vme_context = encoder_context->vme_context;
170 vme_context->vme_media_rw_surface_setup(ctx,
171 &vme_context->gpe_context,
173 BINDING_TABLE_OFFSET(index),
174 SURFACE_STATE_OFFSET(index));
178 gen8_vme_media_chroma_source_surface_state(VADriverContextP ctx,
180 struct object_surface *obj_surface,
181 struct intel_encoder_context *encoder_context)
183 struct gen6_vme_context *vme_context = encoder_context->vme_context;
185 vme_context->vme_media_chroma_surface_setup(ctx,
186 &vme_context->gpe_context,
188 BINDING_TABLE_OFFSET(index),
189 SURFACE_STATE_OFFSET(index));
193 gen8_vme_output_buffer_setup(VADriverContextP ctx,
194 struct encode_state *encode_state,
196 struct intel_encoder_context *encoder_context)
199 struct i965_driver_data *i965 = i965_driver_data(ctx);
200 struct gen6_vme_context *vme_context = encoder_context->vme_context;
201 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
202 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
203 int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
204 int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
205 int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
207 vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
208 vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
211 vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
213 vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
215 * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
216 * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
217 * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
220 vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
222 vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
224 assert(vme_context->vme_output.bo);
225 vme_context->vme_buffer_suface_setup(ctx,
226 &vme_context->gpe_context,
227 &vme_context->vme_output,
228 BINDING_TABLE_OFFSET(index),
229 SURFACE_STATE_OFFSET(index));
233 gen8_vme_output_vme_batchbuffer_setup(VADriverContextP ctx,
234 struct encode_state *encode_state,
236 struct intel_encoder_context *encoder_context)
239 struct i965_driver_data *i965 = i965_driver_data(ctx);
240 struct gen6_vme_context *vme_context = encoder_context->vme_context;
241 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
242 int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
243 int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
245 vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
246 vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
247 vme_context->vme_batchbuffer.pitch = 16;
248 vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
250 vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
252 vme_context->vme_buffer_suface_setup(ctx,
253 &vme_context->gpe_context,
254 &vme_context->vme_batchbuffer,
255 BINDING_TABLE_OFFSET(index),
256 SURFACE_STATE_OFFSET(index));
260 gen8_vme_surface_setup(VADriverContextP ctx,
261 struct encode_state *encode_state,
263 struct intel_encoder_context *encoder_context)
265 struct object_surface *obj_surface;
267 /*Setup surfaces state*/
268 /* current picture for encoding */
269 obj_surface = encode_state->input_yuv_object;
270 gen8_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
271 gen8_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
272 gen8_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
276 obj_surface = encode_state->reference_objects[0];
278 if (obj_surface && obj_surface->bo)
279 gen8_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
282 obj_surface = encode_state->reference_objects[1];
284 if (obj_surface && obj_surface->bo)
285 gen8_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
289 gen8_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context);
290 gen8_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
292 return VA_STATUS_SUCCESS;
295 static VAStatus gen8_vme_interface_setup(VADriverContextP ctx,
296 struct encode_state *encode_state,
297 struct intel_encoder_context *encoder_context)
299 struct gen6_vme_context *vme_context = encoder_context->vme_context;
300 struct gen8_interface_descriptor_data *desc;
304 bo = vme_context->gpe_context.idrt.bo;
309 for (i = 0; i < vme_context->vme_kernel_sum; i++) {
310 struct i965_kernel *kernel;
311 kernel = &vme_context->gpe_context.kernels[i];
312 assert(sizeof(*desc) == 32);
313 /*Setup the descritor table*/
314 memset(desc, 0, sizeof(*desc));
315 desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6);
316 desc->desc3.sampler_count = 0; /* FIXME: */
317 desc->desc3.sampler_state_pointer = 0;
318 desc->desc4.binding_table_entry_count = 1; /* FIXME: */
319 desc->desc4.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5);
320 desc->desc5.constant_urb_entry_read_offset = 0;
321 desc->desc5.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH;
325 dri_bo_emit_reloc(bo,
326 I915_GEM_DOMAIN_INSTRUCTION, 0,
328 i * sizeof(*desc) + offsetof(struct gen8_interface_descriptor_data, desc0),
334 return VA_STATUS_SUCCESS;
337 static VAStatus gen8_vme_constant_setup(VADriverContextP ctx,
338 struct encode_state *encode_state,
339 struct intel_encoder_context *encoder_context)
341 struct gen6_vme_context *vme_context = encoder_context->vme_context;
342 unsigned char *constant_buffer;
343 unsigned int *vme_state_message;
346 vme_state_message = (unsigned int *)vme_context->vme_state_message;
348 if (encoder_context->codec == CODEC_H264) {
349 if (vme_context->h264_level >= 30) {
352 if (vme_context->h264_level >= 31)
355 } else if (encoder_context->codec == CODEC_MPEG2) {
359 vme_state_message[31] = mv_num;
361 dri_bo_map(vme_context->gpe_context.curbe.bo, 1);
362 assert(vme_context->gpe_context.curbe.bo->virtual);
363 constant_buffer = vme_context->gpe_context.curbe.bo->virtual;
365 /* VME MV/Mb cost table is passed by using const buffer */
366 /* Now it uses the fixed search path. So it is constructed directly
369 memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128);
371 dri_bo_unmap(vme_context->gpe_context.curbe.bo);
373 return VA_STATUS_SUCCESS;
376 static const unsigned int intra_mb_mode_cost_table[] = {
377 0x31110001, // for qp0
378 0x09110001, // for qp1
379 0x15030001, // for qp2
380 0x0b030001, // for qp3
381 0x0d030011, // for qp4
382 0x17210011, // for qp5
383 0x41210011, // for qp6
384 0x19210011, // for qp7
385 0x25050003, // for qp8
386 0x1b130003, // for qp9
387 0x1d130003, // for qp10
388 0x27070021, // for qp11
389 0x51310021, // for qp12
390 0x29090021, // for qp13
391 0x35150005, // for qp14
392 0x2b0b0013, // for qp15
393 0x2d0d0013, // for qp16
394 0x37170007, // for qp17
395 0x61410031, // for qp18
396 0x39190009, // for qp19
397 0x45250015, // for qp20
398 0x3b1b000b, // for qp21
399 0x3d1d000d, // for qp22
400 0x47270017, // for qp23
401 0x71510041, // for qp24 ! center for qp=0..30
402 0x49290019, // for qp25
403 0x55350025, // for qp26
404 0x4b2b001b, // for qp27
405 0x4d2d001d, // for qp28
406 0x57370027, // for qp29
407 0x81610051, // for qp30
408 0x57270017, // for qp31
409 0x81510041, // for qp32 ! center for qp=31..51
410 0x59290019, // for qp33
411 0x65350025, // for qp34
412 0x5b2b001b, // for qp35
413 0x5d2d001d, // for qp36
414 0x67370027, // for qp37
415 0x91610051, // for qp38
416 0x69390029, // for qp39
417 0x75450035, // for qp40
418 0x6b3b002b, // for qp41
419 0x6d3d002d, // for qp42
420 0x77470037, // for qp43
421 0xa1710061, // for qp44
422 0x79490039, // for qp45
423 0x85550045, // for qp46
424 0x7b4b003b, // for qp47
425 0x7d4d003d, // for qp48
426 0x87570047, // for qp49
427 0xb1810071, // for qp50
428 0x89590049 // for qp51
431 static void gen8_vme_state_setup_fixup(VADriverContextP ctx,
432 struct encode_state *encode_state,
433 struct intel_encoder_context *encoder_context,
434 unsigned int *vme_state_message)
436 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
437 VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
438 VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
440 if (slice_param->slice_type != SLICE_TYPE_I &&
441 slice_param->slice_type != SLICE_TYPE_SI)
443 if (encoder_context->rate_control_mode == VA_RC_CQP)
444 vme_state_message[0] = intra_mb_mode_cost_table[pic_param->pic_init_qp + slice_param->slice_qp_delta];
446 vme_state_message[0] = intra_mb_mode_cost_table[mfc_context->bit_rate_control_context[slice_param->slice_type].QpPrimeY];
449 static VAStatus gen8_vme_vme_state_setup(VADriverContextP ctx,
450 struct encode_state *encode_state,
452 struct intel_encoder_context *encoder_context)
454 struct gen6_vme_context *vme_context = encoder_context->vme_context;
455 unsigned int *vme_state_message;
458 //pass the MV/Mb cost into VME message on HASWell
459 assert(vme_context->vme_state_message);
460 vme_state_message = (unsigned int *)vme_context->vme_state_message;
462 vme_state_message[0] = 0x4a4a4a4a;
463 vme_state_message[1] = 0x4a4a4a4a;
464 vme_state_message[2] = 0x4a4a4a4a;
465 vme_state_message[3] = 0x22120200;
466 vme_state_message[4] = 0x62524232;
468 for (i=5; i < 8; i++) {
469 vme_state_message[i] = 0;
472 switch (encoder_context->codec) {
474 gen8_vme_state_setup_fixup(ctx, encode_state, encoder_context, vme_state_message);
483 return VA_STATUS_SUCCESS;
488 gen8_vme_fill_vme_batchbuffer(VADriverContextP ctx,
489 struct encode_state *encode_state,
490 int mb_width, int mb_height,
492 int transform_8x8_mode_flag,
493 struct intel_encoder_context *encoder_context)
495 struct gen6_vme_context *vme_context = encoder_context->vme_context;
496 int mb_x = 0, mb_y = 0;
498 unsigned int *command_ptr;
500 dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
501 command_ptr = vme_context->vme_batchbuffer.bo->virtual;
503 for (s = 0; s < encode_state->num_slice_params_ext; s++) {
504 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
505 int slice_mb_begin = pSliceParameter->macroblock_address;
506 int slice_mb_number = pSliceParameter->num_macroblocks;
507 unsigned int mb_intra_ub;
508 int slice_mb_x = pSliceParameter->macroblock_address % mb_width;
509 for (i = 0; i < slice_mb_number; ) {
510 int mb_count = i + slice_mb_begin;
511 mb_x = mb_count % mb_width;
512 mb_y = mb_count / mb_width;
515 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
518 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
520 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
521 if (mb_x != (mb_width -1))
522 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
526 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
527 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
528 if ((i == (mb_width - 1)) && slice_mb_x) {
529 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
533 if ((i == mb_width) && slice_mb_x) {
534 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
536 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
537 *command_ptr++ = kernel;
544 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
545 *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
552 *command_ptr++ = MI_BATCH_BUFFER_END;
554 dri_bo_unmap(vme_context->vme_batchbuffer.bo);
557 static void gen8_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
559 struct gen6_vme_context *vme_context = encoder_context->vme_context;
561 i965_gpe_context_init(ctx, &vme_context->gpe_context);
563 /* VME output buffer */
564 dri_bo_unreference(vme_context->vme_output.bo);
565 vme_context->vme_output.bo = NULL;
567 dri_bo_unreference(vme_context->vme_batchbuffer.bo);
568 vme_context->vme_batchbuffer.bo = NULL;
571 dri_bo_unreference(vme_context->vme_state.bo);
572 vme_context->vme_state.bo = NULL;
575 static void gen8_vme_pipeline_programing(VADriverContextP ctx,
576 struct encode_state *encode_state,
577 struct intel_encoder_context *encoder_context)
579 struct gen6_vme_context *vme_context = encoder_context->vme_context;
580 struct intel_batchbuffer *batch = encoder_context->base.batch;
581 VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
582 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
583 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
584 int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
585 int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
587 bool allow_hwscore = true;
590 for (s = 0; s < encode_state->num_slice_params_ext; s++) {
591 pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
592 if ((pSliceParameter->macroblock_address % width_in_mbs)) {
593 allow_hwscore = false;
597 if ((pSliceParameter->slice_type == SLICE_TYPE_I) ||
598 (pSliceParameter->slice_type == SLICE_TYPE_I)) {
599 kernel_shader = VME_INTRA_SHADER;
600 } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) ||
601 (pSliceParameter->slice_type == SLICE_TYPE_SP)) {
602 kernel_shader = VME_INTER_SHADER;
604 kernel_shader = VME_BINTER_SHADER;
606 kernel_shader = VME_INTER_SHADER;
609 gen7_vme_walker_fill_vme_batchbuffer(ctx,
611 width_in_mbs, height_in_mbs,
613 pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
616 gen8_vme_fill_vme_batchbuffer(ctx,
618 width_in_mbs, height_in_mbs,
620 pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
623 intel_batchbuffer_start_atomic(batch, 0x1000);
624 gen8_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
625 BEGIN_BATCH(batch, 2);
626 OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
628 vme_context->vme_batchbuffer.bo,
629 I915_GEM_DOMAIN_COMMAND, 0,
631 ADVANCE_BATCH(batch);
633 intel_batchbuffer_end_atomic(batch);
636 static VAStatus gen8_vme_prepare(VADriverContextP ctx,
637 struct encode_state *encode_state,
638 struct intel_encoder_context *encoder_context)
640 VAStatus vaStatus = VA_STATUS_SUCCESS;
641 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
642 int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
643 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
644 struct gen6_vme_context *vme_context = encoder_context->vme_context;
646 if (!vme_context->h264_level ||
647 (vme_context->h264_level != pSequenceParameter->level_idc)) {
648 vme_context->h264_level = pSequenceParameter->level_idc;
651 intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context);
653 /*Setup all the memory object*/
654 gen8_vme_surface_setup(ctx, encode_state, is_intra, encoder_context);
655 gen8_vme_interface_setup(ctx, encode_state, encoder_context);
656 //gen8_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context);
657 gen8_vme_constant_setup(ctx, encode_state, encoder_context);
659 /*Programing media pipeline*/
660 gen8_vme_pipeline_programing(ctx, encode_state, encoder_context);
665 static VAStatus gen8_vme_run(VADriverContextP ctx,
666 struct encode_state *encode_state,
667 struct intel_encoder_context *encoder_context)
669 struct intel_batchbuffer *batch = encoder_context->base.batch;
671 intel_batchbuffer_flush(batch);
673 return VA_STATUS_SUCCESS;
676 static VAStatus gen8_vme_stop(VADriverContextP ctx,
677 struct encode_state *encode_state,
678 struct intel_encoder_context *encoder_context)
680 return VA_STATUS_SUCCESS;
684 gen8_vme_pipeline(VADriverContextP ctx,
686 struct encode_state *encode_state,
687 struct intel_encoder_context *encoder_context)
689 gen8_vme_media_init(ctx, encoder_context);
690 gen8_vme_prepare(ctx, encode_state, encoder_context);
691 gen8_vme_run(ctx, encode_state, encoder_context);
692 gen8_vme_stop(ctx, encode_state, encoder_context);
694 return VA_STATUS_SUCCESS;
698 gen8_vme_mpeg2_output_buffer_setup(VADriverContextP ctx,
699 struct encode_state *encode_state,
702 struct intel_encoder_context *encoder_context)
705 struct i965_driver_data *i965 = i965_driver_data(ctx);
706 struct gen6_vme_context *vme_context = encoder_context->vme_context;
707 VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
708 int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
709 int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
711 vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
712 vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
715 vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
717 vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
719 * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
720 * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
721 * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
724 vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
726 vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
728 assert(vme_context->vme_output.bo);
729 vme_context->vme_buffer_suface_setup(ctx,
730 &vme_context->gpe_context,
731 &vme_context->vme_output,
732 BINDING_TABLE_OFFSET(index),
733 SURFACE_STATE_OFFSET(index));
737 gen8_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx,
738 struct encode_state *encode_state,
740 struct intel_encoder_context *encoder_context)
743 struct i965_driver_data *i965 = i965_driver_data(ctx);
744 struct gen6_vme_context *vme_context = encoder_context->vme_context;
745 VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
746 int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
747 int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
749 vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
750 vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
751 vme_context->vme_batchbuffer.pitch = 16;
752 vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
754 vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
756 vme_context->vme_buffer_suface_setup(ctx,
757 &vme_context->gpe_context,
758 &vme_context->vme_batchbuffer,
759 BINDING_TABLE_OFFSET(index),
760 SURFACE_STATE_OFFSET(index));
764 gen8_vme_mpeg2_surface_setup(VADriverContextP ctx,
765 struct encode_state *encode_state,
767 struct intel_encoder_context *encoder_context)
769 struct object_surface *obj_surface;
771 /*Setup surfaces state*/
772 /* current picture for encoding */
773 obj_surface = encode_state->input_yuv_object;
774 gen8_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
775 gen8_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
776 gen8_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
780 obj_surface = encode_state->reference_objects[0];
782 if (obj_surface->bo != NULL)
783 gen8_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
786 obj_surface = encode_state->reference_objects[1];
788 if (obj_surface && obj_surface->bo != NULL)
789 gen8_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
793 gen8_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context);
794 gen8_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
796 return VA_STATUS_SUCCESS;
800 gen8_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx,
801 struct encode_state *encode_state,
802 int mb_width, int mb_height,
804 int transform_8x8_mode_flag,
805 struct intel_encoder_context *encoder_context)
807 struct gen6_vme_context *vme_context = encoder_context->vme_context;
808 int mb_x = 0, mb_y = 0;
810 unsigned int *command_ptr;
813 dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
814 command_ptr = vme_context->vme_batchbuffer.bo->virtual;
816 for (s = 0; s < encode_state->num_slice_params_ext; s++) {
817 VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer;
819 for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) {
820 int slice_mb_begin = slice_param->macroblock_address;
821 int slice_mb_number = slice_param->num_macroblocks;
822 unsigned int mb_intra_ub;
823 int slice_mb_x = slice_param->macroblock_address % mb_width;
825 for (i = 0; i < slice_mb_number;) {
826 int mb_count = i + slice_mb_begin;
828 mb_x = mb_count % mb_width;
829 mb_y = mb_count / mb_width;
833 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
837 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
840 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
842 if (mb_x != (mb_width -1))
843 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
848 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
850 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
852 if ((i == (mb_width - 1)) && slice_mb_x) {
853 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
857 if ((i == mb_width) && slice_mb_x) {
858 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
861 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
862 *command_ptr++ = kernel;
869 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
870 *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
880 *command_ptr++ = MI_BATCH_BUFFER_END;
882 dri_bo_unmap(vme_context->vme_batchbuffer.bo);
886 gen8_vme_mpeg2_pipeline_programing(VADriverContextP ctx,
887 struct encode_state *encode_state,
889 struct intel_encoder_context *encoder_context)
891 struct gen6_vme_context *vme_context = encoder_context->vme_context;
892 struct intel_batchbuffer *batch = encoder_context->base.batch;
893 VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
894 int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
895 int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
897 gen8_vme_mpeg2_fill_vme_batchbuffer(ctx,
899 width_in_mbs, height_in_mbs,
900 is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER,
904 intel_batchbuffer_start_atomic(batch, 0x1000);
905 gen8_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
906 BEGIN_BATCH(batch, 2);
907 OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
909 vme_context->vme_batchbuffer.bo,
910 I915_GEM_DOMAIN_COMMAND, 0,
912 ADVANCE_BATCH(batch);
914 intel_batchbuffer_end_atomic(batch);
918 gen8_vme_mpeg2_prepare(VADriverContextP ctx,
919 struct encode_state *encode_state,
920 struct intel_encoder_context *encoder_context)
922 VAStatus vaStatus = VA_STATUS_SUCCESS;
923 VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
925 /*Setup all the memory object*/
926 gen8_vme_mpeg2_surface_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
927 gen8_vme_interface_setup(ctx, encode_state, encoder_context);
928 gen8_vme_vme_state_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
929 gen8_vme_constant_setup(ctx, encode_state, encoder_context);
931 /*Programing media pipeline*/
932 gen8_vme_mpeg2_pipeline_programing(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
938 gen8_vme_mpeg2_pipeline(VADriverContextP ctx,
940 struct encode_state *encode_state,
941 struct intel_encoder_context *encoder_context)
943 gen8_vme_media_init(ctx, encoder_context);
944 gen8_vme_mpeg2_prepare(ctx, encode_state, encoder_context);
945 gen8_vme_run(ctx, encode_state, encoder_context);
946 gen8_vme_stop(ctx, encode_state, encoder_context);
948 return VA_STATUS_SUCCESS;
952 gen8_vme_context_destroy(void *context)
954 struct gen6_vme_context *vme_context = context;
956 i965_gpe_context_destroy(&vme_context->gpe_context);
958 dri_bo_unreference(vme_context->vme_output.bo);
959 vme_context->vme_output.bo = NULL;
961 dri_bo_unreference(vme_context->vme_state.bo);
962 vme_context->vme_state.bo = NULL;
964 dri_bo_unreference(vme_context->vme_batchbuffer.bo);
965 vme_context->vme_batchbuffer.bo = NULL;
967 if (vme_context->vme_state_message) {
968 free(vme_context->vme_state_message);
969 vme_context->vme_state_message = NULL;
975 Bool gen8_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
977 struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context));
978 struct i965_kernel *vme_kernel_list = NULL;
981 switch (encoder_context->codec) {
983 vme_kernel_list = gen8_vme_kernels;
984 encoder_context->vme_pipeline = gen8_vme_pipeline;
985 i965_kernel_num = sizeof(gen8_vme_kernels) / sizeof(struct i965_kernel);
989 vme_kernel_list = gen8_vme_mpeg2_kernels;
990 encoder_context->vme_pipeline = gen8_vme_mpeg2_pipeline;
991 i965_kernel_num = sizeof(gen8_vme_mpeg2_kernels) / sizeof(struct i965_kernel);
1001 vme_context->vme_kernel_sum = i965_kernel_num;
1002 vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
1004 vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6;
1005 vme_context->gpe_context.idrt.entry_size = sizeof(struct gen8_interface_descriptor_data);
1007 vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH;
1009 vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
1010 vme_context->gpe_context.vfe_state.num_urb_entries = 16;
1011 vme_context->gpe_context.vfe_state.gpgpu_mode = 0;
1012 vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1;
1013 vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1;
1015 gen7_vme_scoreboard_init(ctx, vme_context);
1017 i965_gpe_load_kernels(ctx,
1018 &vme_context->gpe_context,
1021 vme_context->vme_surface2_setup = gen8_gpe_surface2_setup;
1022 vme_context->vme_media_rw_surface_setup = gen8_gpe_media_rw_surface_setup;
1023 vme_context->vme_buffer_suface_setup = gen8_gpe_buffer_suface_setup;
1024 vme_context->vme_media_chroma_surface_setup = gen8_gpe_media_chroma_surface_setup;
1026 encoder_context->vme_context = vme_context;
1027 encoder_context->vme_context_destroy = gen8_vme_context_destroy;
1029 vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int));