Avoid the duplicated macro-definition of surface size
[platform/upstream/libva-intel-driver.git] / src / gen8_vme.c
1 /*
2  * Copyright © 2012 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the
6  * "Software"), to deal in the Software without restriction, including
7  * without limitation the rights to use, copy, modify, merge, publish,
8  * distribute, sub license, and/or sell copies of the Software, and to
9  * permit persons to whom the Software is furnished to do so, subject to
10  * the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the
13  * next paragraph) shall be included in all copies or substantial portions
14  * of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *    Zhao Yakui <yakui.zhao@intel.com>
26  *    Xiang Haihao <haihao.xiang@intel.com>
27  */
28
29 #include <stdio.h>
30 #include <stdlib.h>
31 #include <stdbool.h>
32 #include <string.h>
33 #include <assert.h>
34
35 #include "intel_batchbuffer.h"
36 #include "intel_driver.h"
37
38 #include "i965_defines.h"
39 #include "i965_drv_video.h"
40 #include "i965_encoder.h"
41 #include "gen6_vme.h"
42 #include "gen6_mfc.h"
43
44 #ifdef SURFACE_STATE_PADDED_SIZE
45 #undef SURFACE_STATE_PADDED_SIZE
46 #endif
47
48 #define SURFACE_STATE_PADDED_SIZE               MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7)
49 #define SURFACE_STATE_OFFSET(index)             (SURFACE_STATE_PADDED_SIZE * index)
50 #define BINDING_TABLE_OFFSET(index)             (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index)
51
52 #define VME_INTRA_SHADER        0
53 #define VME_INTER_SHADER        1
54 #define VME_BINTER_SHADER       3
55 #define VME_BATCHBUFFER         2
56
57 #define CURBE_ALLOCATION_SIZE   37              /* in 256-bit */
58 #define CURBE_TOTAL_DATA_LENGTH (4 * 32)        /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */
59 #define CURBE_URB_ENTRY_LENGTH  4               /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */
60
61 #define VME_MSG_LENGTH          32
62   
63 static const uint32_t gen8_vme_intra_frame[][4] = {
64 #include "shaders/vme/intra_frame_haswell.g75b"
65 };
66
67 static const uint32_t gen8_vme_inter_frame[][4] = {
68 #include "shaders/vme/inter_frame_haswell.g75b"
69 };
70
71 static const uint32_t gen8_vme_inter_bframe[][4] = {
72 #include "shaders/vme/inter_bframe_haswell.g75b"
73 };
74
75 static const uint32_t gen8_vme_batchbuffer[][4] = {
76 #include "shaders/vme/batchbuffer.g75b"
77 };
78
79 static struct i965_kernel gen8_vme_kernels[] = {
80     {
81         "VME Intra Frame",
82         VME_INTRA_SHADER, /*index*/
83         gen8_vme_intra_frame,                   
84         sizeof(gen8_vme_intra_frame),           
85         NULL
86     },
87     {
88         "VME inter Frame",
89         VME_INTER_SHADER,
90         gen8_vme_inter_frame,
91         sizeof(gen8_vme_inter_frame),
92         NULL
93     },
94     {
95         "VME BATCHBUFFER",
96         VME_BATCHBUFFER,
97         gen8_vme_batchbuffer,
98         sizeof(gen8_vme_batchbuffer),
99         NULL
100     },
101     {
102         "VME inter BFrame",
103         VME_BINTER_SHADER,
104         gen8_vme_inter_bframe,
105         sizeof(gen8_vme_inter_bframe),
106         NULL
107     }
108 };
109
110 static const uint32_t gen8_vme_mpeg2_intra_frame[][4] = {
111 #include "shaders/vme/intra_frame_haswell.g75b"
112 };
113
114 static const uint32_t gen8_vme_mpeg2_inter_frame[][4] = {
115 #include "shaders/vme/mpeg2_inter_haswell.g75b"
116 };
117
118 static const uint32_t gen8_vme_mpeg2_batchbuffer[][4] = {
119 #include "shaders/vme/batchbuffer.g75b"
120 };
121
122 static struct i965_kernel gen8_vme_mpeg2_kernels[] = {
123     {
124         "VME Intra Frame",
125         VME_INTRA_SHADER, /*index*/
126         gen8_vme_mpeg2_intra_frame,                     
127         sizeof(gen8_vme_mpeg2_intra_frame),             
128         NULL
129     },
130     {
131         "VME inter Frame",
132         VME_INTER_SHADER,
133         gen8_vme_mpeg2_inter_frame,
134         sizeof(gen8_vme_mpeg2_inter_frame),
135         NULL
136     },
137     {
138         "VME BATCHBUFFER",
139         VME_BATCHBUFFER,
140         gen8_vme_mpeg2_batchbuffer,
141         sizeof(gen8_vme_mpeg2_batchbuffer),
142         NULL
143     },
144 };
145
146 /* only used for VME source surface state */
147 static void 
148 gen8_vme_source_surface_state(VADriverContextP ctx,
149                                int index,
150                                struct object_surface *obj_surface,
151                                struct intel_encoder_context *encoder_context)
152 {
153     struct gen6_vme_context *vme_context = encoder_context->vme_context;
154
155     vme_context->vme_surface2_setup(ctx,
156                                     &vme_context->gpe_context,
157                                     obj_surface,
158                                     BINDING_TABLE_OFFSET(index),
159                                     SURFACE_STATE_OFFSET(index));
160 }
161
162 static void
163 gen8_vme_media_source_surface_state(VADriverContextP ctx,
164                                      int index,
165                                      struct object_surface *obj_surface,
166                                      struct intel_encoder_context *encoder_context)
167 {
168     struct gen6_vme_context *vme_context = encoder_context->vme_context;
169
170     vme_context->vme_media_rw_surface_setup(ctx,
171                                             &vme_context->gpe_context,
172                                             obj_surface,
173                                             BINDING_TABLE_OFFSET(index),
174                                             SURFACE_STATE_OFFSET(index));
175 }
176
177 static void
178 gen8_vme_media_chroma_source_surface_state(VADriverContextP ctx,
179                                             int index,
180                                             struct object_surface *obj_surface,
181                                             struct intel_encoder_context *encoder_context)
182 {
183     struct gen6_vme_context *vme_context = encoder_context->vme_context;
184
185     vme_context->vme_media_chroma_surface_setup(ctx,
186                                                 &vme_context->gpe_context,
187                                                 obj_surface,
188                                                 BINDING_TABLE_OFFSET(index),
189                                                 SURFACE_STATE_OFFSET(index));
190 }
191
192 static void
193 gen8_vme_output_buffer_setup(VADriverContextP ctx,
194                               struct encode_state *encode_state,
195                               int index,
196                               struct intel_encoder_context *encoder_context)
197
198 {
199     struct i965_driver_data *i965 = i965_driver_data(ctx);
200     struct gen6_vme_context *vme_context = encoder_context->vme_context;
201     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
202     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
203     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
204     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
205     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
206
207     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
208     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
209
210     if (is_intra)
211         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
212     else
213         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
214     /*
215      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
216      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
217      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
218      */
219
220     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr, 
221                                               "VME output buffer",
222                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
223                                               0x1000);
224     assert(vme_context->vme_output.bo);
225     vme_context->vme_buffer_suface_setup(ctx,
226                                          &vme_context->gpe_context,
227                                          &vme_context->vme_output,
228                                          BINDING_TABLE_OFFSET(index),
229                                          SURFACE_STATE_OFFSET(index));
230 }
231
232 static void
233 gen8_vme_output_vme_batchbuffer_setup(VADriverContextP ctx,
234                                        struct encode_state *encode_state,
235                                        int index,
236                                        struct intel_encoder_context *encoder_context)
237
238 {
239     struct i965_driver_data *i965 = i965_driver_data(ctx);
240     struct gen6_vme_context *vme_context = encoder_context->vme_context;
241     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
242     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
243     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
244
245     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
246     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
247     vme_context->vme_batchbuffer.pitch = 16;
248     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr, 
249                                                    "VME batchbuffer",
250                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
251                                                    0x1000);
252     vme_context->vme_buffer_suface_setup(ctx,
253                                          &vme_context->gpe_context,
254                                          &vme_context->vme_batchbuffer,
255                                          BINDING_TABLE_OFFSET(index),
256                                          SURFACE_STATE_OFFSET(index));
257 }
258
259 static VAStatus
260 gen8_vme_surface_setup(VADriverContextP ctx, 
261                         struct encode_state *encode_state,
262                         int is_intra,
263                         struct intel_encoder_context *encoder_context)
264 {
265     struct object_surface *obj_surface;
266
267     /*Setup surfaces state*/
268     /* current picture for encoding */
269     obj_surface = encode_state->input_yuv_object;
270     gen8_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
271     gen8_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
272     gen8_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
273
274     if (!is_intra) {
275         /* reference 0 */
276         obj_surface = encode_state->reference_objects[0];
277
278         if (obj_surface && obj_surface->bo)
279             gen8_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
280
281         /* reference 1 */
282         obj_surface = encode_state->reference_objects[1];
283
284         if (obj_surface && obj_surface->bo)
285             gen8_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
286     }
287
288     /* VME output */
289     gen8_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context);
290     gen8_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
291
292     return VA_STATUS_SUCCESS;
293 }
294
295 static VAStatus gen8_vme_interface_setup(VADriverContextP ctx, 
296                                           struct encode_state *encode_state,
297                                           struct intel_encoder_context *encoder_context)
298 {
299     struct gen6_vme_context *vme_context = encoder_context->vme_context;
300     struct gen6_interface_descriptor_data *desc;   
301     int i;
302     dri_bo *bo;
303
304     bo = vme_context->gpe_context.idrt.bo;
305     dri_bo_map(bo, 1);
306     assert(bo->virtual);
307     desc = bo->virtual;
308
309     for (i = 0; i < vme_context->vme_kernel_sum; i++) {
310         struct i965_kernel *kernel;
311         kernel = &vme_context->gpe_context.kernels[i];
312         assert(sizeof(*desc) == 32);
313         /*Setup the descritor table*/
314         memset(desc, 0, sizeof(*desc));
315         desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6);
316         desc->desc2.sampler_count = 0; /* FIXME: */
317         desc->desc2.sampler_state_pointer = 0;
318         desc->desc3.binding_table_entry_count = 1; /* FIXME: */
319         desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5);
320         desc->desc4.constant_urb_entry_read_offset = 0;
321         desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH;
322                 
323         /*kernel start*/
324         dri_bo_emit_reloc(bo,   
325                           I915_GEM_DOMAIN_INSTRUCTION, 0,
326                           0,
327                           i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0),
328                           kernel->bo);
329         desc++;
330     }
331     dri_bo_unmap(bo);
332
333     return VA_STATUS_SUCCESS;
334 }
335
336 static VAStatus gen8_vme_constant_setup(VADriverContextP ctx, 
337                                          struct encode_state *encode_state,
338                                          struct intel_encoder_context *encoder_context)
339 {
340     struct gen6_vme_context *vme_context = encoder_context->vme_context;
341     unsigned char *constant_buffer;
342     unsigned int *vme_state_message;
343     int mv_num = 32;
344
345     vme_state_message = (unsigned int *)vme_context->vme_state_message;
346
347     if (encoder_context->codec == CODEC_H264) {
348         if (vme_context->h264_level >= 30) {
349             mv_num = 16;
350         
351             if (vme_context->h264_level >= 31)
352                 mv_num = 8;
353         } 
354     } else if (encoder_context->codec == CODEC_MPEG2) {
355         mv_num = 2;
356     }
357
358     vme_state_message[31] = mv_num;
359
360     dri_bo_map(vme_context->gpe_context.curbe.bo, 1);
361     assert(vme_context->gpe_context.curbe.bo->virtual);
362     constant_buffer = vme_context->gpe_context.curbe.bo->virtual;
363
364     /* VME MV/Mb cost table is passed by using const buffer */
365     /* Now it uses the fixed search path. So it is constructed directly
366      * in the GPU shader.
367      */
368     memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128);
369         
370     dri_bo_unmap(vme_context->gpe_context.curbe.bo);
371
372     return VA_STATUS_SUCCESS;
373 }
374
375 static const unsigned int intra_mb_mode_cost_table[] = {
376     0x31110001, // for qp0
377     0x09110001, // for qp1
378     0x15030001, // for qp2
379     0x0b030001, // for qp3
380     0x0d030011, // for qp4
381     0x17210011, // for qp5
382     0x41210011, // for qp6
383     0x19210011, // for qp7
384     0x25050003, // for qp8
385     0x1b130003, // for qp9
386     0x1d130003, // for qp10
387     0x27070021, // for qp11
388     0x51310021, // for qp12
389     0x29090021, // for qp13
390     0x35150005, // for qp14
391     0x2b0b0013, // for qp15
392     0x2d0d0013, // for qp16
393     0x37170007, // for qp17
394     0x61410031, // for qp18
395     0x39190009, // for qp19
396     0x45250015, // for qp20
397     0x3b1b000b, // for qp21
398     0x3d1d000d, // for qp22
399     0x47270017, // for qp23
400     0x71510041, // for qp24 ! center for qp=0..30
401     0x49290019, // for qp25
402     0x55350025, // for qp26
403     0x4b2b001b, // for qp27
404     0x4d2d001d, // for qp28
405     0x57370027, // for qp29
406     0x81610051, // for qp30
407     0x57270017, // for qp31
408     0x81510041, // for qp32 ! center for qp=31..51
409     0x59290019, // for qp33
410     0x65350025, // for qp34
411     0x5b2b001b, // for qp35
412     0x5d2d001d, // for qp36
413     0x67370027, // for qp37
414     0x91610051, // for qp38
415     0x69390029, // for qp39
416     0x75450035, // for qp40
417     0x6b3b002b, // for qp41
418     0x6d3d002d, // for qp42
419     0x77470037, // for qp43
420     0xa1710061, // for qp44
421     0x79490039, // for qp45
422     0x85550045, // for qp46
423     0x7b4b003b, // for qp47
424     0x7d4d003d, // for qp48
425     0x87570047, // for qp49
426     0xb1810071, // for qp50
427     0x89590049  // for qp51
428 };
429
430 static void gen8_vme_state_setup_fixup(VADriverContextP ctx,
431                                         struct encode_state *encode_state,
432                                         struct intel_encoder_context *encoder_context,
433                                         unsigned int *vme_state_message)
434 {
435     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
436     VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
437     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
438
439     if (slice_param->slice_type != SLICE_TYPE_I &&
440         slice_param->slice_type != SLICE_TYPE_SI)
441         return;
442     if (encoder_context->rate_control_mode == VA_RC_CQP)
443         vme_state_message[0] = intra_mb_mode_cost_table[pic_param->pic_init_qp + slice_param->slice_qp_delta];
444     else
445         vme_state_message[0] = intra_mb_mode_cost_table[mfc_context->bit_rate_control_context[slice_param->slice_type].QpPrimeY];
446 }
447
448 static VAStatus gen8_vme_vme_state_setup(VADriverContextP ctx,
449                                           struct encode_state *encode_state,
450                                           int is_intra,
451                                           struct intel_encoder_context *encoder_context)
452 {
453     struct gen6_vme_context *vme_context = encoder_context->vme_context;
454     unsigned int *vme_state_message;
455     int i;
456         
457     //pass the MV/Mb cost into VME message on HASWell
458     assert(vme_context->vme_state_message);
459     vme_state_message = (unsigned int *)vme_context->vme_state_message;
460
461     vme_state_message[0] = 0x4a4a4a4a;
462     vme_state_message[1] = 0x4a4a4a4a;
463     vme_state_message[2] = 0x4a4a4a4a;
464     vme_state_message[3] = 0x22120200;
465     vme_state_message[4] = 0x62524232;
466
467     for (i=5; i < 8; i++) {
468         vme_state_message[i] = 0;
469     }
470
471     switch (encoder_context->codec) {
472     case CODEC_H264:
473         gen8_vme_state_setup_fixup(ctx, encode_state, encoder_context, vme_state_message);
474
475         break;
476
477     default:
478         /* no fixup */
479         break;
480     }
481
482     return VA_STATUS_SUCCESS;
483 }
484
485
486 static void
487 gen8_vme_fill_vme_batchbuffer(VADriverContextP ctx, 
488                                struct encode_state *encode_state,
489                                int mb_width, int mb_height,
490                                int kernel,
491                                int transform_8x8_mode_flag,
492                                struct intel_encoder_context *encoder_context)
493 {
494     struct gen6_vme_context *vme_context = encoder_context->vme_context;
495     int mb_x = 0, mb_y = 0;
496     int i, s;
497     unsigned int *command_ptr;
498
499     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
500     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
501
502     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
503         VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; 
504         int slice_mb_begin = pSliceParameter->macroblock_address;
505         int slice_mb_number = pSliceParameter->num_macroblocks;
506         unsigned int mb_intra_ub;
507         int slice_mb_x = pSliceParameter->macroblock_address % mb_width; 
508         for (i = 0; i < slice_mb_number;  ) {
509             int mb_count = i + slice_mb_begin;    
510             mb_x = mb_count % mb_width;
511             mb_y = mb_count / mb_width;
512             mb_intra_ub = 0;
513             if (mb_x != 0) {
514                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
515             }
516             if (mb_y != 0) {
517                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
518                 if (mb_x != 0)
519                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
520                 if (mb_x != (mb_width -1))
521                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
522             }
523             if (i < mb_width) {
524                 if (i == 0)
525                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
526                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
527                 if ((i == (mb_width - 1)) && slice_mb_x) {
528                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
529                 }
530             }
531                 
532             if ((i == mb_width) && slice_mb_x) {
533                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
534             }
535             *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
536             *command_ptr++ = kernel;
537             *command_ptr++ = 0;
538             *command_ptr++ = 0;
539             *command_ptr++ = 0;
540             *command_ptr++ = 0;
541    
542             /*inline data */
543             *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
544             *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
545
546             i += 1;
547         } 
548     }
549
550     *command_ptr++ = 0;
551     *command_ptr++ = MI_BATCH_BUFFER_END;
552
553     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
554 }
555
556 static void gen8_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
557 {
558     struct gen6_vme_context *vme_context = encoder_context->vme_context;
559
560     i965_gpe_context_init(ctx, &vme_context->gpe_context);
561
562     /* VME output buffer */
563     dri_bo_unreference(vme_context->vme_output.bo);
564     vme_context->vme_output.bo = NULL;
565
566     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
567     vme_context->vme_batchbuffer.bo = NULL;
568
569     /* VME state */
570     dri_bo_unreference(vme_context->vme_state.bo);
571     vme_context->vme_state.bo = NULL;
572 }
573
574 static void gen8_vme_pipeline_programing(VADriverContextP ctx, 
575                                           struct encode_state *encode_state,
576                                           struct intel_encoder_context *encoder_context)
577 {
578     struct gen6_vme_context *vme_context = encoder_context->vme_context;
579     struct intel_batchbuffer *batch = encoder_context->base.batch;
580     VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
581     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
582     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
583     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
584     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
585     int kernel_shader;
586     bool allow_hwscore = true;
587     int s;
588
589     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
590         pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; 
591         if ((pSliceParameter->macroblock_address % width_in_mbs)) {
592                 allow_hwscore = false;
593                 break;
594         }
595     }
596     if ((pSliceParameter->slice_type == SLICE_TYPE_I) ||
597         (pSliceParameter->slice_type == SLICE_TYPE_I)) {
598         kernel_shader = VME_INTRA_SHADER;
599    } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) ||
600         (pSliceParameter->slice_type == SLICE_TYPE_SP)) {
601         kernel_shader = VME_INTER_SHADER;
602    } else {
603         kernel_shader = VME_BINTER_SHADER;
604         if (!allow_hwscore)
605              kernel_shader = VME_INTER_SHADER;
606    }
607     if (allow_hwscore)
608         gen7_vme_walker_fill_vme_batchbuffer(ctx, 
609                                   encode_state,
610                                   width_in_mbs, height_in_mbs,
611                                   kernel_shader,
612                                   pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
613                                   encoder_context);
614     else
615         gen8_vme_fill_vme_batchbuffer(ctx, 
616                                    encode_state,
617                                    width_in_mbs, height_in_mbs,
618                                    kernel_shader,
619                                    pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
620                                    encoder_context);
621
622     intel_batchbuffer_start_atomic(batch, 0x1000);
623     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
624     BEGIN_BATCH(batch, 2);
625     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
626     OUT_RELOC(batch,
627               vme_context->vme_batchbuffer.bo,
628               I915_GEM_DOMAIN_COMMAND, 0, 
629               0);
630     ADVANCE_BATCH(batch);
631
632     intel_batchbuffer_end_atomic(batch);        
633 }
634
635 static VAStatus gen8_vme_prepare(VADriverContextP ctx, 
636                                   struct encode_state *encode_state,
637                                   struct intel_encoder_context *encoder_context)
638 {
639     VAStatus vaStatus = VA_STATUS_SUCCESS;
640     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
641     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
642     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
643     struct gen6_vme_context *vme_context = encoder_context->vme_context;
644
645     if (!vme_context->h264_level ||
646         (vme_context->h264_level != pSequenceParameter->level_idc)) {
647         vme_context->h264_level = pSequenceParameter->level_idc;        
648     }   
649
650     intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context);
651         
652     /*Setup all the memory object*/
653     gen8_vme_surface_setup(ctx, encode_state, is_intra, encoder_context);
654     gen8_vme_interface_setup(ctx, encode_state, encoder_context);
655     //gen8_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context);
656     gen8_vme_constant_setup(ctx, encode_state, encoder_context);
657
658     /*Programing media pipeline*/
659     gen8_vme_pipeline_programing(ctx, encode_state, encoder_context);
660
661     return vaStatus;
662 }
663
664 static VAStatus gen8_vme_run(VADriverContextP ctx, 
665                               struct encode_state *encode_state,
666                               struct intel_encoder_context *encoder_context)
667 {
668     struct intel_batchbuffer *batch = encoder_context->base.batch;
669
670     intel_batchbuffer_flush(batch);
671
672     return VA_STATUS_SUCCESS;
673 }
674
675 static VAStatus gen8_vme_stop(VADriverContextP ctx, 
676                                struct encode_state *encode_state,
677                                struct intel_encoder_context *encoder_context)
678 {
679     return VA_STATUS_SUCCESS;
680 }
681
682 static VAStatus
683 gen8_vme_pipeline(VADriverContextP ctx,
684                    VAProfile profile,
685                    struct encode_state *encode_state,
686                    struct intel_encoder_context *encoder_context)
687 {
688     gen8_vme_media_init(ctx, encoder_context);
689     gen8_vme_prepare(ctx, encode_state, encoder_context);
690     gen8_vme_run(ctx, encode_state, encoder_context);
691     gen8_vme_stop(ctx, encode_state, encoder_context);
692
693     return VA_STATUS_SUCCESS;
694 }
695
696 static void
697 gen8_vme_mpeg2_output_buffer_setup(VADriverContextP ctx,
698                                     struct encode_state *encode_state,
699                                     int index,
700                                     int is_intra,
701                                     struct intel_encoder_context *encoder_context)
702
703 {
704     struct i965_driver_data *i965 = i965_driver_data(ctx);
705     struct gen6_vme_context *vme_context = encoder_context->vme_context;
706     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
707     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
708     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
709
710     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
711     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
712
713     if (is_intra)
714         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
715     else
716         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
717     /*
718      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
719      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
720      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
721      */
722
723     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr, 
724                                               "VME output buffer",
725                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
726                                               0x1000);
727     assert(vme_context->vme_output.bo);
728     vme_context->vme_buffer_suface_setup(ctx,
729                                          &vme_context->gpe_context,
730                                          &vme_context->vme_output,
731                                          BINDING_TABLE_OFFSET(index),
732                                          SURFACE_STATE_OFFSET(index));
733 }
734
735 static void
736 gen8_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx,
737                                              struct encode_state *encode_state,
738                                              int index,
739                                              struct intel_encoder_context *encoder_context)
740
741 {
742     struct i965_driver_data *i965 = i965_driver_data(ctx);
743     struct gen6_vme_context *vme_context = encoder_context->vme_context;
744     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
745     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
746     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
747
748     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
749     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
750     vme_context->vme_batchbuffer.pitch = 16;
751     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr, 
752                                                    "VME batchbuffer",
753                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
754                                                    0x1000);
755     vme_context->vme_buffer_suface_setup(ctx,
756                                          &vme_context->gpe_context,
757                                          &vme_context->vme_batchbuffer,
758                                          BINDING_TABLE_OFFSET(index),
759                                          SURFACE_STATE_OFFSET(index));
760 }
761
762 static VAStatus
763 gen8_vme_mpeg2_surface_setup(VADriverContextP ctx, 
764                               struct encode_state *encode_state,
765                               int is_intra,
766                               struct intel_encoder_context *encoder_context)
767 {
768     struct object_surface *obj_surface;
769
770     /*Setup surfaces state*/
771     /* current picture for encoding */
772     obj_surface = encode_state->input_yuv_object;
773     gen8_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
774     gen8_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
775     gen8_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
776
777     if (!is_intra) {
778         /* reference 0 */
779         obj_surface = encode_state->reference_objects[0];
780
781         if (obj_surface->bo != NULL)
782             gen8_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
783
784         /* reference 1 */
785         obj_surface = encode_state->reference_objects[1];
786
787         if (obj_surface && obj_surface->bo != NULL) 
788             gen8_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
789     }
790
791     /* VME output */
792     gen8_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context);
793     gen8_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
794
795     return VA_STATUS_SUCCESS;
796 }
797
798 static void
799 gen8_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx, 
800                                      struct encode_state *encode_state,
801                                      int mb_width, int mb_height,
802                                      int kernel,
803                                      int transform_8x8_mode_flag,
804                                      struct intel_encoder_context *encoder_context)
805 {
806     struct gen6_vme_context *vme_context = encoder_context->vme_context;
807     int mb_x = 0, mb_y = 0;
808     int i, s, j;
809     unsigned int *command_ptr;
810
811
812     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
813     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
814
815     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
816         VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer;
817
818         for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) {
819             int slice_mb_begin = slice_param->macroblock_address;
820             int slice_mb_number = slice_param->num_macroblocks;
821             unsigned int mb_intra_ub;
822             int slice_mb_x = slice_param->macroblock_address % mb_width;
823
824             for (i = 0; i < slice_mb_number;) {
825                 int mb_count = i + slice_mb_begin;    
826
827                 mb_x = mb_count % mb_width;
828                 mb_y = mb_count / mb_width;
829                 mb_intra_ub = 0;
830
831                 if (mb_x != 0) {
832                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
833                 }
834
835                 if (mb_y != 0) {
836                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
837
838                     if (mb_x != 0)
839                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
840
841                     if (mb_x != (mb_width -1))
842                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
843                 }
844
845                 if (i < mb_width) {
846                     if (i == 0)
847                         mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
848
849                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
850
851                     if ((i == (mb_width - 1)) && slice_mb_x) {
852                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
853                     }
854                 }
855                 
856                 if ((i == mb_width) && slice_mb_x) {
857                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
858                 }
859
860                 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
861                 *command_ptr++ = kernel;
862                 *command_ptr++ = 0;
863                 *command_ptr++ = 0;
864                 *command_ptr++ = 0;
865                 *command_ptr++ = 0;
866    
867                 /*inline data */
868                 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
869                 *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
870
871                 i += 1;
872             }
873
874             slice_param++;
875         }
876     }
877
878     *command_ptr++ = 0;
879     *command_ptr++ = MI_BATCH_BUFFER_END;
880
881     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
882 }
883
884 static void
885 gen8_vme_mpeg2_pipeline_programing(VADriverContextP ctx, 
886                                     struct encode_state *encode_state,
887                                     int is_intra,
888                                     struct intel_encoder_context *encoder_context)
889 {
890     struct gen6_vme_context *vme_context = encoder_context->vme_context;
891     struct intel_batchbuffer *batch = encoder_context->base.batch;
892     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
893     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
894     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
895
896     gen8_vme_mpeg2_fill_vme_batchbuffer(ctx, 
897                                          encode_state,
898                                          width_in_mbs, height_in_mbs,
899                                          is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER,
900                                          0,
901                                          encoder_context);
902
903     intel_batchbuffer_start_atomic(batch, 0x1000);
904     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
905     BEGIN_BATCH(batch, 2);
906     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
907     OUT_RELOC(batch,
908               vme_context->vme_batchbuffer.bo,
909               I915_GEM_DOMAIN_COMMAND, 0, 
910               0);
911     ADVANCE_BATCH(batch);
912
913     intel_batchbuffer_end_atomic(batch);        
914 }
915
916 static VAStatus 
917 gen8_vme_mpeg2_prepare(VADriverContextP ctx, 
918                         struct encode_state *encode_state,
919                         struct intel_encoder_context *encoder_context)
920 {
921     VAStatus vaStatus = VA_STATUS_SUCCESS;
922     VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
923         
924     /*Setup all the memory object*/
925     gen8_vme_mpeg2_surface_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
926     gen8_vme_interface_setup(ctx, encode_state, encoder_context);
927     gen8_vme_vme_state_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
928     gen8_vme_constant_setup(ctx, encode_state, encoder_context);
929
930     /*Programing media pipeline*/
931     gen8_vme_mpeg2_pipeline_programing(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
932
933     return vaStatus;
934 }
935
936 static VAStatus
937 gen8_vme_mpeg2_pipeline(VADriverContextP ctx,
938                          VAProfile profile,
939                          struct encode_state *encode_state,
940                          struct intel_encoder_context *encoder_context)
941 {
942     gen8_vme_media_init(ctx, encoder_context);
943     gen8_vme_mpeg2_prepare(ctx, encode_state, encoder_context);
944     gen8_vme_run(ctx, encode_state, encoder_context);
945     gen8_vme_stop(ctx, encode_state, encoder_context);
946
947     return VA_STATUS_SUCCESS;
948 }
949
950 static void
951 gen8_vme_context_destroy(void *context)
952 {
953     struct gen6_vme_context *vme_context = context;
954
955     i965_gpe_context_destroy(&vme_context->gpe_context);
956
957     dri_bo_unreference(vme_context->vme_output.bo);
958     vme_context->vme_output.bo = NULL;
959
960     dri_bo_unreference(vme_context->vme_state.bo);
961     vme_context->vme_state.bo = NULL;
962
963     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
964     vme_context->vme_batchbuffer.bo = NULL;
965
966     if (vme_context->vme_state_message) {
967         free(vme_context->vme_state_message);
968         vme_context->vme_state_message = NULL;
969     }
970
971     free(vme_context);
972 }
973
974 Bool gen8_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
975 {
976     struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context));
977     struct i965_kernel *vme_kernel_list = NULL;
978         int i965_kernel_num;
979
980     switch (encoder_context->codec) {
981     case CODEC_H264:
982         vme_kernel_list = gen8_vme_kernels;
983         encoder_context->vme_pipeline = gen8_vme_pipeline;
984         i965_kernel_num = sizeof(gen8_vme_kernels) / sizeof(struct i965_kernel); 
985         break;
986
987     case CODEC_MPEG2:
988         vme_kernel_list = gen8_vme_mpeg2_kernels;
989         encoder_context->vme_pipeline = gen8_vme_mpeg2_pipeline;
990         i965_kernel_num = sizeof(gen8_vme_mpeg2_kernels) / sizeof(struct i965_kernel); 
991
992         break;
993
994     default:
995         /* never get here */
996         assert(0);
997
998         break;
999     }
1000     vme_context->vme_kernel_sum = i965_kernel_num;
1001     vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
1002
1003     vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6;
1004     vme_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data);
1005
1006     vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH;
1007
1008     vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
1009     vme_context->gpe_context.vfe_state.num_urb_entries = 16;
1010     vme_context->gpe_context.vfe_state.gpgpu_mode = 0;
1011     vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1;
1012     vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1;
1013
1014     gen7_vme_scoreboard_init(ctx, vme_context);
1015
1016     i965_gpe_load_kernels(ctx,
1017                           &vme_context->gpe_context,
1018                           vme_kernel_list,
1019                           i965_kernel_num);
1020     vme_context->vme_surface2_setup = gen7_gpe_surface2_setup;
1021     vme_context->vme_media_rw_surface_setup = gen7_gpe_media_rw_surface_setup;
1022     vme_context->vme_buffer_suface_setup = gen7_gpe_buffer_suface_setup;
1023     vme_context->vme_media_chroma_surface_setup = gen75_gpe_media_chroma_surface_setup;
1024
1025     encoder_context->vme_context = vme_context;
1026     encoder_context->vme_context_destroy = gen8_vme_context_destroy;
1027
1028     vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int));
1029
1030     return True;
1031 }