2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Zhao Yakui <yakui.zhao@intel.com>
26 * Xiang Haihao <haihao.xiang@intel.com>
35 #include "intel_batchbuffer.h"
36 #include "intel_driver.h"
38 #include "i965_defines.h"
39 #include "i965_drv_video.h"
40 #include "i965_encoder.h"
44 #ifdef SURFACE_STATE_PADDED_SIZE
45 #undef SURFACE_STATE_PADDED_SIZE
48 #define SURFACE_STATE_PADDED_SIZE SURFACE_STATE_PADDED_SIZE_GEN8
49 #define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index)
50 #define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index)
52 #define VME_INTRA_SHADER 0
53 #define VME_INTER_SHADER 1
54 #define VME_BINTER_SHADER 2
56 #define CURBE_ALLOCATION_SIZE 37 /* in 256-bit */
57 #define CURBE_TOTAL_DATA_LENGTH (4 * 32) /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */
58 #define CURBE_URB_ENTRY_LENGTH 4 /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */
60 #define VME_MSG_LENGTH 32
62 static const uint32_t gen8_vme_intra_frame[][4] = {
63 #include "shaders/vme/intra_frame_gen8.g8b"
66 static const uint32_t gen8_vme_inter_frame[][4] = {
67 #include "shaders/vme/inter_frame_gen8.g8b"
70 static const uint32_t gen8_vme_inter_bframe[][4] = {
71 #include "shaders/vme/inter_bframe_gen8.g8b"
74 static struct i965_kernel gen8_vme_kernels[] = {
77 VME_INTRA_SHADER, /*index*/
79 sizeof(gen8_vme_intra_frame),
86 sizeof(gen8_vme_inter_frame),
92 gen8_vme_inter_bframe,
93 sizeof(gen8_vme_inter_bframe),
98 static const uint32_t gen8_vme_mpeg2_intra_frame[][4] = {
99 #include "shaders/vme/intra_frame_gen8.g8b"
102 static const uint32_t gen8_vme_mpeg2_inter_frame[][4] = {
103 #include "shaders/vme/mpeg2_inter_gen8.g8b"
106 static struct i965_kernel gen8_vme_mpeg2_kernels[] = {
109 VME_INTRA_SHADER, /*index*/
110 gen8_vme_mpeg2_intra_frame,
111 sizeof(gen8_vme_mpeg2_intra_frame),
117 gen8_vme_mpeg2_inter_frame,
118 sizeof(gen8_vme_mpeg2_inter_frame),
123 /* only used for VME source surface state */
125 gen8_vme_source_surface_state(VADriverContextP ctx,
127 struct object_surface *obj_surface,
128 struct intel_encoder_context *encoder_context)
130 struct gen6_vme_context *vme_context = encoder_context->vme_context;
132 vme_context->vme_surface2_setup(ctx,
133 &vme_context->gpe_context,
135 BINDING_TABLE_OFFSET(index),
136 SURFACE_STATE_OFFSET(index));
140 gen8_vme_media_source_surface_state(VADriverContextP ctx,
142 struct object_surface *obj_surface,
143 struct intel_encoder_context *encoder_context)
145 struct gen6_vme_context *vme_context = encoder_context->vme_context;
147 vme_context->vme_media_rw_surface_setup(ctx,
148 &vme_context->gpe_context,
150 BINDING_TABLE_OFFSET(index),
151 SURFACE_STATE_OFFSET(index));
155 gen8_vme_media_chroma_source_surface_state(VADriverContextP ctx,
157 struct object_surface *obj_surface,
158 struct intel_encoder_context *encoder_context)
160 struct gen6_vme_context *vme_context = encoder_context->vme_context;
162 vme_context->vme_media_chroma_surface_setup(ctx,
163 &vme_context->gpe_context,
165 BINDING_TABLE_OFFSET(index),
166 SURFACE_STATE_OFFSET(index));
170 gen8_vme_output_buffer_setup(VADriverContextP ctx,
171 struct encode_state *encode_state,
173 struct intel_encoder_context *encoder_context)
176 struct i965_driver_data *i965 = i965_driver_data(ctx);
177 struct gen6_vme_context *vme_context = encoder_context->vme_context;
178 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
179 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
180 int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
181 int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
182 int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
184 vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
185 vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
188 vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
190 vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
192 * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
193 * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
194 * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
197 vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
199 vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
201 assert(vme_context->vme_output.bo);
202 vme_context->vme_buffer_suface_setup(ctx,
203 &vme_context->gpe_context,
204 &vme_context->vme_output,
205 BINDING_TABLE_OFFSET(index),
206 SURFACE_STATE_OFFSET(index));
210 gen8_vme_output_vme_batchbuffer_setup(VADriverContextP ctx,
211 struct encode_state *encode_state,
213 struct intel_encoder_context *encoder_context)
216 struct i965_driver_data *i965 = i965_driver_data(ctx);
217 struct gen6_vme_context *vme_context = encoder_context->vme_context;
218 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
219 int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
220 int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
222 vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
223 vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
224 vme_context->vme_batchbuffer.pitch = 16;
225 vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
227 vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
229 vme_context->vme_buffer_suface_setup(ctx,
230 &vme_context->gpe_context,
231 &vme_context->vme_batchbuffer,
232 BINDING_TABLE_OFFSET(index),
233 SURFACE_STATE_OFFSET(index));
237 gen8_vme_surface_setup(VADriverContextP ctx,
238 struct encode_state *encode_state,
240 struct intel_encoder_context *encoder_context)
242 struct object_surface *obj_surface;
243 struct i965_driver_data *i965 = i965_driver_data(ctx);
245 /*Setup surfaces state*/
246 /* current picture for encoding */
247 obj_surface = encode_state->input_yuv_object;
248 gen8_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
249 gen8_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
250 gen8_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
253 VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
255 struct object_surface *slice_obj_surface;
258 slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
260 if (slice_type == SLICE_TYPE_P || slice_type == SLICE_TYPE_B) {
261 slice_obj_surface = NULL;
262 ref_surface_id = slice_param->RefPicList0[0].picture_id;
263 if (ref_surface_id != 0 && ref_surface_id != VA_INVALID_SURFACE) {
264 slice_obj_surface = SURFACE(ref_surface_id);
266 if (slice_obj_surface && slice_obj_surface->bo) {
267 obj_surface = slice_obj_surface;
269 obj_surface = encode_state->reference_objects[0];
272 if (obj_surface && obj_surface->bo)
273 gen8_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
275 if (slice_type == SLICE_TYPE_B) {
277 slice_obj_surface = NULL;
278 ref_surface_id = slice_param->RefPicList1[0].picture_id;
279 if (ref_surface_id != 0 && ref_surface_id != VA_INVALID_SURFACE) {
280 slice_obj_surface = SURFACE(ref_surface_id);
282 if (slice_obj_surface && slice_obj_surface->bo) {
283 obj_surface = slice_obj_surface;
285 obj_surface = encode_state->reference_objects[0];
288 obj_surface = encode_state->reference_objects[1];
289 if (obj_surface && obj_surface->bo)
290 gen8_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
295 gen8_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context);
296 gen8_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
298 return VA_STATUS_SUCCESS;
301 static VAStatus gen8_vme_interface_setup(VADriverContextP ctx,
302 struct encode_state *encode_state,
303 struct intel_encoder_context *encoder_context)
305 struct gen6_vme_context *vme_context = encoder_context->vme_context;
306 struct gen8_interface_descriptor_data *desc;
310 bo = vme_context->gpe_context.idrt.bo;
315 for (i = 0; i < vme_context->vme_kernel_sum; i++) {
316 struct i965_kernel *kernel;
317 kernel = &vme_context->gpe_context.kernels[i];
318 assert(sizeof(*desc) == 32);
319 /*Setup the descritor table*/
320 memset(desc, 0, sizeof(*desc));
321 desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6);
322 desc->desc3.sampler_count = 0; /* FIXME: */
323 desc->desc3.sampler_state_pointer = 0;
324 desc->desc4.binding_table_entry_count = 1; /* FIXME: */
325 desc->desc4.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5);
326 desc->desc5.constant_urb_entry_read_offset = 0;
327 desc->desc5.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH;
331 dri_bo_emit_reloc(bo,
332 I915_GEM_DOMAIN_INSTRUCTION, 0,
334 i * sizeof(*desc) + offsetof(struct gen8_interface_descriptor_data, desc0),
340 return VA_STATUS_SUCCESS;
343 static VAStatus gen8_vme_constant_setup(VADriverContextP ctx,
344 struct encode_state *encode_state,
345 struct intel_encoder_context *encoder_context)
347 struct gen6_vme_context *vme_context = encoder_context->vme_context;
348 unsigned char *constant_buffer;
349 unsigned int *vme_state_message;
352 vme_state_message = (unsigned int *)vme_context->vme_state_message;
354 if (encoder_context->codec == CODEC_H264) {
355 if (vme_context->h264_level >= 30) {
358 if (vme_context->h264_level >= 31)
361 } else if (encoder_context->codec == CODEC_MPEG2) {
365 vme_state_message[31] = mv_num;
367 dri_bo_map(vme_context->gpe_context.curbe.bo, 1);
368 assert(vme_context->gpe_context.curbe.bo->virtual);
369 constant_buffer = vme_context->gpe_context.curbe.bo->virtual;
371 /* VME MV/Mb cost table is passed by using const buffer */
372 /* Now it uses the fixed search path. So it is constructed directly
375 memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128);
377 dri_bo_unmap(vme_context->gpe_context.curbe.bo);
379 return VA_STATUS_SUCCESS;
382 static const unsigned int intra_mb_mode_cost_table[] = {
383 0x31110001, // for qp0
384 0x09110001, // for qp1
385 0x15030001, // for qp2
386 0x0b030001, // for qp3
387 0x0d030011, // for qp4
388 0x17210011, // for qp5
389 0x41210011, // for qp6
390 0x19210011, // for qp7
391 0x25050003, // for qp8
392 0x1b130003, // for qp9
393 0x1d130003, // for qp10
394 0x27070021, // for qp11
395 0x51310021, // for qp12
396 0x29090021, // for qp13
397 0x35150005, // for qp14
398 0x2b0b0013, // for qp15
399 0x2d0d0013, // for qp16
400 0x37170007, // for qp17
401 0x61410031, // for qp18
402 0x39190009, // for qp19
403 0x45250015, // for qp20
404 0x3b1b000b, // for qp21
405 0x3d1d000d, // for qp22
406 0x47270017, // for qp23
407 0x71510041, // for qp24 ! center for qp=0..30
408 0x49290019, // for qp25
409 0x55350025, // for qp26
410 0x4b2b001b, // for qp27
411 0x4d2d001d, // for qp28
412 0x57370027, // for qp29
413 0x81610051, // for qp30
414 0x57270017, // for qp31
415 0x81510041, // for qp32 ! center for qp=31..51
416 0x59290019, // for qp33
417 0x65350025, // for qp34
418 0x5b2b001b, // for qp35
419 0x5d2d001d, // for qp36
420 0x67370027, // for qp37
421 0x91610051, // for qp38
422 0x69390029, // for qp39
423 0x75450035, // for qp40
424 0x6b3b002b, // for qp41
425 0x6d3d002d, // for qp42
426 0x77470037, // for qp43
427 0xa1710061, // for qp44
428 0x79490039, // for qp45
429 0x85550045, // for qp46
430 0x7b4b003b, // for qp47
431 0x7d4d003d, // for qp48
432 0x87570047, // for qp49
433 0xb1810071, // for qp50
434 0x89590049 // for qp51
437 static void gen8_vme_state_setup_fixup(VADriverContextP ctx,
438 struct encode_state *encode_state,
439 struct intel_encoder_context *encoder_context,
440 unsigned int *vme_state_message)
442 struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
443 VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
444 VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
446 if (slice_param->slice_type != SLICE_TYPE_I &&
447 slice_param->slice_type != SLICE_TYPE_SI)
449 if (encoder_context->rate_control_mode == VA_RC_CQP)
450 vme_state_message[0] = intra_mb_mode_cost_table[pic_param->pic_init_qp + slice_param->slice_qp_delta];
452 vme_state_message[0] = intra_mb_mode_cost_table[mfc_context->bit_rate_control_context[slice_param->slice_type].QpPrimeY];
455 static VAStatus gen8_vme_vme_state_setup(VADriverContextP ctx,
456 struct encode_state *encode_state,
458 struct intel_encoder_context *encoder_context)
460 struct gen6_vme_context *vme_context = encoder_context->vme_context;
461 unsigned int *vme_state_message;
464 //pass the MV/Mb cost into VME message on HASWell
465 assert(vme_context->vme_state_message);
466 vme_state_message = (unsigned int *)vme_context->vme_state_message;
468 vme_state_message[0] = 0x4a4a4a4a;
469 vme_state_message[1] = 0x4a4a4a4a;
470 vme_state_message[2] = 0x4a4a4a4a;
471 vme_state_message[3] = 0x22120200;
472 vme_state_message[4] = 0x62524232;
474 for (i=5; i < 8; i++) {
475 vme_state_message[i] = 0;
478 switch (encoder_context->codec) {
480 gen8_vme_state_setup_fixup(ctx, encode_state, encoder_context, vme_state_message);
489 return VA_STATUS_SUCCESS;
494 gen8_vme_fill_vme_batchbuffer(VADriverContextP ctx,
495 struct encode_state *encode_state,
496 int mb_width, int mb_height,
498 int transform_8x8_mode_flag,
499 struct intel_encoder_context *encoder_context)
501 struct gen6_vme_context *vme_context = encoder_context->vme_context;
502 int mb_x = 0, mb_y = 0;
504 unsigned int *command_ptr;
506 dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
507 command_ptr = vme_context->vme_batchbuffer.bo->virtual;
509 for (s = 0; s < encode_state->num_slice_params_ext; s++) {
510 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
511 int slice_mb_begin = pSliceParameter->macroblock_address;
512 int slice_mb_number = pSliceParameter->num_macroblocks;
513 unsigned int mb_intra_ub;
514 int slice_mb_x = pSliceParameter->macroblock_address % mb_width;
515 for (i = 0; i < slice_mb_number; ) {
516 int mb_count = i + slice_mb_begin;
517 mb_x = mb_count % mb_width;
518 mb_y = mb_count / mb_width;
521 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
524 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
526 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
527 if (mb_x != (mb_width -1))
528 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
532 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
533 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
534 if ((i == (mb_width - 1)) && slice_mb_x) {
535 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
539 if ((i == mb_width) && slice_mb_x) {
540 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
542 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
543 *command_ptr++ = kernel;
550 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
551 *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
558 *command_ptr++ = MI_BATCH_BUFFER_END;
560 dri_bo_unmap(vme_context->vme_batchbuffer.bo);
563 static void gen8_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
565 struct gen6_vme_context *vme_context = encoder_context->vme_context;
567 i965_gpe_context_init(ctx, &vme_context->gpe_context);
569 /* VME output buffer */
570 dri_bo_unreference(vme_context->vme_output.bo);
571 vme_context->vme_output.bo = NULL;
573 dri_bo_unreference(vme_context->vme_batchbuffer.bo);
574 vme_context->vme_batchbuffer.bo = NULL;
577 dri_bo_unreference(vme_context->vme_state.bo);
578 vme_context->vme_state.bo = NULL;
581 static void gen8_vme_pipeline_programing(VADriverContextP ctx,
582 struct encode_state *encode_state,
583 struct intel_encoder_context *encoder_context)
585 struct gen6_vme_context *vme_context = encoder_context->vme_context;
586 struct intel_batchbuffer *batch = encoder_context->base.batch;
587 VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
588 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
589 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
590 int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
591 int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
593 bool allow_hwscore = true;
596 for (s = 0; s < encode_state->num_slice_params_ext; s++) {
597 pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
598 if ((pSliceParameter->macroblock_address % width_in_mbs)) {
599 allow_hwscore = false;
603 if ((pSliceParameter->slice_type == SLICE_TYPE_I) ||
604 (pSliceParameter->slice_type == SLICE_TYPE_I)) {
605 kernel_shader = VME_INTRA_SHADER;
606 } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) ||
607 (pSliceParameter->slice_type == SLICE_TYPE_SP)) {
608 kernel_shader = VME_INTER_SHADER;
610 kernel_shader = VME_BINTER_SHADER;
612 kernel_shader = VME_INTER_SHADER;
615 gen7_vme_walker_fill_vme_batchbuffer(ctx,
617 width_in_mbs, height_in_mbs,
619 pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
622 gen8_vme_fill_vme_batchbuffer(ctx,
624 width_in_mbs, height_in_mbs,
626 pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
629 intel_batchbuffer_start_atomic(batch, 0x1000);
630 gen8_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
631 BEGIN_BATCH(batch, 3);
632 OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0));
634 vme_context->vme_batchbuffer.bo,
635 I915_GEM_DOMAIN_COMMAND, 0,
638 ADVANCE_BATCH(batch);
640 intel_batchbuffer_end_atomic(batch);
643 static VAStatus gen8_vme_prepare(VADriverContextP ctx,
644 struct encode_state *encode_state,
645 struct intel_encoder_context *encoder_context)
647 VAStatus vaStatus = VA_STATUS_SUCCESS;
648 VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
649 int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
650 VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
651 struct gen6_vme_context *vme_context = encoder_context->vme_context;
653 if (!vme_context->h264_level ||
654 (vme_context->h264_level != pSequenceParameter->level_idc)) {
655 vme_context->h264_level = pSequenceParameter->level_idc;
658 intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context);
660 /*Setup all the memory object*/
661 gen8_vme_surface_setup(ctx, encode_state, is_intra, encoder_context);
662 gen8_vme_interface_setup(ctx, encode_state, encoder_context);
663 //gen8_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context);
664 gen8_vme_constant_setup(ctx, encode_state, encoder_context);
666 /*Programing media pipeline*/
667 gen8_vme_pipeline_programing(ctx, encode_state, encoder_context);
672 static VAStatus gen8_vme_run(VADriverContextP ctx,
673 struct encode_state *encode_state,
674 struct intel_encoder_context *encoder_context)
676 struct intel_batchbuffer *batch = encoder_context->base.batch;
678 intel_batchbuffer_flush(batch);
680 return VA_STATUS_SUCCESS;
683 static VAStatus gen8_vme_stop(VADriverContextP ctx,
684 struct encode_state *encode_state,
685 struct intel_encoder_context *encoder_context)
687 return VA_STATUS_SUCCESS;
691 gen8_vme_pipeline(VADriverContextP ctx,
693 struct encode_state *encode_state,
694 struct intel_encoder_context *encoder_context)
696 gen8_vme_media_init(ctx, encoder_context);
697 gen8_vme_prepare(ctx, encode_state, encoder_context);
698 gen8_vme_run(ctx, encode_state, encoder_context);
699 gen8_vme_stop(ctx, encode_state, encoder_context);
701 return VA_STATUS_SUCCESS;
705 gen8_vme_mpeg2_output_buffer_setup(VADriverContextP ctx,
706 struct encode_state *encode_state,
709 struct intel_encoder_context *encoder_context)
712 struct i965_driver_data *i965 = i965_driver_data(ctx);
713 struct gen6_vme_context *vme_context = encoder_context->vme_context;
714 VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
715 int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
716 int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
718 vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
719 vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
722 vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
724 vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
726 * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
727 * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
728 * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
731 vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
733 vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
735 assert(vme_context->vme_output.bo);
736 vme_context->vme_buffer_suface_setup(ctx,
737 &vme_context->gpe_context,
738 &vme_context->vme_output,
739 BINDING_TABLE_OFFSET(index),
740 SURFACE_STATE_OFFSET(index));
744 gen8_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx,
745 struct encode_state *encode_state,
747 struct intel_encoder_context *encoder_context)
750 struct i965_driver_data *i965 = i965_driver_data(ctx);
751 struct gen6_vme_context *vme_context = encoder_context->vme_context;
752 VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
753 int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
754 int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
756 vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
757 vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
758 vme_context->vme_batchbuffer.pitch = 16;
759 vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
761 vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
763 vme_context->vme_buffer_suface_setup(ctx,
764 &vme_context->gpe_context,
765 &vme_context->vme_batchbuffer,
766 BINDING_TABLE_OFFSET(index),
767 SURFACE_STATE_OFFSET(index));
771 gen8_vme_mpeg2_surface_setup(VADriverContextP ctx,
772 struct encode_state *encode_state,
774 struct intel_encoder_context *encoder_context)
776 struct object_surface *obj_surface;
778 /*Setup surfaces state*/
779 /* current picture for encoding */
780 obj_surface = encode_state->input_yuv_object;
781 gen8_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
782 gen8_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
783 gen8_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
787 obj_surface = encode_state->reference_objects[0];
789 if (obj_surface->bo != NULL)
790 gen8_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
793 obj_surface = encode_state->reference_objects[1];
795 if (obj_surface && obj_surface->bo != NULL)
796 gen8_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
800 gen8_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context);
801 gen8_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
803 return VA_STATUS_SUCCESS;
807 gen8_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx,
808 struct encode_state *encode_state,
809 int mb_width, int mb_height,
811 int transform_8x8_mode_flag,
812 struct intel_encoder_context *encoder_context)
814 struct gen6_vme_context *vme_context = encoder_context->vme_context;
815 int mb_x = 0, mb_y = 0;
817 unsigned int *command_ptr;
820 dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
821 command_ptr = vme_context->vme_batchbuffer.bo->virtual;
823 for (s = 0; s < encode_state->num_slice_params_ext; s++) {
824 VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer;
826 for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) {
827 int slice_mb_begin = slice_param->macroblock_address;
828 int slice_mb_number = slice_param->num_macroblocks;
829 unsigned int mb_intra_ub;
831 for (i = 0; i < slice_mb_number;) {
832 int mb_count = i + slice_mb_begin;
834 mb_x = mb_count % mb_width;
835 mb_y = mb_count / mb_width;
839 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
843 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
846 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
848 if (mb_x != (mb_width -1))
849 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
852 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
853 *command_ptr++ = kernel;
860 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
861 *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
871 *command_ptr++ = MI_BATCH_BUFFER_END;
873 dri_bo_unmap(vme_context->vme_batchbuffer.bo);
877 gen8_vme_mpeg2_pipeline_programing(VADriverContextP ctx,
878 struct encode_state *encode_state,
880 struct intel_encoder_context *encoder_context)
882 struct gen6_vme_context *vme_context = encoder_context->vme_context;
883 struct intel_batchbuffer *batch = encoder_context->base.batch;
884 VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
885 int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
886 int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
888 gen8_vme_mpeg2_fill_vme_batchbuffer(ctx,
890 width_in_mbs, height_in_mbs,
891 is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER,
895 intel_batchbuffer_start_atomic(batch, 0x1000);
896 gen8_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
897 BEGIN_BATCH(batch, 2);
898 OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
900 vme_context->vme_batchbuffer.bo,
901 I915_GEM_DOMAIN_COMMAND, 0,
903 ADVANCE_BATCH(batch);
905 intel_batchbuffer_end_atomic(batch);
909 gen8_vme_mpeg2_prepare(VADriverContextP ctx,
910 struct encode_state *encode_state,
911 struct intel_encoder_context *encoder_context)
913 VAStatus vaStatus = VA_STATUS_SUCCESS;
914 VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
915 VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
916 struct gen6_vme_context *vme_context = encoder_context->vme_context;
918 if ((!vme_context->mpeg2_level) ||
919 (vme_context->mpeg2_level != (seq_param->sequence_extension.bits.profile_and_level_indication & MPEG2_LEVEL_MASK))) {
920 vme_context->mpeg2_level = seq_param->sequence_extension.bits.profile_and_level_indication & MPEG2_LEVEL_MASK;
924 /*Setup all the memory object*/
925 gen8_vme_mpeg2_surface_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
926 gen8_vme_interface_setup(ctx, encode_state, encoder_context);
927 //gen8_vme_vme_state_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
928 intel_vme_mpeg2_state_setup(ctx, encode_state, encoder_context);
929 gen8_vme_constant_setup(ctx, encode_state, encoder_context);
931 /*Programing media pipeline*/
932 gen8_vme_mpeg2_pipeline_programing(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
938 gen8_vme_mpeg2_pipeline(VADriverContextP ctx,
940 struct encode_state *encode_state,
941 struct intel_encoder_context *encoder_context)
943 gen8_vme_media_init(ctx, encoder_context);
944 gen8_vme_mpeg2_prepare(ctx, encode_state, encoder_context);
945 gen8_vme_run(ctx, encode_state, encoder_context);
946 gen8_vme_stop(ctx, encode_state, encoder_context);
948 return VA_STATUS_SUCCESS;
952 gen8_vme_context_destroy(void *context)
954 struct gen6_vme_context *vme_context = context;
956 i965_gpe_context_destroy(&vme_context->gpe_context);
958 dri_bo_unreference(vme_context->vme_output.bo);
959 vme_context->vme_output.bo = NULL;
961 dri_bo_unreference(vme_context->vme_state.bo);
962 vme_context->vme_state.bo = NULL;
964 dri_bo_unreference(vme_context->vme_batchbuffer.bo);
965 vme_context->vme_batchbuffer.bo = NULL;
967 if (vme_context->vme_state_message) {
968 free(vme_context->vme_state_message);
969 vme_context->vme_state_message = NULL;
975 Bool gen8_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
977 struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context));
978 struct i965_kernel *vme_kernel_list = NULL;
981 switch (encoder_context->codec) {
983 vme_kernel_list = gen8_vme_kernels;
984 encoder_context->vme_pipeline = gen8_vme_pipeline;
985 i965_kernel_num = sizeof(gen8_vme_kernels) / sizeof(struct i965_kernel);
989 vme_kernel_list = gen8_vme_mpeg2_kernels;
990 encoder_context->vme_pipeline = gen8_vme_mpeg2_pipeline;
991 i965_kernel_num = sizeof(gen8_vme_mpeg2_kernels) / sizeof(struct i965_kernel);
1001 vme_context->vme_kernel_sum = i965_kernel_num;
1002 vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
1004 vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6;
1005 vme_context->gpe_context.idrt.entry_size = sizeof(struct gen8_interface_descriptor_data);
1007 vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH;
1009 vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
1010 vme_context->gpe_context.vfe_state.num_urb_entries = 16;
1011 vme_context->gpe_context.vfe_state.gpgpu_mode = 0;
1012 vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1;
1013 vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1;
1015 gen7_vme_scoreboard_init(ctx, vme_context);
1017 i965_gpe_load_kernels(ctx,
1018 &vme_context->gpe_context,
1021 vme_context->vme_surface2_setup = gen8_gpe_surface2_setup;
1022 vme_context->vme_media_rw_surface_setup = gen8_gpe_media_rw_surface_setup;
1023 vme_context->vme_buffer_suface_setup = gen8_gpe_buffer_suface_setup;
1024 vme_context->vme_media_chroma_surface_setup = gen8_gpe_media_chroma_surface_setup;
1026 encoder_context->vme_context = vme_context;
1027 encoder_context->vme_context_destroy = gen8_vme_context_destroy;
1029 vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int));