Add the separated media encoding/decoding files for BDW
[platform/upstream/libva-intel-driver.git] / src / gen8_vme.c
1 /*
2  * Copyright © 2012 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the
6  * "Software"), to deal in the Software without restriction, including
7  * without limitation the rights to use, copy, modify, merge, publish,
8  * distribute, sub license, and/or sell copies of the Software, and to
9  * permit persons to whom the Software is furnished to do so, subject to
10  * the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the
13  * next paragraph) shall be included in all copies or substantial portions
14  * of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *    Zhao Yakui <yakui.zhao@intel.com>
26  *    Xiang Haihao <haihao.xiang@intel.com>
27  */
28
29 #include <stdio.h>
30 #include <stdlib.h>
31 #include <stdbool.h>
32 #include <string.h>
33 #include <assert.h>
34
35 #include "intel_batchbuffer.h"
36 #include "intel_driver.h"
37
38 #include "i965_defines.h"
39 #include "i965_drv_video.h"
40 #include "i965_encoder.h"
41 #include "gen6_vme.h"
42 #include "gen6_mfc.h"
43
44 #define SURFACE_STATE_PADDED_SIZE_0_GEN7        ALIGN(sizeof(struct gen7_surface_state), 32)
45 #define SURFACE_STATE_PADDED_SIZE_1_GEN7        ALIGN(sizeof(struct gen7_surface_state2), 32)
46 #define SURFACE_STATE_PADDED_SIZE_GEN7          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN7, SURFACE_STATE_PADDED_SIZE_1_GEN7)
47
48 #define SURFACE_STATE_PADDED_SIZE_0_GEN6        ALIGN(sizeof(struct i965_surface_state), 32)
49 #define SURFACE_STATE_PADDED_SIZE_1_GEN6        ALIGN(sizeof(struct i965_surface_state2), 32)
50 #define SURFACE_STATE_PADDED_SIZE_GEN6          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN6, SURFACE_STATE_PADDED_SIZE_1_GEN6)
51
52 #define SURFACE_STATE_PADDED_SIZE               MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7)
53 #define SURFACE_STATE_OFFSET(index)             (SURFACE_STATE_PADDED_SIZE * index)
54 #define BINDING_TABLE_OFFSET(index)             (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index)
55
56 #define VME_INTRA_SHADER        0
57 #define VME_INTER_SHADER        1
58 #define VME_BINTER_SHADER       3
59 #define VME_BATCHBUFFER         2
60
61 #define CURBE_ALLOCATION_SIZE   37              /* in 256-bit */
62 #define CURBE_TOTAL_DATA_LENGTH (4 * 32)        /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */
63 #define CURBE_URB_ENTRY_LENGTH  4               /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */
64
65 #define VME_MSG_LENGTH          32
66   
67 static const uint32_t gen8_vme_intra_frame[][4] = {
68 #include "shaders/vme/intra_frame_haswell.g75b"
69 };
70
71 static const uint32_t gen8_vme_inter_frame[][4] = {
72 #include "shaders/vme/inter_frame_haswell.g75b"
73 };
74
75 static const uint32_t gen8_vme_inter_bframe[][4] = {
76 #include "shaders/vme/inter_bframe_haswell.g75b"
77 };
78
79 static const uint32_t gen8_vme_batchbuffer[][4] = {
80 #include "shaders/vme/batchbuffer.g75b"
81 };
82
83 static struct i965_kernel gen8_vme_kernels[] = {
84     {
85         "VME Intra Frame",
86         VME_INTRA_SHADER, /*index*/
87         gen8_vme_intra_frame,                   
88         sizeof(gen8_vme_intra_frame),           
89         NULL
90     },
91     {
92         "VME inter Frame",
93         VME_INTER_SHADER,
94         gen8_vme_inter_frame,
95         sizeof(gen8_vme_inter_frame),
96         NULL
97     },
98     {
99         "VME BATCHBUFFER",
100         VME_BATCHBUFFER,
101         gen8_vme_batchbuffer,
102         sizeof(gen8_vme_batchbuffer),
103         NULL
104     },
105     {
106         "VME inter BFrame",
107         VME_BINTER_SHADER,
108         gen8_vme_inter_bframe,
109         sizeof(gen8_vme_inter_bframe),
110         NULL
111     }
112 };
113
114 static const uint32_t gen8_vme_mpeg2_intra_frame[][4] = {
115 #include "shaders/vme/intra_frame_haswell.g75b"
116 };
117
118 static const uint32_t gen8_vme_mpeg2_inter_frame[][4] = {
119 #include "shaders/vme/mpeg2_inter_haswell.g75b"
120 };
121
122 static const uint32_t gen8_vme_mpeg2_batchbuffer[][4] = {
123 #include "shaders/vme/batchbuffer.g75b"
124 };
125
126 static struct i965_kernel gen8_vme_mpeg2_kernels[] = {
127     {
128         "VME Intra Frame",
129         VME_INTRA_SHADER, /*index*/
130         gen8_vme_mpeg2_intra_frame,                     
131         sizeof(gen8_vme_mpeg2_intra_frame),             
132         NULL
133     },
134     {
135         "VME inter Frame",
136         VME_INTER_SHADER,
137         gen8_vme_mpeg2_inter_frame,
138         sizeof(gen8_vme_mpeg2_inter_frame),
139         NULL
140     },
141     {
142         "VME BATCHBUFFER",
143         VME_BATCHBUFFER,
144         gen8_vme_mpeg2_batchbuffer,
145         sizeof(gen8_vme_mpeg2_batchbuffer),
146         NULL
147     },
148 };
149
150 /* only used for VME source surface state */
151 static void 
152 gen8_vme_source_surface_state(VADriverContextP ctx,
153                                int index,
154                                struct object_surface *obj_surface,
155                                struct intel_encoder_context *encoder_context)
156 {
157     struct gen6_vme_context *vme_context = encoder_context->vme_context;
158
159     vme_context->vme_surface2_setup(ctx,
160                                     &vme_context->gpe_context,
161                                     obj_surface,
162                                     BINDING_TABLE_OFFSET(index),
163                                     SURFACE_STATE_OFFSET(index));
164 }
165
166 static void
167 gen8_vme_media_source_surface_state(VADriverContextP ctx,
168                                      int index,
169                                      struct object_surface *obj_surface,
170                                      struct intel_encoder_context *encoder_context)
171 {
172     struct gen6_vme_context *vme_context = encoder_context->vme_context;
173
174     vme_context->vme_media_rw_surface_setup(ctx,
175                                             &vme_context->gpe_context,
176                                             obj_surface,
177                                             BINDING_TABLE_OFFSET(index),
178                                             SURFACE_STATE_OFFSET(index));
179 }
180
181 static void
182 gen8_vme_media_chroma_source_surface_state(VADriverContextP ctx,
183                                             int index,
184                                             struct object_surface *obj_surface,
185                                             struct intel_encoder_context *encoder_context)
186 {
187     struct gen6_vme_context *vme_context = encoder_context->vme_context;
188
189     vme_context->vme_media_chroma_surface_setup(ctx,
190                                                 &vme_context->gpe_context,
191                                                 obj_surface,
192                                                 BINDING_TABLE_OFFSET(index),
193                                                 SURFACE_STATE_OFFSET(index));
194 }
195
196 static void
197 gen8_vme_output_buffer_setup(VADriverContextP ctx,
198                               struct encode_state *encode_state,
199                               int index,
200                               struct intel_encoder_context *encoder_context)
201
202 {
203     struct i965_driver_data *i965 = i965_driver_data(ctx);
204     struct gen6_vme_context *vme_context = encoder_context->vme_context;
205     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
206     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
207     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
208     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
209     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
210
211     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
212     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
213
214     if (is_intra)
215         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
216     else
217         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
218     /*
219      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
220      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
221      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
222      */
223
224     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr, 
225                                               "VME output buffer",
226                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
227                                               0x1000);
228     assert(vme_context->vme_output.bo);
229     vme_context->vme_buffer_suface_setup(ctx,
230                                          &vme_context->gpe_context,
231                                          &vme_context->vme_output,
232                                          BINDING_TABLE_OFFSET(index),
233                                          SURFACE_STATE_OFFSET(index));
234 }
235
236 static void
237 gen8_vme_output_vme_batchbuffer_setup(VADriverContextP ctx,
238                                        struct encode_state *encode_state,
239                                        int index,
240                                        struct intel_encoder_context *encoder_context)
241
242 {
243     struct i965_driver_data *i965 = i965_driver_data(ctx);
244     struct gen6_vme_context *vme_context = encoder_context->vme_context;
245     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
246     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
247     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
248
249     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
250     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
251     vme_context->vme_batchbuffer.pitch = 16;
252     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr, 
253                                                    "VME batchbuffer",
254                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
255                                                    0x1000);
256     vme_context->vme_buffer_suface_setup(ctx,
257                                          &vme_context->gpe_context,
258                                          &vme_context->vme_batchbuffer,
259                                          BINDING_TABLE_OFFSET(index),
260                                          SURFACE_STATE_OFFSET(index));
261 }
262
263 static VAStatus
264 gen8_vme_surface_setup(VADriverContextP ctx, 
265                         struct encode_state *encode_state,
266                         int is_intra,
267                         struct intel_encoder_context *encoder_context)
268 {
269     struct object_surface *obj_surface;
270
271     /*Setup surfaces state*/
272     /* current picture for encoding */
273     obj_surface = encode_state->input_yuv_object;
274     gen8_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
275     gen8_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
276     gen8_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
277
278     if (!is_intra) {
279         /* reference 0 */
280         obj_surface = encode_state->reference_objects[0];
281
282         if (obj_surface && obj_surface->bo)
283             gen8_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
284
285         /* reference 1 */
286         obj_surface = encode_state->reference_objects[1];
287
288         if (obj_surface && obj_surface->bo)
289             gen8_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
290     }
291
292     /* VME output */
293     gen8_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context);
294     gen8_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
295
296     return VA_STATUS_SUCCESS;
297 }
298
299 static VAStatus gen8_vme_interface_setup(VADriverContextP ctx, 
300                                           struct encode_state *encode_state,
301                                           struct intel_encoder_context *encoder_context)
302 {
303     struct gen6_vme_context *vme_context = encoder_context->vme_context;
304     struct gen6_interface_descriptor_data *desc;   
305     int i;
306     dri_bo *bo;
307
308     bo = vme_context->gpe_context.idrt.bo;
309     dri_bo_map(bo, 1);
310     assert(bo->virtual);
311     desc = bo->virtual;
312
313     for (i = 0; i < vme_context->vme_kernel_sum; i++) {
314         struct i965_kernel *kernel;
315         kernel = &vme_context->gpe_context.kernels[i];
316         assert(sizeof(*desc) == 32);
317         /*Setup the descritor table*/
318         memset(desc, 0, sizeof(*desc));
319         desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6);
320         desc->desc2.sampler_count = 0; /* FIXME: */
321         desc->desc2.sampler_state_pointer = 0;
322         desc->desc3.binding_table_entry_count = 1; /* FIXME: */
323         desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5);
324         desc->desc4.constant_urb_entry_read_offset = 0;
325         desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH;
326                 
327         /*kernel start*/
328         dri_bo_emit_reloc(bo,   
329                           I915_GEM_DOMAIN_INSTRUCTION, 0,
330                           0,
331                           i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0),
332                           kernel->bo);
333         desc++;
334     }
335     dri_bo_unmap(bo);
336
337     return VA_STATUS_SUCCESS;
338 }
339
340 static VAStatus gen8_vme_constant_setup(VADriverContextP ctx, 
341                                          struct encode_state *encode_state,
342                                          struct intel_encoder_context *encoder_context)
343 {
344     struct gen6_vme_context *vme_context = encoder_context->vme_context;
345     unsigned char *constant_buffer;
346     unsigned int *vme_state_message;
347     int mv_num = 32;
348
349     vme_state_message = (unsigned int *)vme_context->vme_state_message;
350
351     if (encoder_context->codec == CODEC_H264) {
352         if (vme_context->h264_level >= 30) {
353             mv_num = 16;
354         
355             if (vme_context->h264_level >= 31)
356                 mv_num = 8;
357         } 
358     } else if (encoder_context->codec == CODEC_MPEG2) {
359         mv_num = 2;
360     }
361
362     vme_state_message[31] = mv_num;
363
364     dri_bo_map(vme_context->gpe_context.curbe.bo, 1);
365     assert(vme_context->gpe_context.curbe.bo->virtual);
366     constant_buffer = vme_context->gpe_context.curbe.bo->virtual;
367
368     /* VME MV/Mb cost table is passed by using const buffer */
369     /* Now it uses the fixed search path. So it is constructed directly
370      * in the GPU shader.
371      */
372     memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128);
373         
374     dri_bo_unmap(vme_context->gpe_context.curbe.bo);
375
376     return VA_STATUS_SUCCESS;
377 }
378
379 static const unsigned int intra_mb_mode_cost_table[] = {
380     0x31110001, // for qp0
381     0x09110001, // for qp1
382     0x15030001, // for qp2
383     0x0b030001, // for qp3
384     0x0d030011, // for qp4
385     0x17210011, // for qp5
386     0x41210011, // for qp6
387     0x19210011, // for qp7
388     0x25050003, // for qp8
389     0x1b130003, // for qp9
390     0x1d130003, // for qp10
391     0x27070021, // for qp11
392     0x51310021, // for qp12
393     0x29090021, // for qp13
394     0x35150005, // for qp14
395     0x2b0b0013, // for qp15
396     0x2d0d0013, // for qp16
397     0x37170007, // for qp17
398     0x61410031, // for qp18
399     0x39190009, // for qp19
400     0x45250015, // for qp20
401     0x3b1b000b, // for qp21
402     0x3d1d000d, // for qp22
403     0x47270017, // for qp23
404     0x71510041, // for qp24 ! center for qp=0..30
405     0x49290019, // for qp25
406     0x55350025, // for qp26
407     0x4b2b001b, // for qp27
408     0x4d2d001d, // for qp28
409     0x57370027, // for qp29
410     0x81610051, // for qp30
411     0x57270017, // for qp31
412     0x81510041, // for qp32 ! center for qp=31..51
413     0x59290019, // for qp33
414     0x65350025, // for qp34
415     0x5b2b001b, // for qp35
416     0x5d2d001d, // for qp36
417     0x67370027, // for qp37
418     0x91610051, // for qp38
419     0x69390029, // for qp39
420     0x75450035, // for qp40
421     0x6b3b002b, // for qp41
422     0x6d3d002d, // for qp42
423     0x77470037, // for qp43
424     0xa1710061, // for qp44
425     0x79490039, // for qp45
426     0x85550045, // for qp46
427     0x7b4b003b, // for qp47
428     0x7d4d003d, // for qp48
429     0x87570047, // for qp49
430     0xb1810071, // for qp50
431     0x89590049  // for qp51
432 };
433
434 static void gen8_vme_state_setup_fixup(VADriverContextP ctx,
435                                         struct encode_state *encode_state,
436                                         struct intel_encoder_context *encoder_context,
437                                         unsigned int *vme_state_message)
438 {
439     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
440     VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
441     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
442
443     if (slice_param->slice_type != SLICE_TYPE_I &&
444         slice_param->slice_type != SLICE_TYPE_SI)
445         return;
446     if (encoder_context->rate_control_mode == VA_RC_CQP)
447         vme_state_message[0] = intra_mb_mode_cost_table[pic_param->pic_init_qp + slice_param->slice_qp_delta];
448     else
449         vme_state_message[0] = intra_mb_mode_cost_table[mfc_context->bit_rate_control_context[slice_param->slice_type].QpPrimeY];
450 }
451
452 static VAStatus gen8_vme_vme_state_setup(VADriverContextP ctx,
453                                           struct encode_state *encode_state,
454                                           int is_intra,
455                                           struct intel_encoder_context *encoder_context)
456 {
457     struct gen6_vme_context *vme_context = encoder_context->vme_context;
458     unsigned int *vme_state_message;
459     int i;
460         
461     //pass the MV/Mb cost into VME message on HASWell
462     assert(vme_context->vme_state_message);
463     vme_state_message = (unsigned int *)vme_context->vme_state_message;
464
465     vme_state_message[0] = 0x4a4a4a4a;
466     vme_state_message[1] = 0x4a4a4a4a;
467     vme_state_message[2] = 0x4a4a4a4a;
468     vme_state_message[3] = 0x22120200;
469     vme_state_message[4] = 0x62524232;
470
471     for (i=5; i < 8; i++) {
472         vme_state_message[i] = 0;
473     }
474
475     switch (encoder_context->codec) {
476     case CODEC_H264:
477         gen8_vme_state_setup_fixup(ctx, encode_state, encoder_context, vme_state_message);
478
479         break;
480
481     default:
482         /* no fixup */
483         break;
484     }
485
486     return VA_STATUS_SUCCESS;
487 }
488
489
490 static void
491 gen8_vme_fill_vme_batchbuffer(VADriverContextP ctx, 
492                                struct encode_state *encode_state,
493                                int mb_width, int mb_height,
494                                int kernel,
495                                int transform_8x8_mode_flag,
496                                struct intel_encoder_context *encoder_context)
497 {
498     struct gen6_vme_context *vme_context = encoder_context->vme_context;
499     int mb_x = 0, mb_y = 0;
500     int i, s;
501     unsigned int *command_ptr;
502
503     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
504     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
505
506     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
507         VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; 
508         int slice_mb_begin = pSliceParameter->macroblock_address;
509         int slice_mb_number = pSliceParameter->num_macroblocks;
510         unsigned int mb_intra_ub;
511         int slice_mb_x = pSliceParameter->macroblock_address % mb_width; 
512         for (i = 0; i < slice_mb_number;  ) {
513             int mb_count = i + slice_mb_begin;    
514             mb_x = mb_count % mb_width;
515             mb_y = mb_count / mb_width;
516             mb_intra_ub = 0;
517             if (mb_x != 0) {
518                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
519             }
520             if (mb_y != 0) {
521                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
522                 if (mb_x != 0)
523                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
524                 if (mb_x != (mb_width -1))
525                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
526             }
527             if (i < mb_width) {
528                 if (i == 0)
529                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
530                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
531                 if ((i == (mb_width - 1)) && slice_mb_x) {
532                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
533                 }
534             }
535                 
536             if ((i == mb_width) && slice_mb_x) {
537                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
538             }
539             *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
540             *command_ptr++ = kernel;
541             *command_ptr++ = 0;
542             *command_ptr++ = 0;
543             *command_ptr++ = 0;
544             *command_ptr++ = 0;
545    
546             /*inline data */
547             *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
548             *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
549
550             i += 1;
551         } 
552     }
553
554     *command_ptr++ = 0;
555     *command_ptr++ = MI_BATCH_BUFFER_END;
556
557     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
558 }
559
560 static void gen8_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
561 {
562     struct gen6_vme_context *vme_context = encoder_context->vme_context;
563
564     i965_gpe_context_init(ctx, &vme_context->gpe_context);
565
566     /* VME output buffer */
567     dri_bo_unreference(vme_context->vme_output.bo);
568     vme_context->vme_output.bo = NULL;
569
570     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
571     vme_context->vme_batchbuffer.bo = NULL;
572
573     /* VME state */
574     dri_bo_unreference(vme_context->vme_state.bo);
575     vme_context->vme_state.bo = NULL;
576 }
577
578 static void gen8_vme_pipeline_programing(VADriverContextP ctx, 
579                                           struct encode_state *encode_state,
580                                           struct intel_encoder_context *encoder_context)
581 {
582     struct gen6_vme_context *vme_context = encoder_context->vme_context;
583     struct intel_batchbuffer *batch = encoder_context->base.batch;
584     VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
585     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
586     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
587     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
588     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
589     int kernel_shader;
590     bool allow_hwscore = true;
591     int s;
592
593     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
594         pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; 
595         if ((pSliceParameter->macroblock_address % width_in_mbs)) {
596                 allow_hwscore = false;
597                 break;
598         }
599     }
600     if ((pSliceParameter->slice_type == SLICE_TYPE_I) ||
601         (pSliceParameter->slice_type == SLICE_TYPE_I)) {
602         kernel_shader = VME_INTRA_SHADER;
603    } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) ||
604         (pSliceParameter->slice_type == SLICE_TYPE_SP)) {
605         kernel_shader = VME_INTER_SHADER;
606    } else {
607         kernel_shader = VME_BINTER_SHADER;
608         if (!allow_hwscore)
609              kernel_shader = VME_INTER_SHADER;
610    }
611     if (allow_hwscore)
612         gen7_vme_walker_fill_vme_batchbuffer(ctx, 
613                                   encode_state,
614                                   width_in_mbs, height_in_mbs,
615                                   kernel_shader,
616                                   pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
617                                   encoder_context);
618     else
619         gen8_vme_fill_vme_batchbuffer(ctx, 
620                                    encode_state,
621                                    width_in_mbs, height_in_mbs,
622                                    kernel_shader,
623                                    pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
624                                    encoder_context);
625
626     intel_batchbuffer_start_atomic(batch, 0x1000);
627     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
628     BEGIN_BATCH(batch, 2);
629     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
630     OUT_RELOC(batch,
631               vme_context->vme_batchbuffer.bo,
632               I915_GEM_DOMAIN_COMMAND, 0, 
633               0);
634     ADVANCE_BATCH(batch);
635
636     intel_batchbuffer_end_atomic(batch);        
637 }
638
639 static VAStatus gen8_vme_prepare(VADriverContextP ctx, 
640                                   struct encode_state *encode_state,
641                                   struct intel_encoder_context *encoder_context)
642 {
643     VAStatus vaStatus = VA_STATUS_SUCCESS;
644     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
645     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
646     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
647     struct gen6_vme_context *vme_context = encoder_context->vme_context;
648
649     if (!vme_context->h264_level ||
650         (vme_context->h264_level != pSequenceParameter->level_idc)) {
651         vme_context->h264_level = pSequenceParameter->level_idc;        
652     }   
653
654     intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context);
655         
656     /*Setup all the memory object*/
657     gen8_vme_surface_setup(ctx, encode_state, is_intra, encoder_context);
658     gen8_vme_interface_setup(ctx, encode_state, encoder_context);
659     //gen8_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context);
660     gen8_vme_constant_setup(ctx, encode_state, encoder_context);
661
662     /*Programing media pipeline*/
663     gen8_vme_pipeline_programing(ctx, encode_state, encoder_context);
664
665     return vaStatus;
666 }
667
668 static VAStatus gen8_vme_run(VADriverContextP ctx, 
669                               struct encode_state *encode_state,
670                               struct intel_encoder_context *encoder_context)
671 {
672     struct intel_batchbuffer *batch = encoder_context->base.batch;
673
674     intel_batchbuffer_flush(batch);
675
676     return VA_STATUS_SUCCESS;
677 }
678
679 static VAStatus gen8_vme_stop(VADriverContextP ctx, 
680                                struct encode_state *encode_state,
681                                struct intel_encoder_context *encoder_context)
682 {
683     return VA_STATUS_SUCCESS;
684 }
685
686 static VAStatus
687 gen8_vme_pipeline(VADriverContextP ctx,
688                    VAProfile profile,
689                    struct encode_state *encode_state,
690                    struct intel_encoder_context *encoder_context)
691 {
692     gen8_vme_media_init(ctx, encoder_context);
693     gen8_vme_prepare(ctx, encode_state, encoder_context);
694     gen8_vme_run(ctx, encode_state, encoder_context);
695     gen8_vme_stop(ctx, encode_state, encoder_context);
696
697     return VA_STATUS_SUCCESS;
698 }
699
700 static void
701 gen8_vme_mpeg2_output_buffer_setup(VADriverContextP ctx,
702                                     struct encode_state *encode_state,
703                                     int index,
704                                     int is_intra,
705                                     struct intel_encoder_context *encoder_context)
706
707 {
708     struct i965_driver_data *i965 = i965_driver_data(ctx);
709     struct gen6_vme_context *vme_context = encoder_context->vme_context;
710     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
711     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
712     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
713
714     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
715     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
716
717     if (is_intra)
718         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
719     else
720         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
721     /*
722      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
723      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
724      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
725      */
726
727     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr, 
728                                               "VME output buffer",
729                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
730                                               0x1000);
731     assert(vme_context->vme_output.bo);
732     vme_context->vme_buffer_suface_setup(ctx,
733                                          &vme_context->gpe_context,
734                                          &vme_context->vme_output,
735                                          BINDING_TABLE_OFFSET(index),
736                                          SURFACE_STATE_OFFSET(index));
737 }
738
739 static void
740 gen8_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx,
741                                              struct encode_state *encode_state,
742                                              int index,
743                                              struct intel_encoder_context *encoder_context)
744
745 {
746     struct i965_driver_data *i965 = i965_driver_data(ctx);
747     struct gen6_vme_context *vme_context = encoder_context->vme_context;
748     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
749     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
750     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
751
752     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
753     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
754     vme_context->vme_batchbuffer.pitch = 16;
755     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr, 
756                                                    "VME batchbuffer",
757                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
758                                                    0x1000);
759     vme_context->vme_buffer_suface_setup(ctx,
760                                          &vme_context->gpe_context,
761                                          &vme_context->vme_batchbuffer,
762                                          BINDING_TABLE_OFFSET(index),
763                                          SURFACE_STATE_OFFSET(index));
764 }
765
766 static VAStatus
767 gen8_vme_mpeg2_surface_setup(VADriverContextP ctx, 
768                               struct encode_state *encode_state,
769                               int is_intra,
770                               struct intel_encoder_context *encoder_context)
771 {
772     struct object_surface *obj_surface;
773
774     /*Setup surfaces state*/
775     /* current picture for encoding */
776     obj_surface = encode_state->input_yuv_object;
777     gen8_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
778     gen8_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
779     gen8_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
780
781     if (!is_intra) {
782         /* reference 0 */
783         obj_surface = encode_state->reference_objects[0];
784
785         if (obj_surface->bo != NULL)
786             gen8_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
787
788         /* reference 1 */
789         obj_surface = encode_state->reference_objects[1];
790
791         if (obj_surface && obj_surface->bo != NULL) 
792             gen8_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
793     }
794
795     /* VME output */
796     gen8_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context);
797     gen8_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
798
799     return VA_STATUS_SUCCESS;
800 }
801
802 static void
803 gen8_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx, 
804                                      struct encode_state *encode_state,
805                                      int mb_width, int mb_height,
806                                      int kernel,
807                                      int transform_8x8_mode_flag,
808                                      struct intel_encoder_context *encoder_context)
809 {
810     struct gen6_vme_context *vme_context = encoder_context->vme_context;
811     int mb_x = 0, mb_y = 0;
812     int i, s, j;
813     unsigned int *command_ptr;
814
815
816     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
817     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
818
819     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
820         VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer;
821
822         for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) {
823             int slice_mb_begin = slice_param->macroblock_address;
824             int slice_mb_number = slice_param->num_macroblocks;
825             unsigned int mb_intra_ub;
826             int slice_mb_x = slice_param->macroblock_address % mb_width;
827
828             for (i = 0; i < slice_mb_number;) {
829                 int mb_count = i + slice_mb_begin;    
830
831                 mb_x = mb_count % mb_width;
832                 mb_y = mb_count / mb_width;
833                 mb_intra_ub = 0;
834
835                 if (mb_x != 0) {
836                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
837                 }
838
839                 if (mb_y != 0) {
840                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
841
842                     if (mb_x != 0)
843                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
844
845                     if (mb_x != (mb_width -1))
846                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
847                 }
848
849                 if (i < mb_width) {
850                     if (i == 0)
851                         mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
852
853                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
854
855                     if ((i == (mb_width - 1)) && slice_mb_x) {
856                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
857                     }
858                 }
859                 
860                 if ((i == mb_width) && slice_mb_x) {
861                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
862                 }
863
864                 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
865                 *command_ptr++ = kernel;
866                 *command_ptr++ = 0;
867                 *command_ptr++ = 0;
868                 *command_ptr++ = 0;
869                 *command_ptr++ = 0;
870    
871                 /*inline data */
872                 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
873                 *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
874
875                 i += 1;
876             }
877
878             slice_param++;
879         }
880     }
881
882     *command_ptr++ = 0;
883     *command_ptr++ = MI_BATCH_BUFFER_END;
884
885     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
886 }
887
888 static void
889 gen8_vme_mpeg2_pipeline_programing(VADriverContextP ctx, 
890                                     struct encode_state *encode_state,
891                                     int is_intra,
892                                     struct intel_encoder_context *encoder_context)
893 {
894     struct gen6_vme_context *vme_context = encoder_context->vme_context;
895     struct intel_batchbuffer *batch = encoder_context->base.batch;
896     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
897     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
898     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
899
900     gen8_vme_mpeg2_fill_vme_batchbuffer(ctx, 
901                                          encode_state,
902                                          width_in_mbs, height_in_mbs,
903                                          is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER,
904                                          0,
905                                          encoder_context);
906
907     intel_batchbuffer_start_atomic(batch, 0x1000);
908     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
909     BEGIN_BATCH(batch, 2);
910     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
911     OUT_RELOC(batch,
912               vme_context->vme_batchbuffer.bo,
913               I915_GEM_DOMAIN_COMMAND, 0, 
914               0);
915     ADVANCE_BATCH(batch);
916
917     intel_batchbuffer_end_atomic(batch);        
918 }
919
920 static VAStatus 
921 gen8_vme_mpeg2_prepare(VADriverContextP ctx, 
922                         struct encode_state *encode_state,
923                         struct intel_encoder_context *encoder_context)
924 {
925     VAStatus vaStatus = VA_STATUS_SUCCESS;
926     VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
927         
928     /*Setup all the memory object*/
929     gen8_vme_mpeg2_surface_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
930     gen8_vme_interface_setup(ctx, encode_state, encoder_context);
931     gen8_vme_vme_state_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
932     gen8_vme_constant_setup(ctx, encode_state, encoder_context);
933
934     /*Programing media pipeline*/
935     gen8_vme_mpeg2_pipeline_programing(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
936
937     return vaStatus;
938 }
939
940 static VAStatus
941 gen8_vme_mpeg2_pipeline(VADriverContextP ctx,
942                          VAProfile profile,
943                          struct encode_state *encode_state,
944                          struct intel_encoder_context *encoder_context)
945 {
946     gen8_vme_media_init(ctx, encoder_context);
947     gen8_vme_mpeg2_prepare(ctx, encode_state, encoder_context);
948     gen8_vme_run(ctx, encode_state, encoder_context);
949     gen8_vme_stop(ctx, encode_state, encoder_context);
950
951     return VA_STATUS_SUCCESS;
952 }
953
954 static void
955 gen8_vme_context_destroy(void *context)
956 {
957     struct gen6_vme_context *vme_context = context;
958
959     i965_gpe_context_destroy(&vme_context->gpe_context);
960
961     dri_bo_unreference(vme_context->vme_output.bo);
962     vme_context->vme_output.bo = NULL;
963
964     dri_bo_unreference(vme_context->vme_state.bo);
965     vme_context->vme_state.bo = NULL;
966
967     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
968     vme_context->vme_batchbuffer.bo = NULL;
969
970     if (vme_context->vme_state_message) {
971         free(vme_context->vme_state_message);
972         vme_context->vme_state_message = NULL;
973     }
974
975     free(vme_context);
976 }
977
978 Bool gen8_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
979 {
980     struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context));
981     struct i965_kernel *vme_kernel_list = NULL;
982         int i965_kernel_num;
983
984     switch (encoder_context->codec) {
985     case CODEC_H264:
986         vme_kernel_list = gen8_vme_kernels;
987         encoder_context->vme_pipeline = gen8_vme_pipeline;
988         i965_kernel_num = sizeof(gen8_vme_kernels) / sizeof(struct i965_kernel); 
989         break;
990
991     case CODEC_MPEG2:
992         vme_kernel_list = gen8_vme_mpeg2_kernels;
993         encoder_context->vme_pipeline = gen8_vme_mpeg2_pipeline;
994         i965_kernel_num = sizeof(gen8_vme_mpeg2_kernels) / sizeof(struct i965_kernel); 
995
996         break;
997
998     default:
999         /* never get here */
1000         assert(0);
1001
1002         break;
1003     }
1004     vme_context->vme_kernel_sum = i965_kernel_num;
1005     vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
1006
1007     vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6;
1008     vme_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data);
1009
1010     vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH;
1011
1012     vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
1013     vme_context->gpe_context.vfe_state.num_urb_entries = 16;
1014     vme_context->gpe_context.vfe_state.gpgpu_mode = 0;
1015     vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1;
1016     vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1;
1017
1018     gen7_vme_scoreboard_init(ctx, vme_context);
1019
1020     i965_gpe_load_kernels(ctx,
1021                           &vme_context->gpe_context,
1022                           vme_kernel_list,
1023                           i965_kernel_num);
1024     vme_context->vme_surface2_setup = gen7_gpe_surface2_setup;
1025     vme_context->vme_media_rw_surface_setup = gen7_gpe_media_rw_surface_setup;
1026     vme_context->vme_buffer_suface_setup = gen7_gpe_buffer_suface_setup;
1027     vme_context->vme_media_chroma_surface_setup = gen75_gpe_media_chroma_surface_setup;
1028
1029     encoder_context->vme_context = vme_context;
1030     encoder_context->vme_context_destroy = gen8_vme_context_destroy;
1031
1032     vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int));
1033
1034     return True;
1035 }