2 * Copyright © 2011 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Zhou Chang <chang.zhou@intel.com>
26 * Xiang, Haihao <haihao.xiang@intel.com>
35 #include <intel_bufmgr.h>
39 #define MAX_MFC_REFERENCE_SURFACES 16
40 #define NUM_MFC_DMV_BUFFERS 34
42 struct gen7_mfc_avc_surface_aux
48 struct gen7_mfc_context
57 //MFX_PIPE_BUF_ADDR_STATE
60 } post_deblocking_output; //OUTPUT: reconstructed picture
64 } pre_deblocking_output; //OUTPUT: reconstructed picture with deblocked
68 } uncompressed_picture_source; //INPUT: original compressed image
72 } intra_row_store_scratch_buffer; //INTERNAL:
76 } macroblock_status_buffer; //INTERNAL:
80 } deblocking_filter_row_store_scratch_buffer; //INTERNAL:
84 } reference_surfaces[MAX_MFC_REFERENCE_SURFACES]; //INTERNAL: refrence surfaces
86 //MFX_IND_OBJ_BASE_ADDR_STATE
89 } mfc_indirect_mv_object; //INPUT: the blocks' mv info
95 } mfc_indirect_pak_bse_object; //OUTPUT: the compressed bitstream
97 //MFX_BSP_BUF_BASE_ADDR_STATE
100 } bsd_mpc_row_store_scratch_buffer; //INTERNAL:
102 //MFX_AVC_DIRECTMODE_STATE
105 } direct_mv_buffers[NUM_MFC_DMV_BUFFERS]; //INTERNAL: 0-31 as input,32 and 33 as output
107 //Bit rate tracking context
109 unsigned int QpPrimeY;
110 unsigned int MaxQpNegModifier;
111 unsigned int MaxQpPosModifier;
112 unsigned char MaxSizeInWord;
113 unsigned char TargetSizeInWord;
114 unsigned char Correct[6];
115 unsigned char GrowInit;
116 unsigned char GrowResistance;
117 unsigned char ShrinkInit;
118 unsigned char ShrinkResistance;
120 unsigned int target_mb_size;
121 unsigned int target_frame_size;
122 } bit_rate_control_context[2]; //INTERNAL: 0 for intra frames, 1 for inter frames.
124 //HRD control context
126 int i_bit_rate_value;
127 int i_cpb_size_value;
129 int i_initial_cpb_removal_delay;
130 int i_cpb_removal_delay;
134 int i_initial_cpb_removal_delay_length;
135 int i_cpb_removal_delay_length;
136 int i_dpb_output_delay_length;
141 #endif /* _GEN7_MFC_BCS_H_ */