src/gen75_vme.c

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Zhao Yakui <yakui.zhao@intel.com>
  26  *    Xiang Haihao <haihao.xiang@intel.com>
  27  */
  28
  29 #include <stdio.h>
  30 #include <stdlib.h>
  31 #include <stdbool.h>
  32 #include <string.h>
  33 #include <assert.h>
  34
  35 #include "intel_batchbuffer.h"
  36 #include "intel_driver.h"
  37
  38 #include "i965_defines.h"
  39 #include "i965_drv_video.h"
  40 #include "i965_encoder.h"
  41 #include "gen6_vme.h"
  42 #include "gen6_mfc.h"
  43
  44 #define SURFACE_STATE_PADDED_SIZE_0_GEN7        ALIGN(sizeof(struct gen7_surface_state), 32)
  45 #define SURFACE_STATE_PADDED_SIZE_1_GEN7        ALIGN(sizeof(struct gen7_surface_state2), 32)
  46 #define SURFACE_STATE_PADDED_SIZE_GEN7          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN7, SURFACE_STATE_PADDED_SIZE_1_GEN7)
  47
  48 #define SURFACE_STATE_PADDED_SIZE_0_GEN6        ALIGN(sizeof(struct i965_surface_state), 32)
  49 #define SURFACE_STATE_PADDED_SIZE_1_GEN6        ALIGN(sizeof(struct i965_surface_state2), 32)
  50 #define SURFACE_STATE_PADDED_SIZE_GEN6          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN6, SURFACE_STATE_PADDED_SIZE_1_GEN6)
  51
  52 #define SURFACE_STATE_PADDED_SIZE               MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7)
  53 #define SURFACE_STATE_OFFSET(index)             (SURFACE_STATE_PADDED_SIZE * index)
  54 #define BINDING_TABLE_OFFSET(index)             (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index)
  55
  56 #define VME_INTRA_SHADER        0
  57 #define VME_INTER_SHADER        1
  58 #define VME_BINTER_SHADER       3
  59 #define VME_BATCHBUFFER         2
  60
  61 #define CURBE_ALLOCATION_SIZE   37              /* in 256-bit */
  62 #define CURBE_TOTAL_DATA_LENGTH (4 * 32)        /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */
  63 #define CURBE_URB_ENTRY_LENGTH  4               /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */
  64
  65 #define VME_MSG_LENGTH          32
  66
  67 static const uint32_t gen75_vme_intra_frame[][4] = {
  68 #include "shaders/vme/intra_frame_haswell.g75b"
  69 };
  70
  71 static const uint32_t gen75_vme_inter_frame[][4] = {
  72 #include "shaders/vme/inter_frame_haswell.g75b"
  73 };
  74
  75 static const uint32_t gen75_vme_inter_bframe[][4] = {
  76 #include "shaders/vme/inter_bframe_haswell.g75b"
  77 };
  78
  79 static const uint32_t gen75_vme_batchbuffer[][4] = {
  80 #include "shaders/vme/batchbuffer.g75b"
  81 };
  82
  83 static struct i965_kernel gen75_vme_kernels[] = {
  84     {
  85         "VME Intra Frame",
  86         VME_INTRA_SHADER, /*index*/
  87         gen75_vme_intra_frame,
  88         sizeof(gen75_vme_intra_frame),
  89         NULL
  90     },
  91     {
  92         "VME inter Frame",
  93         VME_INTER_SHADER,
  94         gen75_vme_inter_frame,
  95         sizeof(gen75_vme_inter_frame),
  96         NULL
  97     },
  98     {
  99         "VME BATCHBUFFER",
 100         VME_BATCHBUFFER,
 101         gen75_vme_batchbuffer,
 102         sizeof(gen75_vme_batchbuffer),
 103         NULL
 104     },
 105     {
 106         "VME inter BFrame",
 107         VME_BINTER_SHADER,
 108         gen75_vme_inter_bframe,
 109         sizeof(gen75_vme_inter_bframe),
 110         NULL
 111     }
 112 };
 113
 114 static const uint32_t gen75_vme_mpeg2_intra_frame[][4] = {
 115 #include "shaders/vme/intra_frame_haswell.g75b"
 116 };
 117
 118 static const uint32_t gen75_vme_mpeg2_inter_frame[][4] = {
 119 #include "shaders/vme/mpeg2_inter_frame_haswell.g75b"
 120 };
 121
 122 static const uint32_t gen75_vme_mpeg2_batchbuffer[][4] = {
 123 #include "shaders/vme/batchbuffer.g75b"
 124 };
 125
 126 static struct i965_kernel gen75_vme_mpeg2_kernels[] = {
 127     {
 128         "VME Intra Frame",
 129         VME_INTRA_SHADER, /*index*/
 130         gen75_vme_mpeg2_intra_frame,
 131         sizeof(gen75_vme_mpeg2_intra_frame),
 132         NULL
 133     },
 134     {
 135         "VME inter Frame",
 136         VME_INTER_SHADER,
 137         gen75_vme_mpeg2_inter_frame,
 138         sizeof(gen75_vme_mpeg2_inter_frame),
 139         NULL
 140     },
 141     {
 142         "VME BATCHBUFFER",
 143         VME_BATCHBUFFER,
 144         gen75_vme_mpeg2_batchbuffer,
 145         sizeof(gen75_vme_mpeg2_batchbuffer),
 146         NULL
 147     },
 148 };
 149
 150 /* only used for VME source surface state */
 151 static void
 152 gen75_vme_source_surface_state(VADriverContextP ctx,
 153                                int index,
 154                                struct object_surface *obj_surface,
 155                                struct intel_encoder_context *encoder_context)
 156 {
 157     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 158
 159     vme_context->vme_surface2_setup(ctx,
 160                                     &vme_context->gpe_context,
 161                                     obj_surface,
 162                                     BINDING_TABLE_OFFSET(index),
 163                                     SURFACE_STATE_OFFSET(index));
 164 }
 165
 166 static void
 167 gen75_vme_media_source_surface_state(VADriverContextP ctx,
 168                                      int index,
 169                                      struct object_surface *obj_surface,
 170                                      struct intel_encoder_context *encoder_context)
 171 {
 172     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 173
 174     vme_context->vme_media_rw_surface_setup(ctx,
 175                                             &vme_context->gpe_context,
 176                                             obj_surface,
 177                                             BINDING_TABLE_OFFSET(index),
 178                                             SURFACE_STATE_OFFSET(index));
 179 }
 180
 181 static void
 182 gen75_vme_media_chroma_source_surface_state(VADriverContextP ctx,
 183                                             int index,
 184                                             struct object_surface *obj_surface,
 185                                             struct intel_encoder_context *encoder_context)
 186 {
 187     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 188
 189     vme_context->vme_media_chroma_surface_setup(ctx,
 190                                                 &vme_context->gpe_context,
 191                                                 obj_surface,
 192                                                 BINDING_TABLE_OFFSET(index),
 193                                                 SURFACE_STATE_OFFSET(index));
 194 }
 195
 196 static void
 197 gen75_vme_output_buffer_setup(VADriverContextP ctx,
 198                               struct encode_state *encode_state,
 199                               int index,
 200                               struct intel_encoder_context *encoder_context)
 201
 202 {
 203     struct i965_driver_data *i965 = i965_driver_data(ctx);
 204     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 205     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 206     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 207     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 208     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 209     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 210
 211     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
 212     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
 213
 214     if (is_intra)
 215         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
 216     else
 217         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
 218     /*
 219      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
 220      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
 221      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
 222      */
 223
 224     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
 225                                               "VME output buffer",
 226                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
 227                                               0x1000);
 228     assert(vme_context->vme_output.bo);
 229     vme_context->vme_buffer_suface_setup(ctx,
 230                                          &vme_context->gpe_context,
 231                                          &vme_context->vme_output,
 232                                          BINDING_TABLE_OFFSET(index),
 233                                          SURFACE_STATE_OFFSET(index));
 234 }
 235
 236 static void
 237 gen75_vme_output_vme_batchbuffer_setup(VADriverContextP ctx,
 238                                        struct encode_state *encode_state,
 239                                        int index,
 240                                        struct intel_encoder_context *encoder_context)
 241
 242 {
 243     struct i965_driver_data *i965 = i965_driver_data(ctx);
 244     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 245     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 246     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 247     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 248
 249     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
 250     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
 251     vme_context->vme_batchbuffer.pitch = 16;
 252     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
 253                                                    "VME batchbuffer",
 254                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
 255                                                    0x1000);
 256     vme_context->vme_buffer_suface_setup(ctx,
 257                                          &vme_context->gpe_context,
 258                                          &vme_context->vme_batchbuffer,
 259                                          BINDING_TABLE_OFFSET(index),
 260                                          SURFACE_STATE_OFFSET(index));
 261 }
 262
 263 static VAStatus
 264 gen75_vme_surface_setup(VADriverContextP ctx,
 265                         struct encode_state *encode_state,
 266                         int is_intra,
 267                         struct intel_encoder_context *encoder_context)
 268 {
 269     struct i965_driver_data *i965 = i965_driver_data(ctx);
 270     struct object_surface *obj_surface;
 271     VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 272
 273     /*Setup surfaces state*/
 274     /* current picture for encoding */
 275     obj_surface = SURFACE(encoder_context->input_yuv_surface);
 276     assert(obj_surface);
 277     gen75_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
 278     gen75_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
 279     gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
 280
 281     if (!is_intra) {
 282         /* reference 0 */
 283         obj_surface = SURFACE(pPicParameter->ReferenceFrames[0].picture_id);
 284         assert(obj_surface);
 285         if ( obj_surface->bo != NULL)
 286             gen75_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
 287
 288         /* reference 1 */
 289         obj_surface = SURFACE(pPicParameter->ReferenceFrames[1].picture_id);
 290         assert(obj_surface);
 291         if ( obj_surface->bo != NULL )
 292             gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
 293     }
 294
 295     /* VME output */
 296     gen75_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context);
 297     gen75_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
 298
 299     return VA_STATUS_SUCCESS;
 300 }
 301
 302 static VAStatus gen75_vme_interface_setup(VADriverContextP ctx,
 303                                           struct encode_state *encode_state,
 304                                           struct intel_encoder_context *encoder_context)
 305 {
 306     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 307     struct gen6_interface_descriptor_data *desc;
 308     int i;
 309     dri_bo *bo;
 310
 311     bo = vme_context->gpe_context.idrt.bo;
 312     dri_bo_map(bo, 1);
 313     assert(bo->virtual);
 314     desc = bo->virtual;
 315
 316     for (i = 0; i < vme_context->vme_kernel_sum; i++) {
 317         struct i965_kernel *kernel;
 318         kernel = &vme_context->gpe_context.kernels[i];
 319         assert(sizeof(*desc) == 32);
 320         /*Setup the descritor table*/
 321         memset(desc, 0, sizeof(*desc));
 322         desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6);
 323         desc->desc2.sampler_count = 0; /* FIXME: */
 324         desc->desc2.sampler_state_pointer = 0;
 325         desc->desc3.binding_table_entry_count = 1; /* FIXME: */
 326         desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5);
 327         desc->desc4.constant_urb_entry_read_offset = 0;
 328         desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH;
 329
 330         /*kernel start*/
 331         dri_bo_emit_reloc(bo,
 332                           I915_GEM_DOMAIN_INSTRUCTION, 0,
 333                           0,
 334                           i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0),
 335                           kernel->bo);
 336         desc++;
 337     }
 338     dri_bo_unmap(bo);
 339
 340     return VA_STATUS_SUCCESS;
 341 }
 342
 343 static VAStatus gen75_vme_constant_setup(VADriverContextP ctx,
 344                                          struct encode_state *encode_state,
 345                                          struct intel_encoder_context *encoder_context)
 346 {
 347     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 348     unsigned char *constant_buffer;
 349     unsigned int *vme_state_message;
 350     int mv_num = 32;
 351
 352     vme_state_message = (unsigned int *)vme_context->vme_state_message;
 353
 354     if (encoder_context->profile == VAProfileH264Baseline ||
 355         encoder_context->profile == VAProfileH264Main ||
 356         encoder_context->profile == VAProfileH264High) {
 357         if (vme_context->h264_level >= 30) {
 358             mv_num = 16;
 359
 360             if (vme_context->h264_level >= 31)
 361                 mv_num = 8;
 362         }
 363     } else if (encoder_context->profile == VAProfileMPEG2Simple ||
 364                encoder_context->profile == VAProfileMPEG2Main) {
 365         mv_num = 2;
 366     }
 367
 368     vme_state_message[31] = mv_num;
 369
 370     dri_bo_map(vme_context->gpe_context.curbe.bo, 1);
 371     assert(vme_context->gpe_context.curbe.bo->virtual);
 372     constant_buffer = vme_context->gpe_context.curbe.bo->virtual;
 373
 374     /* VME MV/Mb cost table is passed by using const buffer */
 375     /* Now it uses the fixed search path. So it is constructed directly
 376      * in the GPU shader.
 377      */
 378     memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128);
 379
 380     dri_bo_unmap(vme_context->gpe_context.curbe.bo);
 381
 382     return VA_STATUS_SUCCESS;
 383 }
 384
 385 static const unsigned int intra_mb_mode_cost_table[] = {
 386     0x31110001, // for qp0
 387     0x09110001, // for qp1
 388     0x15030001, // for qp2
 389     0x0b030001, // for qp3
 390     0x0d030011, // for qp4
 391     0x17210011, // for qp5
 392     0x41210011, // for qp6
 393     0x19210011, // for qp7
 394     0x25050003, // for qp8
 395     0x1b130003, // for qp9
 396     0x1d130003, // for qp10
 397     0x27070021, // for qp11
 398     0x51310021, // for qp12
 399     0x29090021, // for qp13
 400     0x35150005, // for qp14
 401     0x2b0b0013, // for qp15
 402     0x2d0d0013, // for qp16
 403     0x37170007, // for qp17
 404     0x61410031, // for qp18
 405     0x39190009, // for qp19
 406     0x45250015, // for qp20
 407     0x3b1b000b, // for qp21
 408     0x3d1d000d, // for qp22
 409     0x47270017, // for qp23
 410     0x71510041, // for qp24 ! center for qp=0..30
 411     0x49290019, // for qp25
 412     0x55350025, // for qp26
 413     0x4b2b001b, // for qp27
 414     0x4d2d001d, // for qp28
 415     0x57370027, // for qp29
 416     0x81610051, // for qp30
 417     0x57270017, // for qp31
 418     0x81510041, // for qp32 ! center for qp=31..51
 419     0x59290019, // for qp33
 420     0x65350025, // for qp34
 421     0x5b2b001b, // for qp35
 422     0x5d2d001d, // for qp36
 423     0x67370027, // for qp37
 424     0x91610051, // for qp38
 425     0x69390029, // for qp39
 426     0x75450035, // for qp40
 427     0x6b3b002b, // for qp41
 428     0x6d3d002d, // for qp42
 429     0x77470037, // for qp43
 430     0xa1710061, // for qp44
 431     0x79490039, // for qp45
 432     0x85550045, // for qp46
 433     0x7b4b003b, // for qp47
 434     0x7d4d003d, // for qp48
 435     0x87570047, // for qp49
 436     0xb1810071, // for qp50
 437     0x89590049  // for qp51
 438 };
 439
 440 static void gen75_vme_state_setup_fixup(VADriverContextP ctx,
 441                                         struct encode_state *encode_state,
 442                                         struct intel_encoder_context *encoder_context,
 443                                         unsigned int *vme_state_message)
 444 {
 445     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
 446     VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 447     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 448
 449     if (slice_param->slice_type != SLICE_TYPE_I &&
 450         slice_param->slice_type != SLICE_TYPE_SI)
 451         return;
 452     if (encoder_context->rate_control_mode == VA_RC_CQP)
 453         vme_state_message[0] = intra_mb_mode_cost_table[pic_param->pic_init_qp + slice_param->slice_qp_delta];
 454     else
 455         vme_state_message[0] = intra_mb_mode_cost_table[mfc_context->bit_rate_control_context[slice_param->slice_type].QpPrimeY];
 456 }
 457
 458 static VAStatus gen75_vme_vme_state_setup(VADriverContextP ctx,
 459                                           struct encode_state *encode_state,
 460                                           int is_intra,
 461                                           struct intel_encoder_context *encoder_context)
 462 {
 463     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 464     unsigned int *vme_state_message;
 465     int i;
 466
 467     //pass the MV/Mb cost into VME message on HASWell
 468     assert(vme_context->vme_state_message);
 469     vme_state_message = (unsigned int *)vme_context->vme_state_message;
 470
 471     vme_state_message[0] = 0x4a4a4a4a;
 472     vme_state_message[1] = 0x4a4a4a4a;
 473     vme_state_message[2] = 0x4a4a4a4a;
 474     vme_state_message[3] = 0x22120200;
 475     vme_state_message[4] = 0x62524232;
 476
 477     for (i=5; i < 8; i++) {
 478         vme_state_message[i] = 0;
 479     }
 480
 481     switch (encoder_context->profile) {
 482     case VAProfileH264Baseline:
 483     case VAProfileH264Main:
 484     case VAProfileH264High:
 485         gen75_vme_state_setup_fixup(ctx, encode_state, encoder_context, vme_state_message);
 486
 487         break;
 488
 489     default:
 490         /* no fixup */
 491         break;
 492     }
 493
 494     return VA_STATUS_SUCCESS;
 495 }
 496
 497
 498 static void
 499 gen75_vme_fill_vme_batchbuffer(VADriverContextP ctx,
 500                                struct encode_state *encode_state,
 501                                int mb_width, int mb_height,
 502                                int kernel,
 503                                int transform_8x8_mode_flag,
 504                                struct intel_encoder_context *encoder_context)
 505 {
 506     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 507     int mb_x = 0, mb_y = 0;
 508     int i, s;
 509     unsigned int *command_ptr;
 510
 511     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
 512     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
 513
 514     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 515         VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
 516         int slice_mb_begin = pSliceParameter->macroblock_address;
 517         int slice_mb_number = pSliceParameter->num_macroblocks;
 518         unsigned int mb_intra_ub;
 519         int slice_mb_x = pSliceParameter->macroblock_address % mb_width;
 520         for (i = 0; i < slice_mb_number;  ) {
 521             int mb_count = i + slice_mb_begin;
 522             mb_x = mb_count % mb_width;
 523             mb_y = mb_count / mb_width;
 524             mb_intra_ub = 0;
 525             if (mb_x != 0) {
 526                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
 527             }
 528             if (mb_y != 0) {
 529                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
 530                 if (mb_x != 0)
 531                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
 532                 if (mb_x != (mb_width -1))
 533                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 534             }
 535             if (i < mb_width) {
 536                 if (i == 0)
 537                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
 538                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
 539                 if ((i == (mb_width - 1)) && slice_mb_x) {
 540                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 541                 }
 542             }
 543
 544             if ((i == mb_width) && slice_mb_x) {
 545                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
 546             }
 547             *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
 548             *command_ptr++ = kernel;
 549             *command_ptr++ = 0;
 550             *command_ptr++ = 0;
 551             *command_ptr++ = 0;
 552             *command_ptr++ = 0;
 553
 554             /*inline data */
 555             *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
 556             *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
 557
 558             i += 1;
 559         }
 560     }
 561
 562     *command_ptr++ = 0;
 563     *command_ptr++ = MI_BATCH_BUFFER_END;
 564
 565     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
 566 }
 567
 568 static void gen75_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
 569 {
 570     struct i965_driver_data *i965 = i965_driver_data(ctx);
 571     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 572     dri_bo *bo;
 573
 574     i965_gpe_context_init(ctx, &vme_context->gpe_context);
 575
 576     /* VME output buffer */
 577     dri_bo_unreference(vme_context->vme_output.bo);
 578     vme_context->vme_output.bo = NULL;
 579
 580     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
 581     vme_context->vme_batchbuffer.bo = NULL;
 582
 583     /* VME state */
 584     dri_bo_unreference(vme_context->vme_state.bo);
 585     vme_context->vme_state.bo = NULL;
 586 }
 587
 588 static void gen75_vme_pipeline_programing(VADriverContextP ctx,
 589                                           struct encode_state *encode_state,
 590                                           struct intel_encoder_context *encoder_context)
 591 {
 592     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 593     struct intel_batchbuffer *batch = encoder_context->base.batch;
 594     VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 595     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 596     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 597     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 598     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 599     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 600     int kernel_shader;
 601     bool allow_hwscore = true;
 602     int s;
 603
 604     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 605         pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
 606         if ((pSliceParameter->macroblock_address % width_in_mbs)) {
 607                 allow_hwscore = false;
 608                 break;
 609         }
 610     }
 611     if ((pSliceParameter->slice_type == SLICE_TYPE_I) ||
 612         (pSliceParameter->slice_type == SLICE_TYPE_I)) {
 613         kernel_shader = VME_INTRA_SHADER;
 614    } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) ||
 615         (pSliceParameter->slice_type == SLICE_TYPE_SP)) {
 616         kernel_shader = VME_INTER_SHADER;
 617    } else {
 618         kernel_shader = VME_BINTER_SHADER;
 619         if (!allow_hwscore)
 620              kernel_shader = VME_INTER_SHADER;
 621    }
 622     if (allow_hwscore)
 623         gen7_vme_walker_fill_vme_batchbuffer(ctx,
 624                                   encode_state,
 625                                   width_in_mbs, height_in_mbs,
 626                                   kernel_shader,
 627                                   pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
 628                                   encoder_context);
 629     else
 630         gen75_vme_fill_vme_batchbuffer(ctx,
 631                                    encode_state,
 632                                    width_in_mbs, height_in_mbs,
 633                                    kernel_shader,
 634                                    pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
 635                                    encoder_context);
 636
 637     intel_batchbuffer_start_atomic(batch, 0x1000);
 638     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
 639     BEGIN_BATCH(batch, 2);
 640     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
 641     OUT_RELOC(batch,
 642               vme_context->vme_batchbuffer.bo,
 643               I915_GEM_DOMAIN_COMMAND, 0,
 644               0);
 645     ADVANCE_BATCH(batch);
 646
 647     intel_batchbuffer_end_atomic(batch);
 648 }
 649
 650 static VAStatus gen75_vme_prepare(VADriverContextP ctx,
 651                                   struct encode_state *encode_state,
 652                                   struct intel_encoder_context *encoder_context)
 653 {
 654     VAStatus vaStatus = VA_STATUS_SUCCESS;
 655     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 656     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 657     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 658     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 659
 660     if (!vme_context->h264_level ||
 661         (vme_context->h264_level != pSequenceParameter->level_idc)) {
 662         vme_context->h264_level = pSequenceParameter->level_idc;
 663     }
 664
 665     intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context);
 666
 667     /*Setup all the memory object*/
 668     gen75_vme_surface_setup(ctx, encode_state, is_intra, encoder_context);
 669     gen75_vme_interface_setup(ctx, encode_state, encoder_context);
 670     //gen75_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context);
 671     gen75_vme_constant_setup(ctx, encode_state, encoder_context);
 672
 673     /*Programing media pipeline*/
 674     gen75_vme_pipeline_programing(ctx, encode_state, encoder_context);
 675
 676     return vaStatus;
 677 }
 678
 679 static VAStatus gen75_vme_run(VADriverContextP ctx,
 680                               struct encode_state *encode_state,
 681                               struct intel_encoder_context *encoder_context)
 682 {
 683     struct intel_batchbuffer *batch = encoder_context->base.batch;
 684
 685     intel_batchbuffer_flush(batch);
 686
 687     return VA_STATUS_SUCCESS;
 688 }
 689
 690 static VAStatus gen75_vme_stop(VADriverContextP ctx,
 691                                struct encode_state *encode_state,
 692                                struct intel_encoder_context *encoder_context)
 693 {
 694     return VA_STATUS_SUCCESS;
 695 }
 696
 697 static VAStatus
 698 gen75_vme_pipeline(VADriverContextP ctx,
 699                    VAProfile profile,
 700                    struct encode_state *encode_state,
 701                    struct intel_encoder_context *encoder_context)
 702 {
 703     gen75_vme_media_init(ctx, encoder_context);
 704     gen75_vme_prepare(ctx, encode_state, encoder_context);
 705     gen75_vme_run(ctx, encode_state, encoder_context);
 706     gen75_vme_stop(ctx, encode_state, encoder_context);
 707
 708     return VA_STATUS_SUCCESS;
 709 }
 710
 711 static void
 712 gen75_vme_mpeg2_output_buffer_setup(VADriverContextP ctx,
 713                                     struct encode_state *encode_state,
 714                                     int index,
 715                                     int is_intra,
 716                                     struct intel_encoder_context *encoder_context)
 717
 718 {
 719     struct i965_driver_data *i965 = i965_driver_data(ctx);
 720     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 721     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 722     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 723     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 724
 725     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
 726     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
 727
 728     if (is_intra)
 729         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
 730     else
 731         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
 732     /*
 733      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
 734      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
 735      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
 736      */
 737
 738     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
 739                                               "VME output buffer",
 740                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
 741                                               0x1000);
 742     assert(vme_context->vme_output.bo);
 743     vme_context->vme_buffer_suface_setup(ctx,
 744                                          &vme_context->gpe_context,
 745                                          &vme_context->vme_output,
 746                                          BINDING_TABLE_OFFSET(index),
 747                                          SURFACE_STATE_OFFSET(index));
 748 }
 749
 750 static void
 751 gen75_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx,
 752                                              struct encode_state *encode_state,
 753                                              int index,
 754                                              struct intel_encoder_context *encoder_context)
 755
 756 {
 757     struct i965_driver_data *i965 = i965_driver_data(ctx);
 758     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 759     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 760     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 761     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 762
 763     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
 764     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
 765     vme_context->vme_batchbuffer.pitch = 16;
 766     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
 767                                                    "VME batchbuffer",
 768                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
 769                                                    0x1000);
 770     vme_context->vme_buffer_suface_setup(ctx,
 771                                          &vme_context->gpe_context,
 772                                          &vme_context->vme_batchbuffer,
 773                                          BINDING_TABLE_OFFSET(index),
 774                                          SURFACE_STATE_OFFSET(index));
 775 }
 776
 777 static VAStatus
 778 gen75_vme_mpeg2_surface_setup(VADriverContextP ctx,
 779                               struct encode_state *encode_state,
 780                               int is_intra,
 781                               struct intel_encoder_context *encoder_context)
 782 {
 783     struct i965_driver_data *i965 = i965_driver_data(ctx);
 784     struct object_surface *obj_surface;
 785     VAEncPictureParameterBufferMPEG2 *pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer;
 786
 787     /*Setup surfaces state*/
 788     /* current picture for encoding */
 789     obj_surface = SURFACE(encoder_context->input_yuv_surface);
 790     assert(obj_surface);
 791     gen75_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
 792     gen75_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
 793     gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
 794
 795     if (!is_intra) {
 796         /* reference 0 */
 797         obj_surface = SURFACE(pic_param->forward_reference_picture);
 798         assert(obj_surface);
 799         if ( obj_surface->bo != NULL)
 800             gen75_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
 801
 802         /* reference 1 */
 803         obj_surface = SURFACE(pic_param->backward_reference_picture);
 804         if (obj_surface && obj_surface->bo != NULL)
 805             gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
 806     }
 807
 808     /* VME output */
 809     gen75_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context);
 810     gen75_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
 811
 812     return VA_STATUS_SUCCESS;
 813 }
 814
 815 static void
 816 gen75_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx,
 817                                      struct encode_state *encode_state,
 818                                      int mb_width, int mb_height,
 819                                      int kernel,
 820                                      int transform_8x8_mode_flag,
 821                                      struct intel_encoder_context *encoder_context)
 822 {
 823     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 824     int mb_x = 0, mb_y = 0;
 825     int i, s, j;
 826     unsigned int *command_ptr;
 827
 828
 829     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
 830     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
 831
 832     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 833         VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer;
 834
 835         for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) {
 836             int slice_mb_begin = slice_param->macroblock_address;
 837             int slice_mb_number = slice_param->num_macroblocks;
 838             unsigned int mb_intra_ub;
 839             int slice_mb_x = slice_param->macroblock_address % mb_width;
 840
 841             for (i = 0; i < slice_mb_number;) {
 842                 int mb_count = i + slice_mb_begin;
 843
 844                 mb_x = mb_count % mb_width;
 845                 mb_y = mb_count / mb_width;
 846                 mb_intra_ub = 0;
 847
 848                 if (mb_x != 0) {
 849                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
 850                 }
 851
 852                 if (mb_y != 0) {
 853                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
 854
 855                     if (mb_x != 0)
 856                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
 857
 858                     if (mb_x != (mb_width -1))
 859                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 860                 }
 861
 862                 if (i < mb_width) {
 863                     if (i == 0)
 864                         mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
 865
 866                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
 867
 868                     if ((i == (mb_width - 1)) && slice_mb_x) {
 869                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 870                     }
 871                 }
 872
 873                 if ((i == mb_width) && slice_mb_x) {
 874                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
 875                 }
 876
 877                 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
 878                 *command_ptr++ = kernel;
 879                 *command_ptr++ = 0;
 880                 *command_ptr++ = 0;
 881                 *command_ptr++ = 0;
 882                 *command_ptr++ = 0;
 883
 884                 /*inline data */
 885                 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
 886                 *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
 887
 888                 i += 1;
 889             }
 890
 891             slice_param++;
 892         }
 893     }
 894
 895     *command_ptr++ = 0;
 896     *command_ptr++ = MI_BATCH_BUFFER_END;
 897
 898     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
 899 }
 900
 901 static void
 902 gen75_vme_mpeg2_pipeline_programing(VADriverContextP ctx,
 903                                     struct encode_state *encode_state,
 904                                     int is_intra,
 905                                     struct intel_encoder_context *encoder_context)
 906 {
 907     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 908     struct intel_batchbuffer *batch = encoder_context->base.batch;
 909     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 910     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 911     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 912
 913     gen75_vme_mpeg2_fill_vme_batchbuffer(ctx,
 914                                          encode_state,
 915                                          width_in_mbs, height_in_mbs,
 916                                          is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER,
 917                                          0,
 918                                          encoder_context);
 919
 920     intel_batchbuffer_start_atomic(batch, 0x1000);
 921     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
 922     BEGIN_BATCH(batch, 2);
 923     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
 924     OUT_RELOC(batch,
 925               vme_context->vme_batchbuffer.bo,
 926               I915_GEM_DOMAIN_COMMAND, 0,
 927               0);
 928     ADVANCE_BATCH(batch);
 929
 930     intel_batchbuffer_end_atomic(batch);
 931 }
 932
 933 static VAStatus
 934 gen75_vme_mpeg2_prepare(VADriverContextP ctx,
 935                         struct encode_state *encode_state,
 936                         struct intel_encoder_context *encoder_context)
 937 {
 938     VAStatus vaStatus = VA_STATUS_SUCCESS;
 939     VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
 940
 941     /*Setup all the memory object*/
 942     gen75_vme_mpeg2_surface_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 943     gen75_vme_interface_setup(ctx, encode_state, encoder_context);
 944     gen75_vme_vme_state_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 945     gen75_vme_constant_setup(ctx, encode_state, encoder_context);
 946
 947     /*Programing media pipeline*/
 948     gen75_vme_mpeg2_pipeline_programing(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 949
 950     return vaStatus;
 951 }
 952
 953 static VAStatus
 954 gen75_vme_mpeg2_pipeline(VADriverContextP ctx,
 955                          VAProfile profile,
 956                          struct encode_state *encode_state,
 957                          struct intel_encoder_context *encoder_context)
 958 {
 959     gen75_vme_media_init(ctx, encoder_context);
 960     gen75_vme_mpeg2_prepare(ctx, encode_state, encoder_context);
 961     gen75_vme_run(ctx, encode_state, encoder_context);
 962     gen75_vme_stop(ctx, encode_state, encoder_context);
 963
 964     return VA_STATUS_SUCCESS;
 965 }
 966
 967 static void
 968 gen75_vme_context_destroy(void *context)
 969 {
 970     struct gen6_vme_context *vme_context = context;
 971
 972     i965_gpe_context_destroy(&vme_context->gpe_context);
 973
 974     dri_bo_unreference(vme_context->vme_output.bo);
 975     vme_context->vme_output.bo = NULL;
 976
 977     dri_bo_unreference(vme_context->vme_state.bo);
 978     vme_context->vme_state.bo = NULL;
 979
 980     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
 981     vme_context->vme_batchbuffer.bo = NULL;
 982
 983     if (vme_context->vme_state_message) {
 984         free(vme_context->vme_state_message);
 985         vme_context->vme_state_message = NULL;
 986     }
 987
 988     free(vme_context);
 989 }
 990
 991 Bool gen75_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
 992 {
 993     struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context));
 994     struct i965_kernel *vme_kernel_list = NULL;
 995         int i965_kernel_num;
 996
 997     switch (encoder_context->profile) {
 998     case VAProfileH264Baseline:
 999     case VAProfileH264Main:
1000     case VAProfileH264High:
1001         vme_kernel_list = gen75_vme_kernels;
1002         encoder_context->vme_pipeline = gen75_vme_pipeline;
1003         i965_kernel_num = sizeof(gen75_vme_kernels) / sizeof(struct i965_kernel);
1004         break;
1005
1006     case VAProfileMPEG2Simple:
1007     case VAProfileMPEG2Main:
1008         vme_kernel_list = gen75_vme_mpeg2_kernels;
1009         encoder_context->vme_pipeline = gen75_vme_mpeg2_pipeline;
1010         i965_kernel_num = sizeof(gen75_vme_mpeg2_kernels) / sizeof(struct i965_kernel);
1011
1012         break;
1013
1014     default:
1015         /* never get here */
1016         assert(0);
1017
1018         break;
1019     }
1020     vme_context->vme_kernel_sum = i965_kernel_num;
1021     vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
1022
1023     vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6;
1024     vme_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data);
1025
1026     vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH;
1027
1028     vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
1029     vme_context->gpe_context.vfe_state.num_urb_entries = 16;
1030     vme_context->gpe_context.vfe_state.gpgpu_mode = 0;
1031     vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1;
1032     vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1;
1033
1034     gen7_vme_scoreboard_init(ctx, vme_context);
1035
1036     i965_gpe_load_kernels(ctx,
1037                           &vme_context->gpe_context,
1038                           vme_kernel_list,
1039                           i965_kernel_num);
1040     vme_context->vme_surface2_setup = gen7_gpe_surface2_setup;
1041     vme_context->vme_media_rw_surface_setup = gen7_gpe_media_rw_surface_setup;
1042     vme_context->vme_buffer_suface_setup = gen7_gpe_buffer_suface_setup;
1043     vme_context->vme_media_chroma_surface_setup = gen75_gpe_media_chroma_surface_setup;
1044
1045     encoder_context->vme_context = vme_context;
1046     encoder_context->vme_context_destroy = gen75_vme_context_destroy;
1047
1048     vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int));
1049
1050     return True;
1051 }