src/gen75_vme.c

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Zhao Yakui <yakui.zhao@intel.com>
  26  *    Xiang Haihao <haihao.xiang@intel.com>
  27  */
  28
  29 #include <stdio.h>
  30 #include <stdlib.h>
  31 #include <string.h>
  32 #include <assert.h>
  33
  34 #include "intel_batchbuffer.h"
  35 #include "intel_driver.h"
  36
  37 #include "i965_defines.h"
  38 #include "i965_drv_video.h"
  39 #include "i965_encoder.h"
  40 #include "gen6_vme.h"
  41 #include "gen6_mfc.h"
  42
  43 #define SURFACE_STATE_PADDED_SIZE_0_GEN7        ALIGN(sizeof(struct gen7_surface_state), 32)
  44 #define SURFACE_STATE_PADDED_SIZE_1_GEN7        ALIGN(sizeof(struct gen7_surface_state2), 32)
  45 #define SURFACE_STATE_PADDED_SIZE_GEN7          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN7, SURFACE_STATE_PADDED_SIZE_1_GEN7)
  46
  47 #define SURFACE_STATE_PADDED_SIZE_0_GEN6        ALIGN(sizeof(struct i965_surface_state), 32)
  48 #define SURFACE_STATE_PADDED_SIZE_1_GEN6        ALIGN(sizeof(struct i965_surface_state2), 32)
  49 #define SURFACE_STATE_PADDED_SIZE_GEN6          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN6, SURFACE_STATE_PADDED_SIZE_1_GEN6)
  50
  51 #define SURFACE_STATE_PADDED_SIZE               MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7)
  52 #define SURFACE_STATE_OFFSET(index)             (SURFACE_STATE_PADDED_SIZE * index)
  53 #define BINDING_TABLE_OFFSET(index)             (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index)
  54
  55 #define VME_INTRA_SHADER        0
  56 #define VME_INTER_SHADER        1
  57 #define VME_BATCHBUFFER         2
  58
  59 #define CURBE_ALLOCATION_SIZE   37              /* in 256-bit */
  60 #define CURBE_TOTAL_DATA_LENGTH (4 * 32)        /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */
  61 #define CURBE_URB_ENTRY_LENGTH  4               /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */
  62
  63 #define VME_MSG_LENGTH          32
  64
  65 static const uint32_t gen75_vme_intra_frame[][4] = {
  66 #include "shaders/vme/intra_frame_haswell.g75b"
  67 };
  68
  69 static const uint32_t gen75_vme_inter_frame[][4] = {
  70 #include "shaders/vme/inter_frame_haswell.g75b"
  71 };
  72
  73 static const uint32_t gen75_vme_batchbuffer[][4] = {
  74 #include "shaders/vme/batchbuffer.g75b"
  75 };
  76
  77 static struct i965_kernel gen75_vme_kernels[] = {
  78     {
  79         "VME Intra Frame",
  80         VME_INTRA_SHADER, /*index*/
  81         gen75_vme_intra_frame,
  82         sizeof(gen75_vme_intra_frame),
  83         NULL
  84     },
  85     {
  86         "VME inter Frame",
  87         VME_INTER_SHADER,
  88         gen75_vme_inter_frame,
  89         sizeof(gen75_vme_inter_frame),
  90         NULL
  91     },
  92     {
  93         "VME BATCHBUFFER",
  94         VME_BATCHBUFFER,
  95         gen75_vme_batchbuffer,
  96         sizeof(gen75_vme_batchbuffer),
  97         NULL
  98     },
  99 };
 100
 101 static const uint32_t gen75_vme_mpeg2_intra_frame[][4] = {
 102 #include "shaders/vme/intra_frame_haswell.g75b"
 103 };
 104
 105 static const uint32_t gen75_vme_mpeg2_inter_frame[][4] = {
 106 #include "shaders/vme/mpeg2_inter_frame_haswell.g75b"
 107 };
 108
 109 static const uint32_t gen75_vme_mpeg2_batchbuffer[][4] = {
 110 #include "shaders/vme/batchbuffer.g75b"
 111 };
 112
 113 static struct i965_kernel gen75_vme_mpeg2_kernels[] = {
 114     {
 115         "VME Intra Frame",
 116         VME_INTRA_SHADER, /*index*/
 117         gen75_vme_mpeg2_intra_frame,
 118         sizeof(gen75_vme_mpeg2_intra_frame),
 119         NULL
 120     },
 121     {
 122         "VME inter Frame",
 123         VME_INTER_SHADER,
 124         gen75_vme_mpeg2_inter_frame,
 125         sizeof(gen75_vme_mpeg2_inter_frame),
 126         NULL
 127     },
 128     {
 129         "VME BATCHBUFFER",
 130         VME_BATCHBUFFER,
 131         gen75_vme_mpeg2_batchbuffer,
 132         sizeof(gen75_vme_mpeg2_batchbuffer),
 133         NULL
 134     },
 135 };
 136
 137 /* only used for VME source surface state */
 138 static void
 139 gen75_vme_source_surface_state(VADriverContextP ctx,
 140                                int index,
 141                                struct object_surface *obj_surface,
 142                                struct intel_encoder_context *encoder_context)
 143 {
 144     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 145
 146     vme_context->vme_surface2_setup(ctx,
 147                                     &vme_context->gpe_context,
 148                                     obj_surface,
 149                                     BINDING_TABLE_OFFSET(index),
 150                                     SURFACE_STATE_OFFSET(index));
 151 }
 152
 153 static void
 154 gen75_vme_media_source_surface_state(VADriverContextP ctx,
 155                                      int index,
 156                                      struct object_surface *obj_surface,
 157                                      struct intel_encoder_context *encoder_context)
 158 {
 159     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 160
 161     vme_context->vme_media_rw_surface_setup(ctx,
 162                                             &vme_context->gpe_context,
 163                                             obj_surface,
 164                                             BINDING_TABLE_OFFSET(index),
 165                                             SURFACE_STATE_OFFSET(index));
 166 }
 167
 168 static void
 169 gen75_vme_media_chroma_source_surface_state(VADriverContextP ctx,
 170                                             int index,
 171                                             struct object_surface *obj_surface,
 172                                             struct intel_encoder_context *encoder_context)
 173 {
 174     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 175
 176     vme_context->vme_media_chroma_surface_setup(ctx,
 177                                                 &vme_context->gpe_context,
 178                                                 obj_surface,
 179                                                 BINDING_TABLE_OFFSET(index),
 180                                                 SURFACE_STATE_OFFSET(index));
 181 }
 182
 183 static void
 184 gen75_vme_output_buffer_setup(VADriverContextP ctx,
 185                               struct encode_state *encode_state,
 186                               int index,
 187                               struct intel_encoder_context *encoder_context)
 188
 189 {
 190     struct i965_driver_data *i965 = i965_driver_data(ctx);
 191     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 192     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 193     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 194     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 195     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 196     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 197
 198     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
 199     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
 200
 201     if (is_intra)
 202         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
 203     else
 204         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
 205     /*
 206      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
 207      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
 208      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
 209      */
 210
 211     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
 212                                               "VME output buffer",
 213                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
 214                                               0x1000);
 215     assert(vme_context->vme_output.bo);
 216     vme_context->vme_buffer_suface_setup(ctx,
 217                                          &vme_context->gpe_context,
 218                                          &vme_context->vme_output,
 219                                          BINDING_TABLE_OFFSET(index),
 220                                          SURFACE_STATE_OFFSET(index));
 221 }
 222
 223 static void
 224 gen75_vme_output_vme_batchbuffer_setup(VADriverContextP ctx,
 225                                        struct encode_state *encode_state,
 226                                        int index,
 227                                        struct intel_encoder_context *encoder_context)
 228
 229 {
 230     struct i965_driver_data *i965 = i965_driver_data(ctx);
 231     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 232     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 233     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 234     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 235
 236     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
 237     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
 238     vme_context->vme_batchbuffer.pitch = 16;
 239     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
 240                                                    "VME batchbuffer",
 241                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
 242                                                    0x1000);
 243     vme_context->vme_buffer_suface_setup(ctx,
 244                                          &vme_context->gpe_context,
 245                                          &vme_context->vme_batchbuffer,
 246                                          BINDING_TABLE_OFFSET(index),
 247                                          SURFACE_STATE_OFFSET(index));
 248 }
 249
 250 static VAStatus
 251 gen75_vme_surface_setup(VADriverContextP ctx,
 252                         struct encode_state *encode_state,
 253                         int is_intra,
 254                         struct intel_encoder_context *encoder_context)
 255 {
 256     struct i965_driver_data *i965 = i965_driver_data(ctx);
 257     struct object_surface *obj_surface;
 258     VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 259
 260     /*Setup surfaces state*/
 261     /* current picture for encoding */
 262     obj_surface = SURFACE(encoder_context->input_yuv_surface);
 263     assert(obj_surface);
 264     gen75_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
 265     gen75_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
 266     gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
 267
 268     if (!is_intra) {
 269         /* reference 0 */
 270         obj_surface = SURFACE(pPicParameter->ReferenceFrames[0].picture_id);
 271         assert(obj_surface);
 272         if ( obj_surface->bo != NULL)
 273             gen75_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
 274
 275         /* reference 1 */
 276         obj_surface = SURFACE(pPicParameter->ReferenceFrames[1].picture_id);
 277         assert(obj_surface);
 278         if ( obj_surface->bo != NULL )
 279             gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
 280     }
 281
 282     /* VME output */
 283     gen75_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context);
 284     gen75_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
 285
 286     return VA_STATUS_SUCCESS;
 287 }
 288
 289 static VAStatus gen75_vme_interface_setup(VADriverContextP ctx,
 290                                           struct encode_state *encode_state,
 291                                           struct intel_encoder_context *encoder_context)
 292 {
 293     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 294     struct gen6_interface_descriptor_data *desc;
 295     int i;
 296     dri_bo *bo;
 297
 298     bo = vme_context->gpe_context.idrt.bo;
 299     dri_bo_map(bo, 1);
 300     assert(bo->virtual);
 301     desc = bo->virtual;
 302
 303     for (i = 0; i < GEN6_VME_KERNEL_NUMBER; i++) {
 304         struct i965_kernel *kernel;
 305         kernel = &vme_context->gpe_context.kernels[i];
 306         assert(sizeof(*desc) == 32);
 307         /*Setup the descritor table*/
 308         memset(desc, 0, sizeof(*desc));
 309         desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6);
 310         desc->desc2.sampler_count = 0; /* FIXME: */
 311         desc->desc2.sampler_state_pointer = 0;
 312         desc->desc3.binding_table_entry_count = 1; /* FIXME: */
 313         desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5);
 314         desc->desc4.constant_urb_entry_read_offset = 0;
 315         desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH;
 316
 317         /*kernel start*/
 318         dri_bo_emit_reloc(bo,
 319                           I915_GEM_DOMAIN_INSTRUCTION, 0,
 320                           0,
 321                           i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0),
 322                           kernel->bo);
 323         desc++;
 324     }
 325     dri_bo_unmap(bo);
 326
 327     return VA_STATUS_SUCCESS;
 328 }
 329
 330 static VAStatus gen75_vme_constant_setup(VADriverContextP ctx,
 331                                          struct encode_state *encode_state,
 332                                          struct intel_encoder_context *encoder_context)
 333 {
 334     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 335     unsigned char *constant_buffer;
 336     unsigned int *vme_state_message;
 337     int mv_num = 32;
 338
 339     vme_state_message = (unsigned int *)vme_context->vme_state_message;
 340
 341     if (encoder_context->profile == VAProfileH264Baseline ||
 342         encoder_context->profile == VAProfileH264Main ||
 343         encoder_context->profile == VAProfileH264High) {
 344         if (vme_context->h264_level >= 30) {
 345             mv_num = 16;
 346
 347             if (vme_context->h264_level >= 31)
 348                 mv_num = 8;
 349         }
 350     } else if (encoder_context->profile == VAProfileMPEG2Simple ||
 351                encoder_context->profile == VAProfileMPEG2Main) {
 352         mv_num = 2;
 353     }
 354
 355     vme_state_message[31] = mv_num;
 356
 357     dri_bo_map(vme_context->gpe_context.curbe.bo, 1);
 358     assert(vme_context->gpe_context.curbe.bo->virtual);
 359     constant_buffer = vme_context->gpe_context.curbe.bo->virtual;
 360
 361     /* VME MV/Mb cost table is passed by using const buffer */
 362     /* Now it uses the fixed search path. So it is constructed directly
 363      * in the GPU shader.
 364      */
 365     memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128);
 366
 367     dri_bo_unmap(vme_context->gpe_context.curbe.bo);
 368
 369     return VA_STATUS_SUCCESS;
 370 }
 371
 372 static const unsigned int intra_mb_mode_cost_table[] = {
 373     0x31110001, // for qp0
 374     0x09110001, // for qp1
 375     0x15030001, // for qp2
 376     0x0b030001, // for qp3
 377     0x0d030011, // for qp4
 378     0x17210011, // for qp5
 379     0x41210011, // for qp6
 380     0x19210011, // for qp7
 381     0x25050003, // for qp8
 382     0x1b130003, // for qp9
 383     0x1d130003, // for qp10
 384     0x27070021, // for qp11
 385     0x51310021, // for qp12
 386     0x29090021, // for qp13
 387     0x35150005, // for qp14
 388     0x2b0b0013, // for qp15
 389     0x2d0d0013, // for qp16
 390     0x37170007, // for qp17
 391     0x61410031, // for qp18
 392     0x39190009, // for qp19
 393     0x45250015, // for qp20
 394     0x3b1b000b, // for qp21
 395     0x3d1d000d, // for qp22
 396     0x47270017, // for qp23
 397     0x71510041, // for qp24 ! center for qp=0..30
 398     0x49290019, // for qp25
 399     0x55350025, // for qp26
 400     0x4b2b001b, // for qp27
 401     0x4d2d001d, // for qp28
 402     0x57370027, // for qp29
 403     0x81610051, // for qp30
 404     0x57270017, // for qp31
 405     0x81510041, // for qp32 ! center for qp=31..51
 406     0x59290019, // for qp33
 407     0x65350025, // for qp34
 408     0x5b2b001b, // for qp35
 409     0x5d2d001d, // for qp36
 410     0x67370027, // for qp37
 411     0x91610051, // for qp38
 412     0x69390029, // for qp39
 413     0x75450035, // for qp40
 414     0x6b3b002b, // for qp41
 415     0x6d3d002d, // for qp42
 416     0x77470037, // for qp43
 417     0xa1710061, // for qp44
 418     0x79490039, // for qp45
 419     0x85550045, // for qp46
 420     0x7b4b003b, // for qp47
 421     0x7d4d003d, // for qp48
 422     0x87570047, // for qp49
 423     0xb1810071, // for qp50
 424     0x89590049  // for qp51
 425 };
 426
 427 static void gen75_vme_state_setup_fixup(VADriverContextP ctx,
 428                                         struct encode_state *encode_state,
 429                                         struct intel_encoder_context *encoder_context,
 430                                         unsigned int *vme_state_message)
 431 {
 432     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
 433     VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 434     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 435
 436     if (slice_param->slice_type != SLICE_TYPE_I &&
 437         slice_param->slice_type != SLICE_TYPE_SI)
 438         return;
 439     if (encoder_context->rate_control_mode == VA_RC_CQP)
 440         vme_state_message[0] = intra_mb_mode_cost_table[pic_param->pic_init_qp + slice_param->slice_qp_delta];
 441     else
 442         vme_state_message[0] = intra_mb_mode_cost_table[mfc_context->bit_rate_control_context[slice_param->slice_type].QpPrimeY];
 443 }
 444
 445 static VAStatus gen75_vme_vme_state_setup(VADriverContextP ctx,
 446                                           struct encode_state *encode_state,
 447                                           int is_intra,
 448                                           struct intel_encoder_context *encoder_context)
 449 {
 450     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 451     unsigned int *vme_state_message;
 452     int i;
 453
 454     //pass the MV/Mb cost into VME message on HASWell
 455     assert(vme_context->vme_state_message);
 456     vme_state_message = (unsigned int *)vme_context->vme_state_message;
 457
 458     vme_state_message[0] = 0x4a4a4a4a;
 459     vme_state_message[1] = 0x4a4a4a4a;
 460     vme_state_message[2] = 0x4a4a4a4a;
 461     vme_state_message[3] = 0x22120200;
 462     vme_state_message[4] = 0x62524232;
 463
 464     for (i=5; i < 8; i++) {
 465         vme_state_message[i] = 0;
 466     }
 467
 468     switch (encoder_context->profile) {
 469     case VAProfileH264Baseline:
 470     case VAProfileH264Main:
 471     case VAProfileH264High:
 472         gen75_vme_state_setup_fixup(ctx, encode_state, encoder_context, vme_state_message);
 473
 474         break;
 475
 476     default:
 477         /* no fixup */
 478         break;
 479     }
 480
 481     return VA_STATUS_SUCCESS;
 482 }
 483
 484 static void
 485 gen75_vme_fill_vme_batchbuffer(VADriverContextP ctx,
 486                                struct encode_state *encode_state,
 487                                int mb_width, int mb_height,
 488                                int kernel,
 489                                int transform_8x8_mode_flag,
 490                                struct intel_encoder_context *encoder_context)
 491 {
 492     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 493     int mb_x = 0, mb_y = 0;
 494     int i, s;
 495     unsigned int *command_ptr;
 496
 497 #define         INTRA_PRED_AVAIL_FLAG_AE        0x60
 498 #define         INTRA_PRED_AVAIL_FLAG_B         0x10
 499 #define         INTRA_PRED_AVAIL_FLAG_C         0x8
 500 #define         INTRA_PRED_AVAIL_FLAG_D         0x4
 501 #define         INTRA_PRED_AVAIL_FLAG_BCD_MASK  0x1C
 502
 503     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
 504     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
 505
 506     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 507         VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
 508         int slice_mb_begin = pSliceParameter->macroblock_address;
 509         int slice_mb_number = pSliceParameter->num_macroblocks;
 510         unsigned int mb_intra_ub;
 511         int slice_mb_x = pSliceParameter->macroblock_address % mb_width;
 512         for (i = 0; i < slice_mb_number;  ) {
 513             int mb_count = i + slice_mb_begin;
 514             mb_x = mb_count % mb_width;
 515             mb_y = mb_count / mb_width;
 516             mb_intra_ub = 0;
 517             if (mb_x != 0) {
 518                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
 519             }
 520             if (mb_y != 0) {
 521                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
 522                 if (mb_x != 0)
 523                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
 524                 if (mb_x != (mb_width -1))
 525                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 526             }
 527             if (i < mb_width) {
 528                 if (i == 0)
 529                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
 530                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
 531                 if ((i == (mb_width - 1)) && slice_mb_x) {
 532                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 533                 }
 534             }
 535
 536             if ((i == mb_width) && slice_mb_x) {
 537                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
 538             }
 539             *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
 540             *command_ptr++ = kernel;
 541             *command_ptr++ = 0;
 542             *command_ptr++ = 0;
 543             *command_ptr++ = 0;
 544             *command_ptr++ = 0;
 545
 546             /*inline data */
 547             *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
 548             *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
 549
 550             i += 1;
 551         }
 552     }
 553
 554     *command_ptr++ = 0;
 555     *command_ptr++ = MI_BATCH_BUFFER_END;
 556
 557     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
 558 }
 559
 560 static void gen75_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
 561 {
 562     struct i965_driver_data *i965 = i965_driver_data(ctx);
 563     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 564     dri_bo *bo;
 565
 566     i965_gpe_context_init(ctx, &vme_context->gpe_context);
 567
 568     /* VME output buffer */
 569     dri_bo_unreference(vme_context->vme_output.bo);
 570     vme_context->vme_output.bo = NULL;
 571
 572     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
 573     vme_context->vme_batchbuffer.bo = NULL;
 574
 575     /* VME state */
 576     dri_bo_unreference(vme_context->vme_state.bo);
 577     vme_context->vme_state.bo = NULL;
 578 }
 579
 580 static void gen75_vme_pipeline_programing(VADriverContextP ctx,
 581                                           struct encode_state *encode_state,
 582                                           struct intel_encoder_context *encoder_context)
 583 {
 584     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 585     struct intel_batchbuffer *batch = encoder_context->base.batch;
 586     VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 587     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 588     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 589     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 590     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 591     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 592
 593     gen75_vme_fill_vme_batchbuffer(ctx,
 594                                    encode_state,
 595                                    width_in_mbs, height_in_mbs,
 596                                    is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER,
 597                                    pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
 598                                    encoder_context);
 599
 600     intel_batchbuffer_start_atomic(batch, 0x1000);
 601     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
 602     BEGIN_BATCH(batch, 2);
 603     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
 604     OUT_RELOC(batch,
 605               vme_context->vme_batchbuffer.bo,
 606               I915_GEM_DOMAIN_COMMAND, 0,
 607               0);
 608     ADVANCE_BATCH(batch);
 609
 610     intel_batchbuffer_end_atomic(batch);
 611 }
 612
 613 static VAStatus gen75_vme_prepare(VADriverContextP ctx,
 614                                   struct encode_state *encode_state,
 615                                   struct intel_encoder_context *encoder_context)
 616 {
 617     VAStatus vaStatus = VA_STATUS_SUCCESS;
 618     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 619     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 620     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 621     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 622
 623     if (!vme_context->h264_level ||
 624         (vme_context->h264_level != pSequenceParameter->level_idc)) {
 625         vme_context->h264_level = pSequenceParameter->level_idc;
 626     }
 627
 628     intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context);
 629
 630     /*Setup all the memory object*/
 631     gen75_vme_surface_setup(ctx, encode_state, is_intra, encoder_context);
 632     gen75_vme_interface_setup(ctx, encode_state, encoder_context);
 633     //gen75_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context);
 634     gen75_vme_constant_setup(ctx, encode_state, encoder_context);
 635
 636     /*Programing media pipeline*/
 637     gen75_vme_pipeline_programing(ctx, encode_state, encoder_context);
 638
 639     return vaStatus;
 640 }
 641
 642 static VAStatus gen75_vme_run(VADriverContextP ctx,
 643                               struct encode_state *encode_state,
 644                               struct intel_encoder_context *encoder_context)
 645 {
 646     struct intel_batchbuffer *batch = encoder_context->base.batch;
 647
 648     intel_batchbuffer_flush(batch);
 649
 650     return VA_STATUS_SUCCESS;
 651 }
 652
 653 static VAStatus gen75_vme_stop(VADriverContextP ctx,
 654                                struct encode_state *encode_state,
 655                                struct intel_encoder_context *encoder_context)
 656 {
 657     return VA_STATUS_SUCCESS;
 658 }
 659
 660 static VAStatus
 661 gen75_vme_pipeline(VADriverContextP ctx,
 662                    VAProfile profile,
 663                    struct encode_state *encode_state,
 664                    struct intel_encoder_context *encoder_context)
 665 {
 666     gen75_vme_media_init(ctx, encoder_context);
 667     gen75_vme_prepare(ctx, encode_state, encoder_context);
 668     gen75_vme_run(ctx, encode_state, encoder_context);
 669     gen75_vme_stop(ctx, encode_state, encoder_context);
 670
 671     return VA_STATUS_SUCCESS;
 672 }
 673
 674 static void
 675 gen75_vme_mpeg2_output_buffer_setup(VADriverContextP ctx,
 676                                     struct encode_state *encode_state,
 677                                     int index,
 678                                     int is_intra,
 679                                     struct intel_encoder_context *encoder_context)
 680
 681 {
 682     struct i965_driver_data *i965 = i965_driver_data(ctx);
 683     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 684     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 685     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 686     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 687
 688     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
 689     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
 690
 691     if (is_intra)
 692         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
 693     else
 694         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
 695     /*
 696      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
 697      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
 698      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
 699      */
 700
 701     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
 702                                               "VME output buffer",
 703                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
 704                                               0x1000);
 705     assert(vme_context->vme_output.bo);
 706     vme_context->vme_buffer_suface_setup(ctx,
 707                                          &vme_context->gpe_context,
 708                                          &vme_context->vme_output,
 709                                          BINDING_TABLE_OFFSET(index),
 710                                          SURFACE_STATE_OFFSET(index));
 711 }
 712
 713 static void
 714 gen75_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx,
 715                                              struct encode_state *encode_state,
 716                                              int index,
 717                                              struct intel_encoder_context *encoder_context)
 718
 719 {
 720     struct i965_driver_data *i965 = i965_driver_data(ctx);
 721     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 722     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 723     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 724     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 725
 726     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
 727     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
 728     vme_context->vme_batchbuffer.pitch = 16;
 729     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
 730                                                    "VME batchbuffer",
 731                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
 732                                                    0x1000);
 733     vme_context->vme_buffer_suface_setup(ctx,
 734                                          &vme_context->gpe_context,
 735                                          &vme_context->vme_batchbuffer,
 736                                          BINDING_TABLE_OFFSET(index),
 737                                          SURFACE_STATE_OFFSET(index));
 738 }
 739
 740 static VAStatus
 741 gen75_vme_mpeg2_surface_setup(VADriverContextP ctx,
 742                               struct encode_state *encode_state,
 743                               int is_intra,
 744                               struct intel_encoder_context *encoder_context)
 745 {
 746     struct i965_driver_data *i965 = i965_driver_data(ctx);
 747     struct object_surface *obj_surface;
 748     VAEncPictureParameterBufferMPEG2 *pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer;
 749
 750     /*Setup surfaces state*/
 751     /* current picture for encoding */
 752     obj_surface = SURFACE(encoder_context->input_yuv_surface);
 753     assert(obj_surface);
 754     gen75_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
 755     gen75_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
 756     gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
 757
 758     if (!is_intra) {
 759         /* reference 0 */
 760         obj_surface = SURFACE(pic_param->forward_reference_picture);
 761         assert(obj_surface);
 762         if ( obj_surface->bo != NULL)
 763             gen75_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
 764
 765         /* reference 1 */
 766         obj_surface = SURFACE(pic_param->backward_reference_picture);
 767         if (obj_surface && obj_surface->bo != NULL)
 768             gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
 769     }
 770
 771     /* VME output */
 772     gen75_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context);
 773     gen75_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
 774
 775     return VA_STATUS_SUCCESS;
 776 }
 777
 778 static void
 779 gen75_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx,
 780                                      struct encode_state *encode_state,
 781                                      int mb_width, int mb_height,
 782                                      int kernel,
 783                                      int transform_8x8_mode_flag,
 784                                      struct intel_encoder_context *encoder_context)
 785 {
 786     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 787     int mb_x = 0, mb_y = 0;
 788     int i, s, j;
 789     unsigned int *command_ptr;
 790
 791 #define         INTRA_PRED_AVAIL_FLAG_AE        0x60
 792 #define         INTRA_PRED_AVAIL_FLAG_B         0x10
 793 #define         INTRA_PRED_AVAIL_FLAG_C         0x8
 794 #define         INTRA_PRED_AVAIL_FLAG_D         0x4
 795 #define         INTRA_PRED_AVAIL_FLAG_BCD_MASK  0x1C
 796
 797     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
 798     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
 799
 800     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 801         VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer;
 802
 803         for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) {
 804             int slice_mb_begin = slice_param->macroblock_address;
 805             int slice_mb_number = slice_param->num_macroblocks;
 806             unsigned int mb_intra_ub;
 807             int slice_mb_x = slice_param->macroblock_address % mb_width;
 808
 809             for (i = 0; i < slice_mb_number;) {
 810                 int mb_count = i + slice_mb_begin;
 811
 812                 mb_x = mb_count % mb_width;
 813                 mb_y = mb_count / mb_width;
 814                 mb_intra_ub = 0;
 815
 816                 if (mb_x != 0) {
 817                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
 818                 }
 819
 820                 if (mb_y != 0) {
 821                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
 822
 823                     if (mb_x != 0)
 824                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
 825
 826                     if (mb_x != (mb_width -1))
 827                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 828                 }
 829
 830                 if (i < mb_width) {
 831                     if (i == 0)
 832                         mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
 833
 834                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
 835
 836                     if ((i == (mb_width - 1)) && slice_mb_x) {
 837                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 838                     }
 839                 }
 840
 841                 if ((i == mb_width) && slice_mb_x) {
 842                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
 843                 }
 844
 845                 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
 846                 *command_ptr++ = kernel;
 847                 *command_ptr++ = 0;
 848                 *command_ptr++ = 0;
 849                 *command_ptr++ = 0;
 850                 *command_ptr++ = 0;
 851
 852                 /*inline data */
 853                 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
 854                 *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
 855
 856                 i += 1;
 857             }
 858
 859             slice_param++;
 860         }
 861     }
 862
 863     *command_ptr++ = 0;
 864     *command_ptr++ = MI_BATCH_BUFFER_END;
 865
 866     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
 867 }
 868
 869 static void
 870 gen75_vme_mpeg2_pipeline_programing(VADriverContextP ctx,
 871                                     struct encode_state *encode_state,
 872                                     int is_intra,
 873                                     struct intel_encoder_context *encoder_context)
 874 {
 875     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 876     struct intel_batchbuffer *batch = encoder_context->base.batch;
 877     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 878     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 879     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 880
 881     gen75_vme_mpeg2_fill_vme_batchbuffer(ctx,
 882                                          encode_state,
 883                                          width_in_mbs, height_in_mbs,
 884                                          is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER,
 885                                          0,
 886                                          encoder_context);
 887
 888     intel_batchbuffer_start_atomic(batch, 0x1000);
 889     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
 890     BEGIN_BATCH(batch, 2);
 891     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
 892     OUT_RELOC(batch,
 893               vme_context->vme_batchbuffer.bo,
 894               I915_GEM_DOMAIN_COMMAND, 0,
 895               0);
 896     ADVANCE_BATCH(batch);
 897
 898     intel_batchbuffer_end_atomic(batch);
 899 }
 900
 901 static VAStatus
 902 gen75_vme_mpeg2_prepare(VADriverContextP ctx,
 903                         struct encode_state *encode_state,
 904                         struct intel_encoder_context *encoder_context)
 905 {
 906     VAStatus vaStatus = VA_STATUS_SUCCESS;
 907     VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
 908
 909     /*Setup all the memory object*/
 910     gen75_vme_mpeg2_surface_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 911     gen75_vme_interface_setup(ctx, encode_state, encoder_context);
 912     gen75_vme_vme_state_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 913     gen75_vme_constant_setup(ctx, encode_state, encoder_context);
 914
 915     /*Programing media pipeline*/
 916     gen75_vme_mpeg2_pipeline_programing(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 917
 918     return vaStatus;
 919 }
 920
 921 static VAStatus
 922 gen75_vme_mpeg2_pipeline(VADriverContextP ctx,
 923                          VAProfile profile,
 924                          struct encode_state *encode_state,
 925                          struct intel_encoder_context *encoder_context)
 926 {
 927     gen75_vme_media_init(ctx, encoder_context);
 928     gen75_vme_mpeg2_prepare(ctx, encode_state, encoder_context);
 929     gen75_vme_run(ctx, encode_state, encoder_context);
 930     gen75_vme_stop(ctx, encode_state, encoder_context);
 931
 932     return VA_STATUS_SUCCESS;
 933 }
 934
 935 static void
 936 gen75_vme_context_destroy(void *context)
 937 {
 938     struct gen6_vme_context *vme_context = context;
 939
 940     i965_gpe_context_destroy(&vme_context->gpe_context);
 941
 942     dri_bo_unreference(vme_context->vme_output.bo);
 943     vme_context->vme_output.bo = NULL;
 944
 945     dri_bo_unreference(vme_context->vme_state.bo);
 946     vme_context->vme_state.bo = NULL;
 947
 948     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
 949     vme_context->vme_batchbuffer.bo = NULL;
 950
 951     if (vme_context->vme_state_message) {
 952         free(vme_context->vme_state_message);
 953         vme_context->vme_state_message = NULL;
 954     }
 955
 956     free(vme_context);
 957 }
 958
 959 Bool gen75_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
 960 {
 961     struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context));
 962     struct i965_kernel *vme_kernel_list = NULL;
 963
 964     switch (encoder_context->profile) {
 965     case VAProfileH264Baseline:
 966     case VAProfileH264Main:
 967     case VAProfileH264High:
 968         vme_kernel_list = gen75_vme_kernels;
 969         encoder_context->vme_pipeline = gen75_vme_pipeline;
 970
 971         break;
 972
 973     case VAProfileMPEG2Simple:
 974     case VAProfileMPEG2Main:
 975         vme_kernel_list = gen75_vme_mpeg2_kernels;
 976         encoder_context->vme_pipeline = gen75_vme_mpeg2_pipeline;
 977
 978         break;
 979
 980     default:
 981         /* never get here */
 982         assert(0);
 983
 984         break;
 985     }
 986
 987     vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
 988
 989     vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6;
 990     vme_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data);
 991
 992     vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH;
 993
 994     vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
 995     vme_context->gpe_context.vfe_state.num_urb_entries = 16;
 996     vme_context->gpe_context.vfe_state.gpgpu_mode = 0;
 997     vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1;
 998     vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1;
 999
1000     i965_gpe_load_kernels(ctx,
1001                           &vme_context->gpe_context,
1002                           vme_kernel_list,
1003                           GEN6_VME_KERNEL_NUMBER);
1004     vme_context->vme_surface2_setup = gen7_gpe_surface2_setup;
1005     vme_context->vme_media_rw_surface_setup = gen7_gpe_media_rw_surface_setup;
1006     vme_context->vme_buffer_suface_setup = gen7_gpe_buffer_suface_setup;
1007     vme_context->vme_media_chroma_surface_setup = gen75_gpe_media_chroma_surface_setup;
1008
1009     encoder_context->vme_context = vme_context;
1010     encoder_context->vme_context_destroy = gen75_vme_context_destroy;
1011
1012     vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int));
1013
1014     return True;
1015 }