src/gen75_vme.c

   1 /*
   2  * Copyright © 2010-2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Zhao Yakui <yakui.zhao@intel.com>
  26  *    Xiang Haihao <haihao.xiang@intel.com>
  27  *
  28  */
  29
  30 #include "sysdeps.h"
  31
  32 #include "intel_batchbuffer.h"
  33 #include "intel_driver.h"
  34
  35 #include "i965_defines.h"
  36 #include "i965_drv_video.h"
  37 #include "i965_encoder.h"
  38 #include "gen6_vme.h"
  39 #include "gen6_mfc.h"
  40
  41 #define SURFACE_STATE_PADDED_SIZE_0_GEN7        ALIGN(sizeof(struct gen7_surface_state), 32)
  42 #define SURFACE_STATE_PADDED_SIZE_1_GEN7        ALIGN(sizeof(struct gen7_surface_state2), 32)
  43 #define SURFACE_STATE_PADDED_SIZE_GEN7          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN7, SURFACE_STATE_PADDED_SIZE_1_GEN7)
  44
  45 #define SURFACE_STATE_PADDED_SIZE_0_GEN6        ALIGN(sizeof(struct i965_surface_state), 32)
  46 #define SURFACE_STATE_PADDED_SIZE_1_GEN6        ALIGN(sizeof(struct i965_surface_state2), 32)
  47 #define SURFACE_STATE_PADDED_SIZE_GEN6          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN6, SURFACE_STATE_PADDED_SIZE_1_GEN6)
  48
  49 #define SURFACE_STATE_PADDED_SIZE               MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7)
  50 #define SURFACE_STATE_OFFSET(index)             (SURFACE_STATE_PADDED_SIZE * index)
  51 #define BINDING_TABLE_OFFSET(index)             (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index)
  52
  53 #define VME_INTRA_SHADER        0
  54 #define VME_INTER_SHADER        1
  55 #define VME_BINTER_SHADER       3
  56 #define VME_BATCHBUFFER         2
  57
  58 #define CURBE_ALLOCATION_SIZE   37              /* in 256-bit */
  59 #define CURBE_TOTAL_DATA_LENGTH (4 * 32)        /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */
  60 #define CURBE_URB_ENTRY_LENGTH  4               /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */
  61
  62 #define VME_MSG_LENGTH          32
  63
  64 static const uint32_t gen75_vme_intra_frame[][4] = {
  65 #include "shaders/vme/intra_frame_haswell.g75b"
  66 };
  67
  68 static const uint32_t gen75_vme_inter_frame[][4] = {
  69 #include "shaders/vme/inter_frame_haswell.g75b"
  70 };
  71
  72 static const uint32_t gen75_vme_inter_bframe[][4] = {
  73 #include "shaders/vme/inter_bframe_haswell.g75b"
  74 };
  75
  76 static const uint32_t gen75_vme_batchbuffer[][4] = {
  77 #include "shaders/vme/batchbuffer.g75b"
  78 };
  79
  80 static struct i965_kernel gen75_vme_kernels[] = {
  81     {
  82         "VME Intra Frame",
  83         VME_INTRA_SHADER, /*index*/
  84         gen75_vme_intra_frame,
  85         sizeof(gen75_vme_intra_frame),
  86         NULL
  87     },
  88     {
  89         "VME inter Frame",
  90         VME_INTER_SHADER,
  91         gen75_vme_inter_frame,
  92         sizeof(gen75_vme_inter_frame),
  93         NULL
  94     },
  95     {
  96         "VME BATCHBUFFER",
  97         VME_BATCHBUFFER,
  98         gen75_vme_batchbuffer,
  99         sizeof(gen75_vme_batchbuffer),
 100         NULL
 101     },
 102     {
 103         "VME inter BFrame",
 104         VME_BINTER_SHADER,
 105         gen75_vme_inter_bframe,
 106         sizeof(gen75_vme_inter_bframe),
 107         NULL
 108     }
 109 };
 110
 111 static const uint32_t gen75_vme_mpeg2_intra_frame[][4] = {
 112 #include "shaders/vme/intra_frame_haswell.g75b"
 113 };
 114
 115 static const uint32_t gen75_vme_mpeg2_inter_frame[][4] = {
 116 #include "shaders/vme/mpeg2_inter_frame_haswell.g75b"
 117 };
 118
 119 static const uint32_t gen75_vme_mpeg2_batchbuffer[][4] = {
 120 #include "shaders/vme/batchbuffer.g75b"
 121 };
 122
 123 static struct i965_kernel gen75_vme_mpeg2_kernels[] = {
 124     {
 125         "VME Intra Frame",
 126         VME_INTRA_SHADER, /*index*/
 127         gen75_vme_mpeg2_intra_frame,
 128         sizeof(gen75_vme_mpeg2_intra_frame),
 129         NULL
 130     },
 131     {
 132         "VME inter Frame",
 133         VME_INTER_SHADER,
 134         gen75_vme_mpeg2_inter_frame,
 135         sizeof(gen75_vme_mpeg2_inter_frame),
 136         NULL
 137     },
 138     {
 139         "VME BATCHBUFFER",
 140         VME_BATCHBUFFER,
 141         gen75_vme_mpeg2_batchbuffer,
 142         sizeof(gen75_vme_mpeg2_batchbuffer),
 143         NULL
 144     },
 145 };
 146
 147 /* only used for VME source surface state */
 148 static void
 149 gen75_vme_source_surface_state(VADriverContextP ctx,
 150                                int index,
 151                                struct object_surface *obj_surface,
 152                                struct intel_encoder_context *encoder_context)
 153 {
 154     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 155
 156     vme_context->vme_surface2_setup(ctx,
 157                                     &vme_context->gpe_context,
 158                                     obj_surface,
 159                                     BINDING_TABLE_OFFSET(index),
 160                                     SURFACE_STATE_OFFSET(index));
 161 }
 162
 163 static void
 164 gen75_vme_media_source_surface_state(VADriverContextP ctx,
 165                                      int index,
 166                                      struct object_surface *obj_surface,
 167                                      struct intel_encoder_context *encoder_context)
 168 {
 169     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 170
 171     vme_context->vme_media_rw_surface_setup(ctx,
 172                                             &vme_context->gpe_context,
 173                                             obj_surface,
 174                                             BINDING_TABLE_OFFSET(index),
 175                                             SURFACE_STATE_OFFSET(index));
 176 }
 177
 178 static void
 179 gen75_vme_media_chroma_source_surface_state(VADriverContextP ctx,
 180                                             int index,
 181                                             struct object_surface *obj_surface,
 182                                             struct intel_encoder_context *encoder_context)
 183 {
 184     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 185
 186     vme_context->vme_media_chroma_surface_setup(ctx,
 187                                                 &vme_context->gpe_context,
 188                                                 obj_surface,
 189                                                 BINDING_TABLE_OFFSET(index),
 190                                                 SURFACE_STATE_OFFSET(index));
 191 }
 192
 193 static void
 194 gen75_vme_output_buffer_setup(VADriverContextP ctx,
 195                               struct encode_state *encode_state,
 196                               int index,
 197                               struct intel_encoder_context *encoder_context)
 198
 199 {
 200     struct i965_driver_data *i965 = i965_driver_data(ctx);
 201     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 202     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 203     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 204     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 205     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 206     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 207
 208     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
 209     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
 210
 211     if (is_intra)
 212         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
 213     else
 214         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
 215     /*
 216      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
 217      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
 218      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
 219      */
 220
 221     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
 222                                               "VME output buffer",
 223                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
 224                                               0x1000);
 225     assert(vme_context->vme_output.bo);
 226     vme_context->vme_buffer_suface_setup(ctx,
 227                                          &vme_context->gpe_context,
 228                                          &vme_context->vme_output,
 229                                          BINDING_TABLE_OFFSET(index),
 230                                          SURFACE_STATE_OFFSET(index));
 231 }
 232
 233 static void
 234 gen75_vme_output_vme_batchbuffer_setup(VADriverContextP ctx,
 235                                        struct encode_state *encode_state,
 236                                        int index,
 237                                        struct intel_encoder_context *encoder_context)
 238
 239 {
 240     struct i965_driver_data *i965 = i965_driver_data(ctx);
 241     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 242     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 243     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 244     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 245
 246     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
 247     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
 248     vme_context->vme_batchbuffer.pitch = 16;
 249     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
 250                                                    "VME batchbuffer",
 251                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
 252                                                    0x1000);
 253     vme_context->vme_buffer_suface_setup(ctx,
 254                                          &vme_context->gpe_context,
 255                                          &vme_context->vme_batchbuffer,
 256                                          BINDING_TABLE_OFFSET(index),
 257                                          SURFACE_STATE_OFFSET(index));
 258 }
 259
 260 static VAStatus
 261 gen75_vme_surface_setup(VADriverContextP ctx,
 262                         struct encode_state *encode_state,
 263                         int is_intra,
 264                         struct intel_encoder_context *encoder_context)
 265 {
 266     struct object_surface *obj_surface;
 267     struct i965_driver_data *i965 = i965_driver_data(ctx);
 268
 269     /*Setup surfaces state*/
 270     /* current picture for encoding */
 271     obj_surface = encode_state->input_yuv_object;
 272     gen75_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
 273     gen75_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
 274     gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
 275
 276     if (!is_intra) {
 277         VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 278         int slice_type;
 279         struct object_surface *slice_obj_surface;
 280         int ref_surface_id;
 281
 282         slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
 283
 284         if (slice_type == SLICE_TYPE_P || slice_type == SLICE_TYPE_B) {
 285                 slice_obj_surface = NULL;
 286                 ref_surface_id = slice_param->RefPicList0[0].picture_id;
 287                 if (ref_surface_id != 0 && ref_surface_id != VA_INVALID_SURFACE) {
 288                         slice_obj_surface = SURFACE(ref_surface_id);
 289                 }
 290                 if (slice_obj_surface && slice_obj_surface->bo) {
 291                         obj_surface = slice_obj_surface;
 292                 } else {
 293                         obj_surface = encode_state->reference_objects[0];
 294                 }
 295                 /* reference 0 */
 296                 if (obj_surface && obj_surface->bo)
 297                         gen75_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
 298         }
 299         if (slice_type == SLICE_TYPE_B) {
 300                 /* reference 1 */
 301                 slice_obj_surface = NULL;
 302                 ref_surface_id = slice_param->RefPicList1[0].picture_id;
 303                 if (ref_surface_id != 0 && ref_surface_id != VA_INVALID_SURFACE) {
 304                         slice_obj_surface = SURFACE(ref_surface_id);
 305                 }
 306                 if (slice_obj_surface && slice_obj_surface->bo) {
 307                         obj_surface = slice_obj_surface;
 308                 } else {
 309                         obj_surface = encode_state->reference_objects[0];
 310                 }
 311
 312                 obj_surface = encode_state->reference_objects[1];
 313                 if (obj_surface && obj_surface->bo)
 314                         gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
 315         }
 316     }
 317
 318     /* VME output */
 319     gen75_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context);
 320     gen75_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
 321
 322     return VA_STATUS_SUCCESS;
 323 }
 324
 325 static VAStatus gen75_vme_interface_setup(VADriverContextP ctx,
 326                                           struct encode_state *encode_state,
 327                                           struct intel_encoder_context *encoder_context)
 328 {
 329     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 330     struct gen6_interface_descriptor_data *desc;
 331     int i;
 332     dri_bo *bo;
 333
 334     bo = vme_context->gpe_context.idrt.bo;
 335     dri_bo_map(bo, 1);
 336     assert(bo->virtual);
 337     desc = bo->virtual;
 338
 339     for (i = 0; i < vme_context->vme_kernel_sum; i++) {
 340         struct i965_kernel *kernel;
 341         kernel = &vme_context->gpe_context.kernels[i];
 342         assert(sizeof(*desc) == 32);
 343         /*Setup the descritor table*/
 344         memset(desc, 0, sizeof(*desc));
 345         desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6);
 346         desc->desc2.sampler_count = 0; /* FIXME: */
 347         desc->desc2.sampler_state_pointer = 0;
 348         desc->desc3.binding_table_entry_count = 1; /* FIXME: */
 349         desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5);
 350         desc->desc4.constant_urb_entry_read_offset = 0;
 351         desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH;
 352
 353         /*kernel start*/
 354         dri_bo_emit_reloc(bo,
 355                           I915_GEM_DOMAIN_INSTRUCTION, 0,
 356                           0,
 357                           i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0),
 358                           kernel->bo);
 359         desc++;
 360     }
 361     dri_bo_unmap(bo);
 362
 363     return VA_STATUS_SUCCESS;
 364 }
 365
 366 static VAStatus gen75_vme_constant_setup(VADriverContextP ctx,
 367                                          struct encode_state *encode_state,
 368                                          struct intel_encoder_context *encoder_context)
 369 {
 370     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 371     unsigned char *constant_buffer;
 372     unsigned int *vme_state_message;
 373     int mv_num = 32;
 374
 375     vme_state_message = (unsigned int *)vme_context->vme_state_message;
 376
 377     if (encoder_context->profile == VAProfileH264Baseline ||
 378         encoder_context->profile == VAProfileH264Main ||
 379         encoder_context->profile == VAProfileH264High) {
 380         if (vme_context->h264_level >= 30) {
 381             mv_num = 16;
 382
 383             if (vme_context->h264_level >= 31)
 384                 mv_num = 8;
 385         }
 386     } else if (encoder_context->profile == VAProfileMPEG2Simple ||
 387                encoder_context->profile == VAProfileMPEG2Main) {
 388         mv_num = 2;
 389     }
 390
 391     vme_state_message[31] = mv_num;
 392
 393     dri_bo_map(vme_context->gpe_context.curbe.bo, 1);
 394     assert(vme_context->gpe_context.curbe.bo->virtual);
 395     constant_buffer = vme_context->gpe_context.curbe.bo->virtual;
 396
 397     /* VME MV/Mb cost table is passed by using const buffer */
 398     /* Now it uses the fixed search path. So it is constructed directly
 399      * in the GPU shader.
 400      */
 401     memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128);
 402
 403     dri_bo_unmap(vme_context->gpe_context.curbe.bo);
 404
 405     return VA_STATUS_SUCCESS;
 406 }
 407
 408 static const unsigned int intra_mb_mode_cost_table[] = {
 409     0x31110001, // for qp0
 410     0x09110001, // for qp1
 411     0x15030001, // for qp2
 412     0x0b030001, // for qp3
 413     0x0d030011, // for qp4
 414     0x17210011, // for qp5
 415     0x41210011, // for qp6
 416     0x19210011, // for qp7
 417     0x25050003, // for qp8
 418     0x1b130003, // for qp9
 419     0x1d130003, // for qp10
 420     0x27070021, // for qp11
 421     0x51310021, // for qp12
 422     0x29090021, // for qp13
 423     0x35150005, // for qp14
 424     0x2b0b0013, // for qp15
 425     0x2d0d0013, // for qp16
 426     0x37170007, // for qp17
 427     0x61410031, // for qp18
 428     0x39190009, // for qp19
 429     0x45250015, // for qp20
 430     0x3b1b000b, // for qp21
 431     0x3d1d000d, // for qp22
 432     0x47270017, // for qp23
 433     0x71510041, // for qp24 ! center for qp=0..30
 434     0x49290019, // for qp25
 435     0x55350025, // for qp26
 436     0x4b2b001b, // for qp27
 437     0x4d2d001d, // for qp28
 438     0x57370027, // for qp29
 439     0x81610051, // for qp30
 440     0x57270017, // for qp31
 441     0x81510041, // for qp32 ! center for qp=31..51
 442     0x59290019, // for qp33
 443     0x65350025, // for qp34
 444     0x5b2b001b, // for qp35
 445     0x5d2d001d, // for qp36
 446     0x67370027, // for qp37
 447     0x91610051, // for qp38
 448     0x69390029, // for qp39
 449     0x75450035, // for qp40
 450     0x6b3b002b, // for qp41
 451     0x6d3d002d, // for qp42
 452     0x77470037, // for qp43
 453     0xa1710061, // for qp44
 454     0x79490039, // for qp45
 455     0x85550045, // for qp46
 456     0x7b4b003b, // for qp47
 457     0x7d4d003d, // for qp48
 458     0x87570047, // for qp49
 459     0xb1810071, // for qp50
 460     0x89590049  // for qp51
 461 };
 462
 463 static void gen75_vme_state_setup_fixup(VADriverContextP ctx,
 464                                         struct encode_state *encode_state,
 465                                         struct intel_encoder_context *encoder_context,
 466                                         unsigned int *vme_state_message)
 467 {
 468     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
 469     VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 470     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 471
 472     if (slice_param->slice_type != SLICE_TYPE_I &&
 473         slice_param->slice_type != SLICE_TYPE_SI)
 474         return;
 475     if (encoder_context->rate_control_mode == VA_RC_CQP)
 476         vme_state_message[0] = intra_mb_mode_cost_table[pic_param->pic_init_qp + slice_param->slice_qp_delta];
 477     else
 478         vme_state_message[0] = intra_mb_mode_cost_table[mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY];
 479 }
 480
 481 static VAStatus gen75_vme_vme_state_setup(VADriverContextP ctx,
 482                                           struct encode_state *encode_state,
 483                                           int is_intra,
 484                                           struct intel_encoder_context *encoder_context)
 485 {
 486     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 487     unsigned int *vme_state_message;
 488     int i;
 489
 490     //pass the MV/Mb cost into VME message on HASWell
 491     assert(vme_context->vme_state_message);
 492     vme_state_message = (unsigned int *)vme_context->vme_state_message;
 493
 494     vme_state_message[0] = 0x4a4a4a4a;
 495     vme_state_message[1] = 0x4a4a4a4a;
 496     vme_state_message[2] = 0x4a4a4a4a;
 497     vme_state_message[3] = 0x22120200;
 498     vme_state_message[4] = 0x62524232;
 499
 500     for (i=5; i < 8; i++) {
 501         vme_state_message[i] = 0;
 502     }
 503
 504     switch (encoder_context->profile) {
 505     case VAProfileH264Baseline:
 506     case VAProfileH264Main:
 507     case VAProfileH264High:
 508         gen75_vme_state_setup_fixup(ctx, encode_state, encoder_context, vme_state_message);
 509
 510         break;
 511
 512     default:
 513         /* no fixup */
 514         break;
 515     }
 516
 517     return VA_STATUS_SUCCESS;
 518 }
 519
 520 static void
 521 gen75_vme_fill_vme_batchbuffer(VADriverContextP ctx,
 522                                struct encode_state *encode_state,
 523                                int mb_width, int mb_height,
 524                                int kernel,
 525                                int transform_8x8_mode_flag,
 526                                struct intel_encoder_context *encoder_context)
 527 {
 528     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 529     int mb_x = 0, mb_y = 0;
 530     int i, s;
 531     unsigned int *command_ptr;
 532
 533     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
 534     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
 535
 536     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 537         VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
 538         int slice_mb_begin = pSliceParameter->macroblock_address;
 539         int slice_mb_number = pSliceParameter->num_macroblocks;
 540         unsigned int mb_intra_ub;
 541         int slice_mb_x = pSliceParameter->macroblock_address % mb_width;
 542         for (i = 0; i < slice_mb_number;  ) {
 543             int mb_count = i + slice_mb_begin;
 544             mb_x = mb_count % mb_width;
 545             mb_y = mb_count / mb_width;
 546             mb_intra_ub = 0;
 547             if (mb_x != 0) {
 548                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
 549             }
 550             if (mb_y != 0) {
 551                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
 552                 if (mb_x != 0)
 553                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
 554                 if (mb_x != (mb_width -1))
 555                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 556             }
 557             if (i < mb_width) {
 558                 if (i == 0)
 559                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
 560                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
 561                 if ((i == (mb_width - 1)) && slice_mb_x) {
 562                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 563                 }
 564             }
 565
 566             if ((i == mb_width) && slice_mb_x) {
 567                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
 568             }
 569             *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
 570             *command_ptr++ = kernel;
 571             *command_ptr++ = 0;
 572             *command_ptr++ = 0;
 573             *command_ptr++ = 0;
 574             *command_ptr++ = 0;
 575
 576             /*inline data */
 577             *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
 578             *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
 579
 580             i += 1;
 581         }
 582     }
 583
 584     *command_ptr++ = 0;
 585     *command_ptr++ = MI_BATCH_BUFFER_END;
 586
 587     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
 588 }
 589
 590 static void gen75_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
 591 {
 592     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 593
 594     i965_gpe_context_init(ctx, &vme_context->gpe_context);
 595
 596     /* VME output buffer */
 597     dri_bo_unreference(vme_context->vme_output.bo);
 598     vme_context->vme_output.bo = NULL;
 599
 600     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
 601     vme_context->vme_batchbuffer.bo = NULL;
 602
 603     /* VME state */
 604     dri_bo_unreference(vme_context->vme_state.bo);
 605     vme_context->vme_state.bo = NULL;
 606 }
 607
 608 static void gen75_vme_pipeline_programing(VADriverContextP ctx,
 609                                           struct encode_state *encode_state,
 610                                           struct intel_encoder_context *encoder_context)
 611 {
 612     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 613     struct intel_batchbuffer *batch = encoder_context->base.batch;
 614     VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 615     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 616     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 617     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 618     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 619     int kernel_shader;
 620     bool allow_hwscore = true;
 621     int s;
 622
 623     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 624         pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
 625         if ((pSliceParameter->macroblock_address % width_in_mbs)) {
 626                 allow_hwscore = false;
 627                 break;
 628         }
 629     }
 630     if ((pSliceParameter->slice_type == SLICE_TYPE_I) ||
 631         (pSliceParameter->slice_type == SLICE_TYPE_I)) {
 632         kernel_shader = VME_INTRA_SHADER;
 633    } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) ||
 634         (pSliceParameter->slice_type == SLICE_TYPE_SP)) {
 635         kernel_shader = VME_INTER_SHADER;
 636    } else {
 637         kernel_shader = VME_BINTER_SHADER;
 638         if (!allow_hwscore)
 639              kernel_shader = VME_INTER_SHADER;
 640    }
 641     if (allow_hwscore)
 642         gen7_vme_walker_fill_vme_batchbuffer(ctx,
 643                                   encode_state,
 644                                   width_in_mbs, height_in_mbs,
 645                                   kernel_shader,
 646                                   pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
 647                                   encoder_context);
 648     else
 649         gen75_vme_fill_vme_batchbuffer(ctx,
 650                                    encode_state,
 651                                    width_in_mbs, height_in_mbs,
 652                                    kernel_shader,
 653                                    pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
 654                                    encoder_context);
 655
 656     intel_batchbuffer_start_atomic(batch, 0x1000);
 657     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
 658     BEGIN_BATCH(batch, 2);
 659     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
 660     OUT_RELOC(batch,
 661               vme_context->vme_batchbuffer.bo,
 662               I915_GEM_DOMAIN_COMMAND, 0,
 663               0);
 664     ADVANCE_BATCH(batch);
 665
 666     intel_batchbuffer_end_atomic(batch);
 667 }
 668
 669 static VAStatus gen75_vme_prepare(VADriverContextP ctx,
 670                                   struct encode_state *encode_state,
 671                                   struct intel_encoder_context *encoder_context)
 672 {
 673     VAStatus vaStatus = VA_STATUS_SUCCESS;
 674     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 675     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 676     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 677     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 678
 679     if (!vme_context->h264_level ||
 680         (vme_context->h264_level != pSequenceParameter->level_idc)) {
 681         vme_context->h264_level = pSequenceParameter->level_idc;
 682     }
 683
 684     intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context);
 685
 686     /*Setup all the memory object*/
 687     gen75_vme_surface_setup(ctx, encode_state, is_intra, encoder_context);
 688     gen75_vme_interface_setup(ctx, encode_state, encoder_context);
 689     //gen75_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context);
 690     gen75_vme_constant_setup(ctx, encode_state, encoder_context);
 691
 692     /*Programing media pipeline*/
 693     gen75_vme_pipeline_programing(ctx, encode_state, encoder_context);
 694
 695     return vaStatus;
 696 }
 697
 698 static VAStatus gen75_vme_run(VADriverContextP ctx,
 699                               struct encode_state *encode_state,
 700                               struct intel_encoder_context *encoder_context)
 701 {
 702     struct intel_batchbuffer *batch = encoder_context->base.batch;
 703
 704     intel_batchbuffer_flush(batch);
 705
 706     return VA_STATUS_SUCCESS;
 707 }
 708
 709 static VAStatus gen75_vme_stop(VADriverContextP ctx,
 710                                struct encode_state *encode_state,
 711                                struct intel_encoder_context *encoder_context)
 712 {
 713     return VA_STATUS_SUCCESS;
 714 }
 715
 716 static VAStatus
 717 gen75_vme_pipeline(VADriverContextP ctx,
 718                    VAProfile profile,
 719                    struct encode_state *encode_state,
 720                    struct intel_encoder_context *encoder_context)
 721 {
 722     gen75_vme_media_init(ctx, encoder_context);
 723     gen75_vme_prepare(ctx, encode_state, encoder_context);
 724     gen75_vme_run(ctx, encode_state, encoder_context);
 725     gen75_vme_stop(ctx, encode_state, encoder_context);
 726
 727     return VA_STATUS_SUCCESS;
 728 }
 729
 730 static void
 731 gen75_vme_mpeg2_output_buffer_setup(VADriverContextP ctx,
 732                                     struct encode_state *encode_state,
 733                                     int index,
 734                                     int is_intra,
 735                                     struct intel_encoder_context *encoder_context)
 736
 737 {
 738     struct i965_driver_data *i965 = i965_driver_data(ctx);
 739     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 740     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 741     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 742     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 743
 744     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
 745     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
 746
 747     if (is_intra)
 748         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
 749     else
 750         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
 751     /*
 752      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
 753      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
 754      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
 755      */
 756
 757     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
 758                                               "VME output buffer",
 759                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
 760                                               0x1000);
 761     assert(vme_context->vme_output.bo);
 762     vme_context->vme_buffer_suface_setup(ctx,
 763                                          &vme_context->gpe_context,
 764                                          &vme_context->vme_output,
 765                                          BINDING_TABLE_OFFSET(index),
 766                                          SURFACE_STATE_OFFSET(index));
 767 }
 768
 769 static void
 770 gen75_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx,
 771                                              struct encode_state *encode_state,
 772                                              int index,
 773                                              struct intel_encoder_context *encoder_context)
 774
 775 {
 776     struct i965_driver_data *i965 = i965_driver_data(ctx);
 777     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 778     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 779     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 780     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 781
 782     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
 783     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
 784     vme_context->vme_batchbuffer.pitch = 16;
 785     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
 786                                                    "VME batchbuffer",
 787                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
 788                                                    0x1000);
 789     vme_context->vme_buffer_suface_setup(ctx,
 790                                          &vme_context->gpe_context,
 791                                          &vme_context->vme_batchbuffer,
 792                                          BINDING_TABLE_OFFSET(index),
 793                                          SURFACE_STATE_OFFSET(index));
 794 }
 795
 796 static VAStatus
 797 gen75_vme_mpeg2_surface_setup(VADriverContextP ctx,
 798                               struct encode_state *encode_state,
 799                               int is_intra,
 800                               struct intel_encoder_context *encoder_context)
 801 {
 802     struct object_surface *obj_surface;
 803
 804     /*Setup surfaces state*/
 805     /* current picture for encoding */
 806     obj_surface = encode_state->input_yuv_object;
 807     gen75_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
 808     gen75_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
 809     gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
 810
 811     if (!is_intra) {
 812         /* reference 0 */
 813         obj_surface = encode_state->reference_objects[0];
 814         if (obj_surface->bo != NULL)
 815             gen75_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
 816
 817         /* reference 1 */
 818         obj_surface = encode_state->reference_objects[1];
 819         if (obj_surface && obj_surface->bo != NULL)
 820             gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
 821     }
 822
 823     /* VME output */
 824     gen75_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context);
 825     gen75_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
 826
 827     return VA_STATUS_SUCCESS;
 828 }
 829
 830 static void
 831 gen75_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx,
 832                                      struct encode_state *encode_state,
 833                                      int mb_width, int mb_height,
 834                                      int kernel,
 835                                      int transform_8x8_mode_flag,
 836                                      struct intel_encoder_context *encoder_context)
 837 {
 838     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 839     int mb_x = 0, mb_y = 0;
 840     int i, s, j;
 841     unsigned int *command_ptr;
 842
 843
 844     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
 845     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
 846
 847     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 848         VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer;
 849
 850         for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) {
 851             int slice_mb_begin = slice_param->macroblock_address;
 852             int slice_mb_number = slice_param->num_macroblocks;
 853             unsigned int mb_intra_ub;
 854             int slice_mb_x = slice_param->macroblock_address % mb_width;
 855
 856             for (i = 0; i < slice_mb_number;) {
 857                 int mb_count = i + slice_mb_begin;
 858
 859                 mb_x = mb_count % mb_width;
 860                 mb_y = mb_count / mb_width;
 861                 mb_intra_ub = 0;
 862
 863                 if (mb_x != 0) {
 864                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
 865                 }
 866
 867                 if (mb_y != 0) {
 868                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
 869
 870                     if (mb_x != 0)
 871                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
 872
 873                     if (mb_x != (mb_width -1))
 874                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 875                 }
 876
 877                 if (i < mb_width) {
 878                     if (i == 0)
 879                         mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
 880
 881                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
 882
 883                     if ((i == (mb_width - 1)) && slice_mb_x) {
 884                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 885                     }
 886                 }
 887
 888                 if ((i == mb_width) && slice_mb_x) {
 889                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
 890                 }
 891
 892                 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
 893                 *command_ptr++ = kernel;
 894                 *command_ptr++ = 0;
 895                 *command_ptr++ = 0;
 896                 *command_ptr++ = 0;
 897                 *command_ptr++ = 0;
 898
 899                 /*inline data */
 900                 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
 901                 *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
 902
 903                 i += 1;
 904             }
 905
 906             slice_param++;
 907         }
 908     }
 909
 910     *command_ptr++ = 0;
 911     *command_ptr++ = MI_BATCH_BUFFER_END;
 912
 913     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
 914 }
 915
 916 static void
 917 gen75_vme_mpeg2_pipeline_programing(VADriverContextP ctx,
 918                                     struct encode_state *encode_state,
 919                                     int is_intra,
 920                                     struct intel_encoder_context *encoder_context)
 921 {
 922     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 923     struct intel_batchbuffer *batch = encoder_context->base.batch;
 924     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 925     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 926     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 927
 928     gen75_vme_mpeg2_fill_vme_batchbuffer(ctx,
 929                                          encode_state,
 930                                          width_in_mbs, height_in_mbs,
 931                                          is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER,
 932                                          0,
 933                                          encoder_context);
 934
 935     intel_batchbuffer_start_atomic(batch, 0x1000);
 936     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
 937     BEGIN_BATCH(batch, 2);
 938     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
 939     OUT_RELOC(batch,
 940               vme_context->vme_batchbuffer.bo,
 941               I915_GEM_DOMAIN_COMMAND, 0,
 942               0);
 943     ADVANCE_BATCH(batch);
 944
 945     intel_batchbuffer_end_atomic(batch);
 946 }
 947
 948 static VAStatus
 949 gen75_vme_mpeg2_prepare(VADriverContextP ctx,
 950                         struct encode_state *encode_state,
 951                         struct intel_encoder_context *encoder_context)
 952 {
 953     VAStatus vaStatus = VA_STATUS_SUCCESS;
 954     VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
 955
 956     /*Setup all the memory object*/
 957     gen75_vme_mpeg2_surface_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 958     gen75_vme_interface_setup(ctx, encode_state, encoder_context);
 959     gen75_vme_vme_state_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 960     gen75_vme_constant_setup(ctx, encode_state, encoder_context);
 961
 962     /*Programing media pipeline*/
 963     gen75_vme_mpeg2_pipeline_programing(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 964
 965     return vaStatus;
 966 }
 967
 968 static VAStatus
 969 gen75_vme_mpeg2_pipeline(VADriverContextP ctx,
 970                          VAProfile profile,
 971                          struct encode_state *encode_state,
 972                          struct intel_encoder_context *encoder_context)
 973 {
 974     gen75_vme_media_init(ctx, encoder_context);
 975     gen75_vme_mpeg2_prepare(ctx, encode_state, encoder_context);
 976     gen75_vme_run(ctx, encode_state, encoder_context);
 977     gen75_vme_stop(ctx, encode_state, encoder_context);
 978
 979     return VA_STATUS_SUCCESS;
 980 }
 981
 982 static void
 983 gen75_vme_context_destroy(void *context)
 984 {
 985     struct gen6_vme_context *vme_context = context;
 986
 987     i965_gpe_context_destroy(&vme_context->gpe_context);
 988
 989     dri_bo_unreference(vme_context->vme_output.bo);
 990     vme_context->vme_output.bo = NULL;
 991
 992     dri_bo_unreference(vme_context->vme_state.bo);
 993     vme_context->vme_state.bo = NULL;
 994
 995     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
 996     vme_context->vme_batchbuffer.bo = NULL;
 997
 998     if (vme_context->vme_state_message) {
 999         free(vme_context->vme_state_message);
1000         vme_context->vme_state_message = NULL;
1001     }
1002
1003     free(vme_context);
1004 }
1005
1006 Bool gen75_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
1007 {
1008     struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context));
1009     struct i965_kernel *vme_kernel_list = NULL;
1010         int i965_kernel_num;
1011
1012     switch (encoder_context->profile) {
1013     case VAProfileH264Baseline:
1014     case VAProfileH264Main:
1015     case VAProfileH264High:
1016         vme_kernel_list = gen75_vme_kernels;
1017         encoder_context->vme_pipeline = gen75_vme_pipeline;
1018         i965_kernel_num = sizeof(gen75_vme_kernels) / sizeof(struct i965_kernel);
1019         break;
1020
1021     case VAProfileMPEG2Simple:
1022     case VAProfileMPEG2Main:
1023         vme_kernel_list = gen75_vme_mpeg2_kernels;
1024         encoder_context->vme_pipeline = gen75_vme_mpeg2_pipeline;
1025         i965_kernel_num = sizeof(gen75_vme_mpeg2_kernels) / sizeof(struct i965_kernel);
1026
1027         break;
1028
1029     default:
1030         /* never get here */
1031         assert(0);
1032
1033         break;
1034     }
1035     vme_context->vme_kernel_sum = i965_kernel_num;
1036     vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
1037
1038     vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6;
1039     vme_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data);
1040
1041     vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH;
1042
1043     vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
1044     vme_context->gpe_context.vfe_state.num_urb_entries = 16;
1045     vme_context->gpe_context.vfe_state.gpgpu_mode = 0;
1046     vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1;
1047     vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1;
1048
1049     gen7_vme_scoreboard_init(ctx, vme_context);
1050
1051     i965_gpe_load_kernels(ctx,
1052                           &vme_context->gpe_context,
1053                           vme_kernel_list,
1054                           i965_kernel_num);
1055     vme_context->vme_surface2_setup = gen7_gpe_surface2_setup;
1056     vme_context->vme_media_rw_surface_setup = gen7_gpe_media_rw_surface_setup;
1057     vme_context->vme_buffer_suface_setup = gen7_gpe_buffer_suface_setup;
1058     vme_context->vme_media_chroma_surface_setup = gen75_gpe_media_chroma_surface_setup;
1059
1060     encoder_context->vme_context = vme_context;
1061     encoder_context->vme_context_destroy = gen75_vme_context_destroy;
1062
1063     vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int));
1064
1065     return True;
1066 }