src/gen75_vme.c

   1 /*
   2  * Copyright © 2010-2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Zhao Yakui <yakui.zhao@intel.com>
  26  *    Xiang Haihao <haihao.xiang@intel.com>
  27  *
  28  */
  29
  30 #include "sysdeps.h"
  31
  32 #include "intel_batchbuffer.h"
  33 #include "intel_driver.h"
  34
  35 #include "i965_defines.h"
  36 #include "i965_drv_video.h"
  37 #include "i965_encoder.h"
  38 #include "gen6_vme.h"
  39 #include "gen6_mfc.h"
  40
  41 #define SURFACE_STATE_PADDED_SIZE_0_GEN7        ALIGN(sizeof(struct gen7_surface_state), 32)
  42 #define SURFACE_STATE_PADDED_SIZE_1_GEN7        ALIGN(sizeof(struct gen7_surface_state2), 32)
  43 #define SURFACE_STATE_PADDED_SIZE_GEN7          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN7, SURFACE_STATE_PADDED_SIZE_1_GEN7)
  44
  45 #define SURFACE_STATE_PADDED_SIZE_0_GEN6        ALIGN(sizeof(struct i965_surface_state), 32)
  46 #define SURFACE_STATE_PADDED_SIZE_1_GEN6        ALIGN(sizeof(struct i965_surface_state2), 32)
  47 #define SURFACE_STATE_PADDED_SIZE_GEN6          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN6, SURFACE_STATE_PADDED_SIZE_1_GEN6)
  48
  49 #define SURFACE_STATE_PADDED_SIZE               MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7)
  50 #define SURFACE_STATE_OFFSET(index)             (SURFACE_STATE_PADDED_SIZE * index)
  51 #define BINDING_TABLE_OFFSET(index)             (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index)
  52
  53 #define VME_INTRA_SHADER        0
  54 #define VME_INTER_SHADER        1
  55 #define VME_BINTER_SHADER       3
  56 #define VME_BATCHBUFFER         2
  57
  58 #define CURBE_ALLOCATION_SIZE   37              /* in 256-bit */
  59 #define CURBE_TOTAL_DATA_LENGTH (4 * 32)        /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */
  60 #define CURBE_URB_ENTRY_LENGTH  4               /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */
  61
  62 #define VME_MSG_LENGTH          32
  63
  64 static const uint32_t gen75_vme_intra_frame[][4] = {
  65 #include "shaders/vme/intra_frame_haswell.g75b"
  66 };
  67
  68 static const uint32_t gen75_vme_inter_frame[][4] = {
  69 #include "shaders/vme/inter_frame_haswell.g75b"
  70 };
  71
  72 static const uint32_t gen75_vme_inter_bframe[][4] = {
  73 #include "shaders/vme/inter_bframe_haswell.g75b"
  74 };
  75
  76 static const uint32_t gen75_vme_batchbuffer[][4] = {
  77 #include "shaders/vme/batchbuffer.g75b"
  78 };
  79
  80 static struct i965_kernel gen75_vme_kernels[] = {
  81     {
  82         "VME Intra Frame",
  83         VME_INTRA_SHADER, /*index*/
  84         gen75_vme_intra_frame,
  85         sizeof(gen75_vme_intra_frame),
  86         NULL
  87     },
  88     {
  89         "VME inter Frame",
  90         VME_INTER_SHADER,
  91         gen75_vme_inter_frame,
  92         sizeof(gen75_vme_inter_frame),
  93         NULL
  94     },
  95     {
  96         "VME BATCHBUFFER",
  97         VME_BATCHBUFFER,
  98         gen75_vme_batchbuffer,
  99         sizeof(gen75_vme_batchbuffer),
 100         NULL
 101     },
 102     {
 103         "VME inter BFrame",
 104         VME_BINTER_SHADER,
 105         gen75_vme_inter_bframe,
 106         sizeof(gen75_vme_inter_bframe),
 107         NULL
 108     }
 109 };
 110
 111 static const uint32_t gen75_vme_mpeg2_intra_frame[][4] = {
 112 #include "shaders/vme/intra_frame_haswell.g75b"
 113 };
 114
 115 static const uint32_t gen75_vme_mpeg2_inter_frame[][4] = {
 116 #include "shaders/vme/mpeg2_inter_frame_haswell.g75b"
 117 };
 118
 119 static const uint32_t gen75_vme_mpeg2_batchbuffer[][4] = {
 120 #include "shaders/vme/batchbuffer.g75b"
 121 };
 122
 123 static struct i965_kernel gen75_vme_mpeg2_kernels[] = {
 124     {
 125         "VME Intra Frame",
 126         VME_INTRA_SHADER, /*index*/
 127         gen75_vme_mpeg2_intra_frame,
 128         sizeof(gen75_vme_mpeg2_intra_frame),
 129         NULL
 130     },
 131     {
 132         "VME inter Frame",
 133         VME_INTER_SHADER,
 134         gen75_vme_mpeg2_inter_frame,
 135         sizeof(gen75_vme_mpeg2_inter_frame),
 136         NULL
 137     },
 138     {
 139         "VME BATCHBUFFER",
 140         VME_BATCHBUFFER,
 141         gen75_vme_mpeg2_batchbuffer,
 142         sizeof(gen75_vme_mpeg2_batchbuffer),
 143         NULL
 144     },
 145 };
 146
 147 /* only used for VME source surface state */
 148 static void
 149 gen75_vme_source_surface_state(VADriverContextP ctx,
 150                                int index,
 151                                struct object_surface *obj_surface,
 152                                struct intel_encoder_context *encoder_context)
 153 {
 154     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 155
 156     vme_context->vme_surface2_setup(ctx,
 157                                     &vme_context->gpe_context,
 158                                     obj_surface,
 159                                     BINDING_TABLE_OFFSET(index),
 160                                     SURFACE_STATE_OFFSET(index));
 161 }
 162
 163 static void
 164 gen75_vme_media_source_surface_state(VADriverContextP ctx,
 165                                      int index,
 166                                      struct object_surface *obj_surface,
 167                                      struct intel_encoder_context *encoder_context)
 168 {
 169     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 170
 171     vme_context->vme_media_rw_surface_setup(ctx,
 172                                             &vme_context->gpe_context,
 173                                             obj_surface,
 174                                             BINDING_TABLE_OFFSET(index),
 175                                             SURFACE_STATE_OFFSET(index));
 176 }
 177
 178 static void
 179 gen75_vme_media_chroma_source_surface_state(VADriverContextP ctx,
 180                                             int index,
 181                                             struct object_surface *obj_surface,
 182                                             struct intel_encoder_context *encoder_context)
 183 {
 184     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 185
 186     vme_context->vme_media_chroma_surface_setup(ctx,
 187                                                 &vme_context->gpe_context,
 188                                                 obj_surface,
 189                                                 BINDING_TABLE_OFFSET(index),
 190                                                 SURFACE_STATE_OFFSET(index));
 191 }
 192
 193 static void
 194 gen75_vme_output_buffer_setup(VADriverContextP ctx,
 195                               struct encode_state *encode_state,
 196                               int index,
 197                               struct intel_encoder_context *encoder_context)
 198
 199 {
 200     struct i965_driver_data *i965 = i965_driver_data(ctx);
 201     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 202     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 203     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 204     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 205     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 206     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 207
 208     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
 209     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
 210
 211     if (is_intra)
 212         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
 213     else
 214         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
 215     /*
 216      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
 217      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
 218      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
 219      */
 220
 221     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
 222                                               "VME output buffer",
 223                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
 224                                               0x1000);
 225     assert(vme_context->vme_output.bo);
 226     vme_context->vme_buffer_suface_setup(ctx,
 227                                          &vme_context->gpe_context,
 228                                          &vme_context->vme_output,
 229                                          BINDING_TABLE_OFFSET(index),
 230                                          SURFACE_STATE_OFFSET(index));
 231 }
 232
 233 static void
 234 gen75_vme_output_vme_batchbuffer_setup(VADriverContextP ctx,
 235                                        struct encode_state *encode_state,
 236                                        int index,
 237                                        struct intel_encoder_context *encoder_context)
 238
 239 {
 240     struct i965_driver_data *i965 = i965_driver_data(ctx);
 241     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 242     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 243     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 244     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 245
 246     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
 247     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
 248     vme_context->vme_batchbuffer.pitch = 16;
 249     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
 250                                                    "VME batchbuffer",
 251                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
 252                                                    0x1000);
 253     vme_context->vme_buffer_suface_setup(ctx,
 254                                          &vme_context->gpe_context,
 255                                          &vme_context->vme_batchbuffer,
 256                                          BINDING_TABLE_OFFSET(index),
 257                                          SURFACE_STATE_OFFSET(index));
 258 }
 259
 260 static VAStatus
 261 gen75_vme_surface_setup(VADriverContextP ctx,
 262                         struct encode_state *encode_state,
 263                         int is_intra,
 264                         struct intel_encoder_context *encoder_context)
 265 {
 266     struct object_surface *obj_surface;
 267
 268     /*Setup surfaces state*/
 269     /* current picture for encoding */
 270     obj_surface = encode_state->input_yuv_object;
 271     gen75_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
 272     gen75_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
 273     gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
 274
 275     if (!is_intra) {
 276         /* reference 0 */
 277         obj_surface = encode_state->reference_objects[0];
 278
 279         if (obj_surface && obj_surface->bo)
 280             gen75_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
 281
 282         /* reference 1 */
 283         obj_surface = encode_state->reference_objects[1];
 284
 285         if (obj_surface && obj_surface->bo)
 286             gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
 287     }
 288
 289     /* VME output */
 290     gen75_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context);
 291     gen75_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
 292
 293     return VA_STATUS_SUCCESS;
 294 }
 295
 296 static VAStatus gen75_vme_interface_setup(VADriverContextP ctx,
 297                                           struct encode_state *encode_state,
 298                                           struct intel_encoder_context *encoder_context)
 299 {
 300     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 301     struct gen6_interface_descriptor_data *desc;
 302     int i;
 303     dri_bo *bo;
 304
 305     bo = vme_context->gpe_context.idrt.bo;
 306     dri_bo_map(bo, 1);
 307     assert(bo->virtual);
 308     desc = bo->virtual;
 309
 310     for (i = 0; i < vme_context->vme_kernel_sum; i++) {
 311         struct i965_kernel *kernel;
 312         kernel = &vme_context->gpe_context.kernels[i];
 313         assert(sizeof(*desc) == 32);
 314         /*Setup the descritor table*/
 315         memset(desc, 0, sizeof(*desc));
 316         desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6);
 317         desc->desc2.sampler_count = 0; /* FIXME: */
 318         desc->desc2.sampler_state_pointer = 0;
 319         desc->desc3.binding_table_entry_count = 1; /* FIXME: */
 320         desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5);
 321         desc->desc4.constant_urb_entry_read_offset = 0;
 322         desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH;
 323
 324         /*kernel start*/
 325         dri_bo_emit_reloc(bo,
 326                           I915_GEM_DOMAIN_INSTRUCTION, 0,
 327                           0,
 328                           i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0),
 329                           kernel->bo);
 330         desc++;
 331     }
 332     dri_bo_unmap(bo);
 333
 334     return VA_STATUS_SUCCESS;
 335 }
 336
 337 static VAStatus gen75_vme_constant_setup(VADriverContextP ctx,
 338                                          struct encode_state *encode_state,
 339                                          struct intel_encoder_context *encoder_context)
 340 {
 341     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 342     unsigned char *constant_buffer;
 343     unsigned int *vme_state_message;
 344     int mv_num = 32;
 345
 346     vme_state_message = (unsigned int *)vme_context->vme_state_message;
 347
 348     if (encoder_context->profile == VAProfileH264Baseline ||
 349         encoder_context->profile == VAProfileH264Main ||
 350         encoder_context->profile == VAProfileH264High) {
 351         if (vme_context->h264_level >= 30) {
 352             mv_num = 16;
 353
 354             if (vme_context->h264_level >= 31)
 355                 mv_num = 8;
 356         }
 357     } else if (encoder_context->profile == VAProfileMPEG2Simple ||
 358                encoder_context->profile == VAProfileMPEG2Main) {
 359         mv_num = 2;
 360     }
 361
 362     vme_state_message[31] = mv_num;
 363
 364     dri_bo_map(vme_context->gpe_context.curbe.bo, 1);
 365     assert(vme_context->gpe_context.curbe.bo->virtual);
 366     constant_buffer = vme_context->gpe_context.curbe.bo->virtual;
 367
 368     /* VME MV/Mb cost table is passed by using const buffer */
 369     /* Now it uses the fixed search path. So it is constructed directly
 370      * in the GPU shader.
 371      */
 372     memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128);
 373
 374     dri_bo_unmap(vme_context->gpe_context.curbe.bo);
 375
 376     return VA_STATUS_SUCCESS;
 377 }
 378
 379 static const unsigned int intra_mb_mode_cost_table[] = {
 380     0x31110001, // for qp0
 381     0x09110001, // for qp1
 382     0x15030001, // for qp2
 383     0x0b030001, // for qp3
 384     0x0d030011, // for qp4
 385     0x17210011, // for qp5
 386     0x41210011, // for qp6
 387     0x19210011, // for qp7
 388     0x25050003, // for qp8
 389     0x1b130003, // for qp9
 390     0x1d130003, // for qp10
 391     0x27070021, // for qp11
 392     0x51310021, // for qp12
 393     0x29090021, // for qp13
 394     0x35150005, // for qp14
 395     0x2b0b0013, // for qp15
 396     0x2d0d0013, // for qp16
 397     0x37170007, // for qp17
 398     0x61410031, // for qp18
 399     0x39190009, // for qp19
 400     0x45250015, // for qp20
 401     0x3b1b000b, // for qp21
 402     0x3d1d000d, // for qp22
 403     0x47270017, // for qp23
 404     0x71510041, // for qp24 ! center for qp=0..30
 405     0x49290019, // for qp25
 406     0x55350025, // for qp26
 407     0x4b2b001b, // for qp27
 408     0x4d2d001d, // for qp28
 409     0x57370027, // for qp29
 410     0x81610051, // for qp30
 411     0x57270017, // for qp31
 412     0x81510041, // for qp32 ! center for qp=31..51
 413     0x59290019, // for qp33
 414     0x65350025, // for qp34
 415     0x5b2b001b, // for qp35
 416     0x5d2d001d, // for qp36
 417     0x67370027, // for qp37
 418     0x91610051, // for qp38
 419     0x69390029, // for qp39
 420     0x75450035, // for qp40
 421     0x6b3b002b, // for qp41
 422     0x6d3d002d, // for qp42
 423     0x77470037, // for qp43
 424     0xa1710061, // for qp44
 425     0x79490039, // for qp45
 426     0x85550045, // for qp46
 427     0x7b4b003b, // for qp47
 428     0x7d4d003d, // for qp48
 429     0x87570047, // for qp49
 430     0xb1810071, // for qp50
 431     0x89590049  // for qp51
 432 };
 433
 434 static void gen75_vme_state_setup_fixup(VADriverContextP ctx,
 435                                         struct encode_state *encode_state,
 436                                         struct intel_encoder_context *encoder_context,
 437                                         unsigned int *vme_state_message)
 438 {
 439     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
 440     VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 441     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 442
 443     if (slice_param->slice_type != SLICE_TYPE_I &&
 444         slice_param->slice_type != SLICE_TYPE_SI)
 445         return;
 446     if (encoder_context->rate_control_mode == VA_RC_CQP)
 447         vme_state_message[0] = intra_mb_mode_cost_table[pic_param->pic_init_qp + slice_param->slice_qp_delta];
 448     else
 449         vme_state_message[0] = intra_mb_mode_cost_table[mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY];
 450 }
 451
 452 static VAStatus gen75_vme_vme_state_setup(VADriverContextP ctx,
 453                                           struct encode_state *encode_state,
 454                                           int is_intra,
 455                                           struct intel_encoder_context *encoder_context)
 456 {
 457     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 458     unsigned int *vme_state_message;
 459     int i;
 460
 461     //pass the MV/Mb cost into VME message on HASWell
 462     assert(vme_context->vme_state_message);
 463     vme_state_message = (unsigned int *)vme_context->vme_state_message;
 464
 465     vme_state_message[0] = 0x4a4a4a4a;
 466     vme_state_message[1] = 0x4a4a4a4a;
 467     vme_state_message[2] = 0x4a4a4a4a;
 468     vme_state_message[3] = 0x22120200;
 469     vme_state_message[4] = 0x62524232;
 470
 471     for (i=5; i < 8; i++) {
 472         vme_state_message[i] = 0;
 473     }
 474
 475     switch (encoder_context->profile) {
 476     case VAProfileH264Baseline:
 477     case VAProfileH264Main:
 478     case VAProfileH264High:
 479         gen75_vme_state_setup_fixup(ctx, encode_state, encoder_context, vme_state_message);
 480
 481         break;
 482
 483     default:
 484         /* no fixup */
 485         break;
 486     }
 487
 488     return VA_STATUS_SUCCESS;
 489 }
 490
 491 static void
 492 gen75_vme_fill_vme_batchbuffer(VADriverContextP ctx,
 493                                struct encode_state *encode_state,
 494                                int mb_width, int mb_height,
 495                                int kernel,
 496                                int transform_8x8_mode_flag,
 497                                struct intel_encoder_context *encoder_context)
 498 {
 499     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 500     int mb_x = 0, mb_y = 0;
 501     int i, s;
 502     unsigned int *command_ptr;
 503
 504     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
 505     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
 506
 507     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 508         VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
 509         int slice_mb_begin = pSliceParameter->macroblock_address;
 510         int slice_mb_number = pSliceParameter->num_macroblocks;
 511         unsigned int mb_intra_ub;
 512         int slice_mb_x = pSliceParameter->macroblock_address % mb_width;
 513         for (i = 0; i < slice_mb_number;  ) {
 514             int mb_count = i + slice_mb_begin;
 515             mb_x = mb_count % mb_width;
 516             mb_y = mb_count / mb_width;
 517             mb_intra_ub = 0;
 518             if (mb_x != 0) {
 519                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
 520             }
 521             if (mb_y != 0) {
 522                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
 523                 if (mb_x != 0)
 524                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
 525                 if (mb_x != (mb_width -1))
 526                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 527             }
 528             if (i < mb_width) {
 529                 if (i == 0)
 530                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
 531                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
 532                 if ((i == (mb_width - 1)) && slice_mb_x) {
 533                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 534                 }
 535             }
 536
 537             if ((i == mb_width) && slice_mb_x) {
 538                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
 539             }
 540             *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
 541             *command_ptr++ = kernel;
 542             *command_ptr++ = 0;
 543             *command_ptr++ = 0;
 544             *command_ptr++ = 0;
 545             *command_ptr++ = 0;
 546
 547             /*inline data */
 548             *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
 549             *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
 550
 551             i += 1;
 552         }
 553     }
 554
 555     *command_ptr++ = 0;
 556     *command_ptr++ = MI_BATCH_BUFFER_END;
 557
 558     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
 559 }
 560
 561 static void gen75_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
 562 {
 563     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 564
 565     i965_gpe_context_init(ctx, &vme_context->gpe_context);
 566
 567     /* VME output buffer */
 568     dri_bo_unreference(vme_context->vme_output.bo);
 569     vme_context->vme_output.bo = NULL;
 570
 571     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
 572     vme_context->vme_batchbuffer.bo = NULL;
 573
 574     /* VME state */
 575     dri_bo_unreference(vme_context->vme_state.bo);
 576     vme_context->vme_state.bo = NULL;
 577 }
 578
 579 static void gen75_vme_pipeline_programing(VADriverContextP ctx,
 580                                           struct encode_state *encode_state,
 581                                           struct intel_encoder_context *encoder_context)
 582 {
 583     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 584     struct intel_batchbuffer *batch = encoder_context->base.batch;
 585     VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 586     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 587     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 588     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 589     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 590     int kernel_shader;
 591     bool allow_hwscore = true;
 592     int s;
 593
 594     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 595         pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
 596         if ((pSliceParameter->macroblock_address % width_in_mbs)) {
 597                 allow_hwscore = false;
 598                 break;
 599         }
 600     }
 601     if ((pSliceParameter->slice_type == SLICE_TYPE_I) ||
 602         (pSliceParameter->slice_type == SLICE_TYPE_I)) {
 603         kernel_shader = VME_INTRA_SHADER;
 604    } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) ||
 605         (pSliceParameter->slice_type == SLICE_TYPE_SP)) {
 606         kernel_shader = VME_INTER_SHADER;
 607    } else {
 608         kernel_shader = VME_BINTER_SHADER;
 609         if (!allow_hwscore)
 610              kernel_shader = VME_INTER_SHADER;
 611    }
 612     if (allow_hwscore)
 613         gen7_vme_walker_fill_vme_batchbuffer(ctx,
 614                                   encode_state,
 615                                   width_in_mbs, height_in_mbs,
 616                                   kernel_shader,
 617                                   pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
 618                                   encoder_context);
 619     else
 620         gen75_vme_fill_vme_batchbuffer(ctx,
 621                                    encode_state,
 622                                    width_in_mbs, height_in_mbs,
 623                                    kernel_shader,
 624                                    pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
 625                                    encoder_context);
 626
 627     intel_batchbuffer_start_atomic(batch, 0x1000);
 628     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
 629     BEGIN_BATCH(batch, 2);
 630     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
 631     OUT_RELOC(batch,
 632               vme_context->vme_batchbuffer.bo,
 633               I915_GEM_DOMAIN_COMMAND, 0,
 634               0);
 635     ADVANCE_BATCH(batch);
 636
 637     intel_batchbuffer_end_atomic(batch);
 638 }
 639
 640 static VAStatus gen75_vme_prepare(VADriverContextP ctx,
 641                                   struct encode_state *encode_state,
 642                                   struct intel_encoder_context *encoder_context)
 643 {
 644     VAStatus vaStatus = VA_STATUS_SUCCESS;
 645     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 646     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 647     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 648     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 649
 650     if (!vme_context->h264_level ||
 651         (vme_context->h264_level != pSequenceParameter->level_idc)) {
 652         vme_context->h264_level = pSequenceParameter->level_idc;
 653     }
 654
 655     intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context);
 656
 657     /*Setup all the memory object*/
 658     gen75_vme_surface_setup(ctx, encode_state, is_intra, encoder_context);
 659     gen75_vme_interface_setup(ctx, encode_state, encoder_context);
 660     //gen75_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context);
 661     gen75_vme_constant_setup(ctx, encode_state, encoder_context);
 662
 663     /*Programing media pipeline*/
 664     gen75_vme_pipeline_programing(ctx, encode_state, encoder_context);
 665
 666     return vaStatus;
 667 }
 668
 669 static VAStatus gen75_vme_run(VADriverContextP ctx,
 670                               struct encode_state *encode_state,
 671                               struct intel_encoder_context *encoder_context)
 672 {
 673     struct intel_batchbuffer *batch = encoder_context->base.batch;
 674
 675     intel_batchbuffer_flush(batch);
 676
 677     return VA_STATUS_SUCCESS;
 678 }
 679
 680 static VAStatus gen75_vme_stop(VADriverContextP ctx,
 681                                struct encode_state *encode_state,
 682                                struct intel_encoder_context *encoder_context)
 683 {
 684     return VA_STATUS_SUCCESS;
 685 }
 686
 687 static VAStatus
 688 gen75_vme_pipeline(VADriverContextP ctx,
 689                    VAProfile profile,
 690                    struct encode_state *encode_state,
 691                    struct intel_encoder_context *encoder_context)
 692 {
 693     gen75_vme_media_init(ctx, encoder_context);
 694     gen75_vme_prepare(ctx, encode_state, encoder_context);
 695     gen75_vme_run(ctx, encode_state, encoder_context);
 696     gen75_vme_stop(ctx, encode_state, encoder_context);
 697
 698     return VA_STATUS_SUCCESS;
 699 }
 700
 701 static void
 702 gen75_vme_mpeg2_output_buffer_setup(VADriverContextP ctx,
 703                                     struct encode_state *encode_state,
 704                                     int index,
 705                                     int is_intra,
 706                                     struct intel_encoder_context *encoder_context)
 707
 708 {
 709     struct i965_driver_data *i965 = i965_driver_data(ctx);
 710     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 711     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 712     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 713     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 714
 715     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
 716     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
 717
 718     if (is_intra)
 719         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
 720     else
 721         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
 722     /*
 723      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
 724      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
 725      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
 726      */
 727
 728     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
 729                                               "VME output buffer",
 730                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
 731                                               0x1000);
 732     assert(vme_context->vme_output.bo);
 733     vme_context->vme_buffer_suface_setup(ctx,
 734                                          &vme_context->gpe_context,
 735                                          &vme_context->vme_output,
 736                                          BINDING_TABLE_OFFSET(index),
 737                                          SURFACE_STATE_OFFSET(index));
 738 }
 739
 740 static void
 741 gen75_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx,
 742                                              struct encode_state *encode_state,
 743                                              int index,
 744                                              struct intel_encoder_context *encoder_context)
 745
 746 {
 747     struct i965_driver_data *i965 = i965_driver_data(ctx);
 748     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 749     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 750     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 751     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 752
 753     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
 754     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
 755     vme_context->vme_batchbuffer.pitch = 16;
 756     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
 757                                                    "VME batchbuffer",
 758                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
 759                                                    0x1000);
 760     vme_context->vme_buffer_suface_setup(ctx,
 761                                          &vme_context->gpe_context,
 762                                          &vme_context->vme_batchbuffer,
 763                                          BINDING_TABLE_OFFSET(index),
 764                                          SURFACE_STATE_OFFSET(index));
 765 }
 766
 767 static VAStatus
 768 gen75_vme_mpeg2_surface_setup(VADriverContextP ctx,
 769                               struct encode_state *encode_state,
 770                               int is_intra,
 771                               struct intel_encoder_context *encoder_context)
 772 {
 773     struct object_surface *obj_surface;
 774
 775     /*Setup surfaces state*/
 776     /* current picture for encoding */
 777     obj_surface = encode_state->input_yuv_object;
 778     gen75_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
 779     gen75_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
 780     gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
 781
 782     if (!is_intra) {
 783         /* reference 0 */
 784         obj_surface = encode_state->reference_objects[0];
 785         if (obj_surface->bo != NULL)
 786             gen75_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
 787
 788         /* reference 1 */
 789         obj_surface = encode_state->reference_objects[1];
 790         if (obj_surface && obj_surface->bo != NULL)
 791             gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
 792     }
 793
 794     /* VME output */
 795     gen75_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context);
 796     gen75_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
 797
 798     return VA_STATUS_SUCCESS;
 799 }
 800
 801 static void
 802 gen75_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx,
 803                                      struct encode_state *encode_state,
 804                                      int mb_width, int mb_height,
 805                                      int kernel,
 806                                      int transform_8x8_mode_flag,
 807                                      struct intel_encoder_context *encoder_context)
 808 {
 809     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 810     int mb_x = 0, mb_y = 0;
 811     int i, s, j;
 812     unsigned int *command_ptr;
 813
 814
 815     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
 816     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
 817
 818     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 819         VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer;
 820
 821         for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) {
 822             int slice_mb_begin = slice_param->macroblock_address;
 823             int slice_mb_number = slice_param->num_macroblocks;
 824             unsigned int mb_intra_ub;
 825             int slice_mb_x = slice_param->macroblock_address % mb_width;
 826
 827             for (i = 0; i < slice_mb_number;) {
 828                 int mb_count = i + slice_mb_begin;
 829
 830                 mb_x = mb_count % mb_width;
 831                 mb_y = mb_count / mb_width;
 832                 mb_intra_ub = 0;
 833
 834                 if (mb_x != 0) {
 835                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
 836                 }
 837
 838                 if (mb_y != 0) {
 839                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
 840
 841                     if (mb_x != 0)
 842                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
 843
 844                     if (mb_x != (mb_width -1))
 845                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 846                 }
 847
 848                 if (i < mb_width) {
 849                     if (i == 0)
 850                         mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
 851
 852                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
 853
 854                     if ((i == (mb_width - 1)) && slice_mb_x) {
 855                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 856                     }
 857                 }
 858
 859                 if ((i == mb_width) && slice_mb_x) {
 860                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
 861                 }
 862
 863                 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
 864                 *command_ptr++ = kernel;
 865                 *command_ptr++ = 0;
 866                 *command_ptr++ = 0;
 867                 *command_ptr++ = 0;
 868                 *command_ptr++ = 0;
 869
 870                 /*inline data */
 871                 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
 872                 *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
 873
 874                 i += 1;
 875             }
 876
 877             slice_param++;
 878         }
 879     }
 880
 881     *command_ptr++ = 0;
 882     *command_ptr++ = MI_BATCH_BUFFER_END;
 883
 884     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
 885 }
 886
 887 static void
 888 gen75_vme_mpeg2_pipeline_programing(VADriverContextP ctx,
 889                                     struct encode_state *encode_state,
 890                                     int is_intra,
 891                                     struct intel_encoder_context *encoder_context)
 892 {
 893     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 894     struct intel_batchbuffer *batch = encoder_context->base.batch;
 895     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 896     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 897     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 898
 899     gen75_vme_mpeg2_fill_vme_batchbuffer(ctx,
 900                                          encode_state,
 901                                          width_in_mbs, height_in_mbs,
 902                                          is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER,
 903                                          0,
 904                                          encoder_context);
 905
 906     intel_batchbuffer_start_atomic(batch, 0x1000);
 907     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
 908     BEGIN_BATCH(batch, 2);
 909     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
 910     OUT_RELOC(batch,
 911               vme_context->vme_batchbuffer.bo,
 912               I915_GEM_DOMAIN_COMMAND, 0,
 913               0);
 914     ADVANCE_BATCH(batch);
 915
 916     intel_batchbuffer_end_atomic(batch);
 917 }
 918
 919 static VAStatus
 920 gen75_vme_mpeg2_prepare(VADriverContextP ctx,
 921                         struct encode_state *encode_state,
 922                         struct intel_encoder_context *encoder_context)
 923 {
 924     VAStatus vaStatus = VA_STATUS_SUCCESS;
 925     VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
 926
 927     /*Setup all the memory object*/
 928     gen75_vme_mpeg2_surface_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 929     gen75_vme_interface_setup(ctx, encode_state, encoder_context);
 930     gen75_vme_vme_state_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 931     gen75_vme_constant_setup(ctx, encode_state, encoder_context);
 932
 933     /*Programing media pipeline*/
 934     gen75_vme_mpeg2_pipeline_programing(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 935
 936     return vaStatus;
 937 }
 938
 939 static VAStatus
 940 gen75_vme_mpeg2_pipeline(VADriverContextP ctx,
 941                          VAProfile profile,
 942                          struct encode_state *encode_state,
 943                          struct intel_encoder_context *encoder_context)
 944 {
 945     gen75_vme_media_init(ctx, encoder_context);
 946     gen75_vme_mpeg2_prepare(ctx, encode_state, encoder_context);
 947     gen75_vme_run(ctx, encode_state, encoder_context);
 948     gen75_vme_stop(ctx, encode_state, encoder_context);
 949
 950     return VA_STATUS_SUCCESS;
 951 }
 952
 953 static void
 954 gen75_vme_context_destroy(void *context)
 955 {
 956     struct gen6_vme_context *vme_context = context;
 957
 958     i965_gpe_context_destroy(&vme_context->gpe_context);
 959
 960     dri_bo_unreference(vme_context->vme_output.bo);
 961     vme_context->vme_output.bo = NULL;
 962
 963     dri_bo_unreference(vme_context->vme_state.bo);
 964     vme_context->vme_state.bo = NULL;
 965
 966     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
 967     vme_context->vme_batchbuffer.bo = NULL;
 968
 969     if (vme_context->vme_state_message) {
 970         free(vme_context->vme_state_message);
 971         vme_context->vme_state_message = NULL;
 972     }
 973
 974     free(vme_context);
 975 }
 976
 977 Bool gen75_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
 978 {
 979     struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context));
 980     struct i965_kernel *vme_kernel_list = NULL;
 981         int i965_kernel_num;
 982
 983     switch (encoder_context->profile) {
 984     case VAProfileH264Baseline:
 985     case VAProfileH264Main:
 986     case VAProfileH264High:
 987         vme_kernel_list = gen75_vme_kernels;
 988         encoder_context->vme_pipeline = gen75_vme_pipeline;
 989         i965_kernel_num = sizeof(gen75_vme_kernels) / sizeof(struct i965_kernel);
 990         break;
 991
 992     case VAProfileMPEG2Simple:
 993     case VAProfileMPEG2Main:
 994         vme_kernel_list = gen75_vme_mpeg2_kernels;
 995         encoder_context->vme_pipeline = gen75_vme_mpeg2_pipeline;
 996         i965_kernel_num = sizeof(gen75_vme_mpeg2_kernels) / sizeof(struct i965_kernel);
 997
 998         break;
 999
1000     default:
1001         /* never get here */
1002         assert(0);
1003
1004         break;
1005     }
1006     vme_context->vme_kernel_sum = i965_kernel_num;
1007     vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
1008
1009     vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6;
1010     vme_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data);
1011
1012     vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH;
1013
1014     vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
1015     vme_context->gpe_context.vfe_state.num_urb_entries = 16;
1016     vme_context->gpe_context.vfe_state.gpgpu_mode = 0;
1017     vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1;
1018     vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1;
1019
1020     gen7_vme_scoreboard_init(ctx, vme_context);
1021
1022     i965_gpe_load_kernels(ctx,
1023                           &vme_context->gpe_context,
1024                           vme_kernel_list,
1025                           i965_kernel_num);
1026     vme_context->vme_surface2_setup = gen7_gpe_surface2_setup;
1027     vme_context->vme_media_rw_surface_setup = gen7_gpe_media_rw_surface_setup;
1028     vme_context->vme_buffer_suface_setup = gen7_gpe_buffer_suface_setup;
1029     vme_context->vme_media_chroma_surface_setup = gen75_gpe_media_chroma_surface_setup;
1030
1031     encoder_context->vme_context = vme_context;
1032     encoder_context->vme_context_destroy = gen75_vme_context_destroy;
1033
1034     vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int));
1035
1036     return True;
1037 }