src/gen75_vme.c

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Zhao Yakui <yakui.zhao@intel.com>
  26  *    Xiang Haihao <haihao.xiang@intel.com>
  27  */
  28
  29 #include <stdio.h>
  30 #include <stdlib.h>
  31 #include <stdbool.h>
  32 #include <string.h>
  33 #include <assert.h>
  34
  35 #include "intel_batchbuffer.h"
  36 #include "intel_driver.h"
  37
  38 #include "i965_defines.h"
  39 #include "i965_drv_video.h"
  40 #include "i965_encoder.h"
  41 #include "gen6_vme.h"
  42 #include "gen6_mfc.h"
  43
  44 #define SURFACE_STATE_PADDED_SIZE_0_GEN7        ALIGN(sizeof(struct gen7_surface_state), 32)
  45 #define SURFACE_STATE_PADDED_SIZE_1_GEN7        ALIGN(sizeof(struct gen7_surface_state2), 32)
  46 #define SURFACE_STATE_PADDED_SIZE_GEN7          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN7, SURFACE_STATE_PADDED_SIZE_1_GEN7)
  47
  48 #define SURFACE_STATE_PADDED_SIZE_0_GEN6        ALIGN(sizeof(struct i965_surface_state), 32)
  49 #define SURFACE_STATE_PADDED_SIZE_1_GEN6        ALIGN(sizeof(struct i965_surface_state2), 32)
  50 #define SURFACE_STATE_PADDED_SIZE_GEN6          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN6, SURFACE_STATE_PADDED_SIZE_1_GEN6)
  51
  52 #define SURFACE_STATE_PADDED_SIZE               MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7)
  53 #define SURFACE_STATE_OFFSET(index)             (SURFACE_STATE_PADDED_SIZE * index)
  54 #define BINDING_TABLE_OFFSET(index)             (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index)
  55
  56 #define VME_INTRA_SHADER        0
  57 #define VME_INTER_SHADER        1
  58 #define VME_BATCHBUFFER         2
  59
  60 #define CURBE_ALLOCATION_SIZE   37              /* in 256-bit */
  61 #define CURBE_TOTAL_DATA_LENGTH (4 * 32)        /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */
  62 #define CURBE_URB_ENTRY_LENGTH  4               /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */
  63
  64 #define VME_MSG_LENGTH          32
  65
  66 #define         MB_SCOREBOARD_A         (1 << 0)
  67 #define         MB_SCOREBOARD_B         (1 << 1)
  68 #define         MB_SCOREBOARD_C         (1 << 2)
  69
  70 static const uint32_t gen75_vme_intra_frame[][4] = {
  71 #include "shaders/vme/intra_frame_haswell.g75b"
  72 };
  73
  74 static const uint32_t gen75_vme_inter_frame[][4] = {
  75 #include "shaders/vme/inter_frame_haswell.g75b"
  76 };
  77
  78 static const uint32_t gen75_vme_batchbuffer[][4] = {
  79 #include "shaders/vme/batchbuffer.g75b"
  80 };
  81
  82 static struct i965_kernel gen75_vme_kernels[] = {
  83     {
  84         "VME Intra Frame",
  85         VME_INTRA_SHADER, /*index*/
  86         gen75_vme_intra_frame,
  87         sizeof(gen75_vme_intra_frame),
  88         NULL
  89     },
  90     {
  91         "VME inter Frame",
  92         VME_INTER_SHADER,
  93         gen75_vme_inter_frame,
  94         sizeof(gen75_vme_inter_frame),
  95         NULL
  96     },
  97     {
  98         "VME BATCHBUFFER",
  99         VME_BATCHBUFFER,
 100         gen75_vme_batchbuffer,
 101         sizeof(gen75_vme_batchbuffer),
 102         NULL
 103     },
 104 };
 105
 106 static const uint32_t gen75_vme_mpeg2_intra_frame[][4] = {
 107 #include "shaders/vme/intra_frame_haswell.g75b"
 108 };
 109
 110 static const uint32_t gen75_vme_mpeg2_inter_frame[][4] = {
 111 #include "shaders/vme/mpeg2_inter_frame_haswell.g75b"
 112 };
 113
 114 static const uint32_t gen75_vme_mpeg2_batchbuffer[][4] = {
 115 #include "shaders/vme/batchbuffer.g75b"
 116 };
 117
 118 static struct i965_kernel gen75_vme_mpeg2_kernels[] = {
 119     {
 120         "VME Intra Frame",
 121         VME_INTRA_SHADER, /*index*/
 122         gen75_vme_mpeg2_intra_frame,
 123         sizeof(gen75_vme_mpeg2_intra_frame),
 124         NULL
 125     },
 126     {
 127         "VME inter Frame",
 128         VME_INTER_SHADER,
 129         gen75_vme_mpeg2_inter_frame,
 130         sizeof(gen75_vme_mpeg2_inter_frame),
 131         NULL
 132     },
 133     {
 134         "VME BATCHBUFFER",
 135         VME_BATCHBUFFER,
 136         gen75_vme_mpeg2_batchbuffer,
 137         sizeof(gen75_vme_mpeg2_batchbuffer),
 138         NULL
 139     },
 140 };
 141
 142 /* only used for VME source surface state */
 143 static void
 144 gen75_vme_source_surface_state(VADriverContextP ctx,
 145                                int index,
 146                                struct object_surface *obj_surface,
 147                                struct intel_encoder_context *encoder_context)
 148 {
 149     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 150
 151     vme_context->vme_surface2_setup(ctx,
 152                                     &vme_context->gpe_context,
 153                                     obj_surface,
 154                                     BINDING_TABLE_OFFSET(index),
 155                                     SURFACE_STATE_OFFSET(index));
 156 }
 157
 158 static void
 159 gen75_vme_media_source_surface_state(VADriverContextP ctx,
 160                                      int index,
 161                                      struct object_surface *obj_surface,
 162                                      struct intel_encoder_context *encoder_context)
 163 {
 164     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 165
 166     vme_context->vme_media_rw_surface_setup(ctx,
 167                                             &vme_context->gpe_context,
 168                                             obj_surface,
 169                                             BINDING_TABLE_OFFSET(index),
 170                                             SURFACE_STATE_OFFSET(index));
 171 }
 172
 173 static void
 174 gen75_vme_media_chroma_source_surface_state(VADriverContextP ctx,
 175                                             int index,
 176                                             struct object_surface *obj_surface,
 177                                             struct intel_encoder_context *encoder_context)
 178 {
 179     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 180
 181     vme_context->vme_media_chroma_surface_setup(ctx,
 182                                                 &vme_context->gpe_context,
 183                                                 obj_surface,
 184                                                 BINDING_TABLE_OFFSET(index),
 185                                                 SURFACE_STATE_OFFSET(index));
 186 }
 187
 188 static void
 189 gen75_vme_output_buffer_setup(VADriverContextP ctx,
 190                               struct encode_state *encode_state,
 191                               int index,
 192                               struct intel_encoder_context *encoder_context)
 193
 194 {
 195     struct i965_driver_data *i965 = i965_driver_data(ctx);
 196     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 197     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 198     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 199     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 200     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 201     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 202
 203     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
 204     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
 205
 206     if (is_intra)
 207         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
 208     else
 209         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
 210     /*
 211      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
 212      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
 213      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
 214      */
 215
 216     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
 217                                               "VME output buffer",
 218                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
 219                                               0x1000);
 220     assert(vme_context->vme_output.bo);
 221     vme_context->vme_buffer_suface_setup(ctx,
 222                                          &vme_context->gpe_context,
 223                                          &vme_context->vme_output,
 224                                          BINDING_TABLE_OFFSET(index),
 225                                          SURFACE_STATE_OFFSET(index));
 226 }
 227
 228 static void
 229 gen75_vme_output_vme_batchbuffer_setup(VADriverContextP ctx,
 230                                        struct encode_state *encode_state,
 231                                        int index,
 232                                        struct intel_encoder_context *encoder_context)
 233
 234 {
 235     struct i965_driver_data *i965 = i965_driver_data(ctx);
 236     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 237     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 238     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 239     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 240
 241     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
 242     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
 243     vme_context->vme_batchbuffer.pitch = 16;
 244     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
 245                                                    "VME batchbuffer",
 246                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
 247                                                    0x1000);
 248     vme_context->vme_buffer_suface_setup(ctx,
 249                                          &vme_context->gpe_context,
 250                                          &vme_context->vme_batchbuffer,
 251                                          BINDING_TABLE_OFFSET(index),
 252                                          SURFACE_STATE_OFFSET(index));
 253 }
 254
 255 static VAStatus
 256 gen75_vme_surface_setup(VADriverContextP ctx,
 257                         struct encode_state *encode_state,
 258                         int is_intra,
 259                         struct intel_encoder_context *encoder_context)
 260 {
 261     struct i965_driver_data *i965 = i965_driver_data(ctx);
 262     struct object_surface *obj_surface;
 263     VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 264
 265     /*Setup surfaces state*/
 266     /* current picture for encoding */
 267     obj_surface = SURFACE(encoder_context->input_yuv_surface);
 268     assert(obj_surface);
 269     gen75_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
 270     gen75_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
 271     gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
 272
 273     if (!is_intra) {
 274         /* reference 0 */
 275         obj_surface = SURFACE(pPicParameter->ReferenceFrames[0].picture_id);
 276         assert(obj_surface);
 277         if ( obj_surface->bo != NULL)
 278             gen75_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
 279
 280         /* reference 1 */
 281         obj_surface = SURFACE(pPicParameter->ReferenceFrames[1].picture_id);
 282         assert(obj_surface);
 283         if ( obj_surface->bo != NULL )
 284             gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
 285     }
 286
 287     /* VME output */
 288     gen75_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context);
 289     gen75_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
 290
 291     return VA_STATUS_SUCCESS;
 292 }
 293
 294 static VAStatus gen75_vme_interface_setup(VADriverContextP ctx,
 295                                           struct encode_state *encode_state,
 296                                           struct intel_encoder_context *encoder_context)
 297 {
 298     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 299     struct gen6_interface_descriptor_data *desc;
 300     int i;
 301     dri_bo *bo;
 302
 303     bo = vme_context->gpe_context.idrt.bo;
 304     dri_bo_map(bo, 1);
 305     assert(bo->virtual);
 306     desc = bo->virtual;
 307
 308     for (i = 0; i < GEN6_VME_KERNEL_NUMBER; i++) {
 309         struct i965_kernel *kernel;
 310         kernel = &vme_context->gpe_context.kernels[i];
 311         assert(sizeof(*desc) == 32);
 312         /*Setup the descritor table*/
 313         memset(desc, 0, sizeof(*desc));
 314         desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6);
 315         desc->desc2.sampler_count = 0; /* FIXME: */
 316         desc->desc2.sampler_state_pointer = 0;
 317         desc->desc3.binding_table_entry_count = 1; /* FIXME: */
 318         desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5);
 319         desc->desc4.constant_urb_entry_read_offset = 0;
 320         desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH;
 321
 322         /*kernel start*/
 323         dri_bo_emit_reloc(bo,
 324                           I915_GEM_DOMAIN_INSTRUCTION, 0,
 325                           0,
 326                           i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0),
 327                           kernel->bo);
 328         desc++;
 329     }
 330     dri_bo_unmap(bo);
 331
 332     return VA_STATUS_SUCCESS;
 333 }
 334
 335 static VAStatus gen75_vme_constant_setup(VADriverContextP ctx,
 336                                          struct encode_state *encode_state,
 337                                          struct intel_encoder_context *encoder_context)
 338 {
 339     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 340     unsigned char *constant_buffer;
 341     unsigned int *vme_state_message;
 342     int mv_num = 32;
 343
 344     vme_state_message = (unsigned int *)vme_context->vme_state_message;
 345
 346     if (encoder_context->profile == VAProfileH264Baseline ||
 347         encoder_context->profile == VAProfileH264Main ||
 348         encoder_context->profile == VAProfileH264High) {
 349         if (vme_context->h264_level >= 30) {
 350             mv_num = 16;
 351
 352             if (vme_context->h264_level >= 31)
 353                 mv_num = 8;
 354         }
 355     } else if (encoder_context->profile == VAProfileMPEG2Simple ||
 356                encoder_context->profile == VAProfileMPEG2Main) {
 357         mv_num = 2;
 358     }
 359
 360     vme_state_message[31] = mv_num;
 361
 362     dri_bo_map(vme_context->gpe_context.curbe.bo, 1);
 363     assert(vme_context->gpe_context.curbe.bo->virtual);
 364     constant_buffer = vme_context->gpe_context.curbe.bo->virtual;
 365
 366     /* VME MV/Mb cost table is passed by using const buffer */
 367     /* Now it uses the fixed search path. So it is constructed directly
 368      * in the GPU shader.
 369      */
 370     memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128);
 371
 372     dri_bo_unmap(vme_context->gpe_context.curbe.bo);
 373
 374     return VA_STATUS_SUCCESS;
 375 }
 376
 377 static const unsigned int intra_mb_mode_cost_table[] = {
 378     0x31110001, // for qp0
 379     0x09110001, // for qp1
 380     0x15030001, // for qp2
 381     0x0b030001, // for qp3
 382     0x0d030011, // for qp4
 383     0x17210011, // for qp5
 384     0x41210011, // for qp6
 385     0x19210011, // for qp7
 386     0x25050003, // for qp8
 387     0x1b130003, // for qp9
 388     0x1d130003, // for qp10
 389     0x27070021, // for qp11
 390     0x51310021, // for qp12
 391     0x29090021, // for qp13
 392     0x35150005, // for qp14
 393     0x2b0b0013, // for qp15
 394     0x2d0d0013, // for qp16
 395     0x37170007, // for qp17
 396     0x61410031, // for qp18
 397     0x39190009, // for qp19
 398     0x45250015, // for qp20
 399     0x3b1b000b, // for qp21
 400     0x3d1d000d, // for qp22
 401     0x47270017, // for qp23
 402     0x71510041, // for qp24 ! center for qp=0..30
 403     0x49290019, // for qp25
 404     0x55350025, // for qp26
 405     0x4b2b001b, // for qp27
 406     0x4d2d001d, // for qp28
 407     0x57370027, // for qp29
 408     0x81610051, // for qp30
 409     0x57270017, // for qp31
 410     0x81510041, // for qp32 ! center for qp=31..51
 411     0x59290019, // for qp33
 412     0x65350025, // for qp34
 413     0x5b2b001b, // for qp35
 414     0x5d2d001d, // for qp36
 415     0x67370027, // for qp37
 416     0x91610051, // for qp38
 417     0x69390029, // for qp39
 418     0x75450035, // for qp40
 419     0x6b3b002b, // for qp41
 420     0x6d3d002d, // for qp42
 421     0x77470037, // for qp43
 422     0xa1710061, // for qp44
 423     0x79490039, // for qp45
 424     0x85550045, // for qp46
 425     0x7b4b003b, // for qp47
 426     0x7d4d003d, // for qp48
 427     0x87570047, // for qp49
 428     0xb1810071, // for qp50
 429     0x89590049  // for qp51
 430 };
 431
 432 static void gen75_vme_state_setup_fixup(VADriverContextP ctx,
 433                                         struct encode_state *encode_state,
 434                                         struct intel_encoder_context *encoder_context,
 435                                         unsigned int *vme_state_message)
 436 {
 437     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
 438     VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 439     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 440
 441     if (slice_param->slice_type != SLICE_TYPE_I &&
 442         slice_param->slice_type != SLICE_TYPE_SI)
 443         return;
 444     if (encoder_context->rate_control_mode == VA_RC_CQP)
 445         vme_state_message[0] = intra_mb_mode_cost_table[pic_param->pic_init_qp + slice_param->slice_qp_delta];
 446     else
 447         vme_state_message[0] = intra_mb_mode_cost_table[mfc_context->bit_rate_control_context[slice_param->slice_type].QpPrimeY];
 448 }
 449
 450 static VAStatus gen75_vme_vme_state_setup(VADriverContextP ctx,
 451                                           struct encode_state *encode_state,
 452                                           int is_intra,
 453                                           struct intel_encoder_context *encoder_context)
 454 {
 455     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 456     unsigned int *vme_state_message;
 457     int i;
 458
 459     //pass the MV/Mb cost into VME message on HASWell
 460     assert(vme_context->vme_state_message);
 461     vme_state_message = (unsigned int *)vme_context->vme_state_message;
 462
 463     vme_state_message[0] = 0x4a4a4a4a;
 464     vme_state_message[1] = 0x4a4a4a4a;
 465     vme_state_message[2] = 0x4a4a4a4a;
 466     vme_state_message[3] = 0x22120200;
 467     vme_state_message[4] = 0x62524232;
 468
 469     for (i=5; i < 8; i++) {
 470         vme_state_message[i] = 0;
 471     }
 472
 473     switch (encoder_context->profile) {
 474     case VAProfileH264Baseline:
 475     case VAProfileH264Main:
 476     case VAProfileH264High:
 477         gen75_vme_state_setup_fixup(ctx, encode_state, encoder_context, vme_state_message);
 478
 479         break;
 480
 481     default:
 482         /* no fixup */
 483         break;
 484     }
 485
 486     return VA_STATUS_SUCCESS;
 487 }
 488
 489 #define         INTRA_PRED_AVAIL_FLAG_AE        0x60
 490 #define         INTRA_PRED_AVAIL_FLAG_B         0x10
 491 #define         INTRA_PRED_AVAIL_FLAG_C         0x8
 492 #define         INTRA_PRED_AVAIL_FLAG_D         0x4
 493 #define         INTRA_PRED_AVAIL_FLAG_BCD_MASK  0x1C
 494
 495 static void
 496 gen75_vme_fill_vme_batchbuffer(VADriverContextP ctx,
 497                                struct encode_state *encode_state,
 498                                int mb_width, int mb_height,
 499                                int kernel,
 500                                int transform_8x8_mode_flag,
 501                                struct intel_encoder_context *encoder_context)
 502 {
 503     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 504     int mb_x = 0, mb_y = 0;
 505     int i, s;
 506     unsigned int *command_ptr;
 507
 508     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
 509     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
 510
 511     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 512         VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
 513         int slice_mb_begin = pSliceParameter->macroblock_address;
 514         int slice_mb_number = pSliceParameter->num_macroblocks;
 515         unsigned int mb_intra_ub;
 516         int slice_mb_x = pSliceParameter->macroblock_address % mb_width;
 517         for (i = 0; i < slice_mb_number;  ) {
 518             int mb_count = i + slice_mb_begin;
 519             mb_x = mb_count % mb_width;
 520             mb_y = mb_count / mb_width;
 521             mb_intra_ub = 0;
 522             if (mb_x != 0) {
 523                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
 524             }
 525             if (mb_y != 0) {
 526                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
 527                 if (mb_x != 0)
 528                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
 529                 if (mb_x != (mb_width -1))
 530                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 531             }
 532             if (i < mb_width) {
 533                 if (i == 0)
 534                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
 535                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
 536                 if ((i == (mb_width - 1)) && slice_mb_x) {
 537                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 538                 }
 539             }
 540
 541             if ((i == mb_width) && slice_mb_x) {
 542                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
 543             }
 544             *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
 545             *command_ptr++ = kernel;
 546             *command_ptr++ = 0;
 547             *command_ptr++ = 0;
 548             *command_ptr++ = 0;
 549             *command_ptr++ = 0;
 550
 551             /*inline data */
 552             *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
 553             *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
 554
 555             i += 1;
 556         }
 557     }
 558
 559     *command_ptr++ = 0;
 560     *command_ptr++ = MI_BATCH_BUFFER_END;
 561
 562     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
 563 }
 564
 565
 566 static void
 567 gen75_vme_walker_fill_vme_batchbuffer(VADriverContextP ctx,
 568                               struct encode_state *encode_state,
 569                               int mb_width, int mb_height,
 570                               int kernel,
 571                               int transform_8x8_mode_flag,
 572                               struct intel_encoder_context *encoder_context)
 573 {
 574     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 575     int mb_x = 0, mb_y = 0;
 576     int mb_row;
 577     int i, s;
 578     unsigned int *command_ptr;
 579     int temp;
 580
 581
 582 #define         USE_SCOREBOARD          (1 << 21)
 583
 584     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
 585     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
 586
 587     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 588         VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
 589         int slice_mb_begin = pSliceParameter->macroblock_address;
 590         int slice_mb_number = pSliceParameter->num_macroblocks;
 591         unsigned int mb_intra_ub, score_dep;
 592         int slice_mb_x = pSliceParameter->macroblock_address % mb_width;
 593         mb_row = slice_mb_begin / mb_width;
 594         for (i = 0; i < slice_mb_number;  ) {
 595             int mb_count = i + slice_mb_begin;
 596             mb_x = mb_count % mb_width;
 597             mb_y = mb_count / mb_width;
 598             mb_intra_ub = 0;
 599             score_dep = 0;
 600             if (mb_x != 0) {
 601                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
 602                 score_dep |= MB_SCOREBOARD_A;
 603             }
 604             if (mb_y != mb_row) {
 605                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
 606                 score_dep |= MB_SCOREBOARD_B;
 607                 if (mb_x != 0)
 608                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
 609                 if (mb_x != (mb_width -1)) {
 610                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 611                         score_dep |= MB_SCOREBOARD_C;
 612                 }
 613             }
 614
 615                 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
 616                 *command_ptr++ = kernel;
 617                 *command_ptr++ = USE_SCOREBOARD;
 618                 *command_ptr++ = 0;
 619                 /* the (X, Y) term of scoreboard */
 620                 *command_ptr++ = ((mb_y << 16) | mb_x);
 621                 *command_ptr++ = score_dep;
 622                 /*inline data */
 623                 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
 624                 *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
 625
 626             i += 1;
 627         }
 628     }
 629
 630     *command_ptr++ = 0;
 631     *command_ptr++ = MI_BATCH_BUFFER_END;
 632
 633     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
 634 }
 635
 636 static void gen75_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
 637 {
 638     struct i965_driver_data *i965 = i965_driver_data(ctx);
 639     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 640     dri_bo *bo;
 641
 642     i965_gpe_context_init(ctx, &vme_context->gpe_context);
 643
 644     /* VME output buffer */
 645     dri_bo_unreference(vme_context->vme_output.bo);
 646     vme_context->vme_output.bo = NULL;
 647
 648     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
 649     vme_context->vme_batchbuffer.bo = NULL;
 650
 651     /* VME state */
 652     dri_bo_unreference(vme_context->vme_state.bo);
 653     vme_context->vme_state.bo = NULL;
 654 }
 655
 656 static void gen75_vme_pipeline_programing(VADriverContextP ctx,
 657                                           struct encode_state *encode_state,
 658                                           struct intel_encoder_context *encoder_context)
 659 {
 660     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 661     struct intel_batchbuffer *batch = encoder_context->base.batch;
 662     VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 663     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 664     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 665     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 666     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 667     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 668     bool allow_hwscore = true;
 669     int s;
 670
 671     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 672         pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
 673         if ((pSliceParameter->macroblock_address % width_in_mbs)) {
 674                 allow_hwscore = false;
 675                 break;
 676         }
 677     }
 678
 679     if (allow_hwscore)
 680         gen75_vme_walker_fill_vme_batchbuffer(ctx,
 681                                   encode_state,
 682                                   width_in_mbs, height_in_mbs,
 683                                   is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER,
 684                                   pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
 685                                   encoder_context);
 686     else
 687         gen75_vme_fill_vme_batchbuffer(ctx,
 688                                    encode_state,
 689                                    width_in_mbs, height_in_mbs,
 690                                    is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER,
 691                                    pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
 692                                    encoder_context);
 693
 694     intel_batchbuffer_start_atomic(batch, 0x1000);
 695     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
 696     BEGIN_BATCH(batch, 2);
 697     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
 698     OUT_RELOC(batch,
 699               vme_context->vme_batchbuffer.bo,
 700               I915_GEM_DOMAIN_COMMAND, 0,
 701               0);
 702     ADVANCE_BATCH(batch);
 703
 704     intel_batchbuffer_end_atomic(batch);
 705 }
 706
 707 static VAStatus gen75_vme_prepare(VADriverContextP ctx,
 708                                   struct encode_state *encode_state,
 709                                   struct intel_encoder_context *encoder_context)
 710 {
 711     VAStatus vaStatus = VA_STATUS_SUCCESS;
 712     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 713     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 714     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 715     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 716
 717     if (!vme_context->h264_level ||
 718         (vme_context->h264_level != pSequenceParameter->level_idc)) {
 719         vme_context->h264_level = pSequenceParameter->level_idc;
 720     }
 721
 722     intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context);
 723
 724     /*Setup all the memory object*/
 725     gen75_vme_surface_setup(ctx, encode_state, is_intra, encoder_context);
 726     gen75_vme_interface_setup(ctx, encode_state, encoder_context);
 727     //gen75_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context);
 728     gen75_vme_constant_setup(ctx, encode_state, encoder_context);
 729
 730     /*Programing media pipeline*/
 731     gen75_vme_pipeline_programing(ctx, encode_state, encoder_context);
 732
 733     return vaStatus;
 734 }
 735
 736 static VAStatus gen75_vme_run(VADriverContextP ctx,
 737                               struct encode_state *encode_state,
 738                               struct intel_encoder_context *encoder_context)
 739 {
 740     struct intel_batchbuffer *batch = encoder_context->base.batch;
 741
 742     intel_batchbuffer_flush(batch);
 743
 744     return VA_STATUS_SUCCESS;
 745 }
 746
 747 static VAStatus gen75_vme_stop(VADriverContextP ctx,
 748                                struct encode_state *encode_state,
 749                                struct intel_encoder_context *encoder_context)
 750 {
 751     return VA_STATUS_SUCCESS;
 752 }
 753
 754 static VAStatus
 755 gen75_vme_pipeline(VADriverContextP ctx,
 756                    VAProfile profile,
 757                    struct encode_state *encode_state,
 758                    struct intel_encoder_context *encoder_context)
 759 {
 760     gen75_vme_media_init(ctx, encoder_context);
 761     gen75_vme_prepare(ctx, encode_state, encoder_context);
 762     gen75_vme_run(ctx, encode_state, encoder_context);
 763     gen75_vme_stop(ctx, encode_state, encoder_context);
 764
 765     return VA_STATUS_SUCCESS;
 766 }
 767
 768 static void
 769 gen75_vme_mpeg2_output_buffer_setup(VADriverContextP ctx,
 770                                     struct encode_state *encode_state,
 771                                     int index,
 772                                     int is_intra,
 773                                     struct intel_encoder_context *encoder_context)
 774
 775 {
 776     struct i965_driver_data *i965 = i965_driver_data(ctx);
 777     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 778     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 779     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 780     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 781
 782     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
 783     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
 784
 785     if (is_intra)
 786         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
 787     else
 788         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
 789     /*
 790      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
 791      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
 792      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
 793      */
 794
 795     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
 796                                               "VME output buffer",
 797                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
 798                                               0x1000);
 799     assert(vme_context->vme_output.bo);
 800     vme_context->vme_buffer_suface_setup(ctx,
 801                                          &vme_context->gpe_context,
 802                                          &vme_context->vme_output,
 803                                          BINDING_TABLE_OFFSET(index),
 804                                          SURFACE_STATE_OFFSET(index));
 805 }
 806
 807 static void
 808 gen75_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx,
 809                                              struct encode_state *encode_state,
 810                                              int index,
 811                                              struct intel_encoder_context *encoder_context)
 812
 813 {
 814     struct i965_driver_data *i965 = i965_driver_data(ctx);
 815     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 816     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 817     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 818     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 819
 820     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
 821     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
 822     vme_context->vme_batchbuffer.pitch = 16;
 823     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
 824                                                    "VME batchbuffer",
 825                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
 826                                                    0x1000);
 827     vme_context->vme_buffer_suface_setup(ctx,
 828                                          &vme_context->gpe_context,
 829                                          &vme_context->vme_batchbuffer,
 830                                          BINDING_TABLE_OFFSET(index),
 831                                          SURFACE_STATE_OFFSET(index));
 832 }
 833
 834 static VAStatus
 835 gen75_vme_mpeg2_surface_setup(VADriverContextP ctx,
 836                               struct encode_state *encode_state,
 837                               int is_intra,
 838                               struct intel_encoder_context *encoder_context)
 839 {
 840     struct i965_driver_data *i965 = i965_driver_data(ctx);
 841     struct object_surface *obj_surface;
 842     VAEncPictureParameterBufferMPEG2 *pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer;
 843
 844     /*Setup surfaces state*/
 845     /* current picture for encoding */
 846     obj_surface = SURFACE(encoder_context->input_yuv_surface);
 847     assert(obj_surface);
 848     gen75_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
 849     gen75_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
 850     gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
 851
 852     if (!is_intra) {
 853         /* reference 0 */
 854         obj_surface = SURFACE(pic_param->forward_reference_picture);
 855         assert(obj_surface);
 856         if ( obj_surface->bo != NULL)
 857             gen75_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
 858
 859         /* reference 1 */
 860         obj_surface = SURFACE(pic_param->backward_reference_picture);
 861         if (obj_surface && obj_surface->bo != NULL)
 862             gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
 863     }
 864
 865     /* VME output */
 866     gen75_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context);
 867     gen75_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
 868
 869     return VA_STATUS_SUCCESS;
 870 }
 871
 872 static void
 873 gen75_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx,
 874                                      struct encode_state *encode_state,
 875                                      int mb_width, int mb_height,
 876                                      int kernel,
 877                                      int transform_8x8_mode_flag,
 878                                      struct intel_encoder_context *encoder_context)
 879 {
 880     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 881     int mb_x = 0, mb_y = 0;
 882     int i, s, j;
 883     unsigned int *command_ptr;
 884
 885 #define         INTRA_PRED_AVAIL_FLAG_AE        0x60
 886 #define         INTRA_PRED_AVAIL_FLAG_B         0x10
 887 #define         INTRA_PRED_AVAIL_FLAG_C         0x8
 888 #define         INTRA_PRED_AVAIL_FLAG_D         0x4
 889 #define         INTRA_PRED_AVAIL_FLAG_BCD_MASK  0x1C
 890
 891     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
 892     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
 893
 894     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 895         VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer;
 896
 897         for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) {
 898             int slice_mb_begin = slice_param->macroblock_address;
 899             int slice_mb_number = slice_param->num_macroblocks;
 900             unsigned int mb_intra_ub;
 901             int slice_mb_x = slice_param->macroblock_address % mb_width;
 902
 903             for (i = 0; i < slice_mb_number;) {
 904                 int mb_count = i + slice_mb_begin;
 905
 906                 mb_x = mb_count % mb_width;
 907                 mb_y = mb_count / mb_width;
 908                 mb_intra_ub = 0;
 909
 910                 if (mb_x != 0) {
 911                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
 912                 }
 913
 914                 if (mb_y != 0) {
 915                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
 916
 917                     if (mb_x != 0)
 918                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
 919
 920                     if (mb_x != (mb_width -1))
 921                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 922                 }
 923
 924                 if (i < mb_width) {
 925                     if (i == 0)
 926                         mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
 927
 928                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
 929
 930                     if ((i == (mb_width - 1)) && slice_mb_x) {
 931                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 932                     }
 933                 }
 934
 935                 if ((i == mb_width) && slice_mb_x) {
 936                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
 937                 }
 938
 939                 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
 940                 *command_ptr++ = kernel;
 941                 *command_ptr++ = 0;
 942                 *command_ptr++ = 0;
 943                 *command_ptr++ = 0;
 944                 *command_ptr++ = 0;
 945
 946                 /*inline data */
 947                 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
 948                 *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
 949
 950                 i += 1;
 951             }
 952
 953             slice_param++;
 954         }
 955     }
 956
 957     *command_ptr++ = 0;
 958     *command_ptr++ = MI_BATCH_BUFFER_END;
 959
 960     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
 961 }
 962
 963 static void
 964 gen75_vme_mpeg2_pipeline_programing(VADriverContextP ctx,
 965                                     struct encode_state *encode_state,
 966                                     int is_intra,
 967                                     struct intel_encoder_context *encoder_context)
 968 {
 969     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 970     struct intel_batchbuffer *batch = encoder_context->base.batch;
 971     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 972     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 973     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 974
 975     gen75_vme_mpeg2_fill_vme_batchbuffer(ctx,
 976                                          encode_state,
 977                                          width_in_mbs, height_in_mbs,
 978                                          is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER,
 979                                          0,
 980                                          encoder_context);
 981
 982     intel_batchbuffer_start_atomic(batch, 0x1000);
 983     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
 984     BEGIN_BATCH(batch, 2);
 985     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
 986     OUT_RELOC(batch,
 987               vme_context->vme_batchbuffer.bo,
 988               I915_GEM_DOMAIN_COMMAND, 0,
 989               0);
 990     ADVANCE_BATCH(batch);
 991
 992     intel_batchbuffer_end_atomic(batch);
 993 }
 994
 995 static VAStatus
 996 gen75_vme_mpeg2_prepare(VADriverContextP ctx,
 997                         struct encode_state *encode_state,
 998                         struct intel_encoder_context *encoder_context)
 999 {
1000     VAStatus vaStatus = VA_STATUS_SUCCESS;
1001     VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
1002
1003     /*Setup all the memory object*/
1004     gen75_vme_mpeg2_surface_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
1005     gen75_vme_interface_setup(ctx, encode_state, encoder_context);
1006     gen75_vme_vme_state_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
1007     gen75_vme_constant_setup(ctx, encode_state, encoder_context);
1008
1009     /*Programing media pipeline*/
1010     gen75_vme_mpeg2_pipeline_programing(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
1011
1012     return vaStatus;
1013 }
1014
1015 static VAStatus
1016 gen75_vme_mpeg2_pipeline(VADriverContextP ctx,
1017                          VAProfile profile,
1018                          struct encode_state *encode_state,
1019                          struct intel_encoder_context *encoder_context)
1020 {
1021     gen75_vme_media_init(ctx, encoder_context);
1022     gen75_vme_mpeg2_prepare(ctx, encode_state, encoder_context);
1023     gen75_vme_run(ctx, encode_state, encoder_context);
1024     gen75_vme_stop(ctx, encode_state, encoder_context);
1025
1026     return VA_STATUS_SUCCESS;
1027 }
1028
1029 static void
1030 gen75_vme_context_destroy(void *context)
1031 {
1032     struct gen6_vme_context *vme_context = context;
1033
1034     i965_gpe_context_destroy(&vme_context->gpe_context);
1035
1036     dri_bo_unreference(vme_context->vme_output.bo);
1037     vme_context->vme_output.bo = NULL;
1038
1039     dri_bo_unreference(vme_context->vme_state.bo);
1040     vme_context->vme_state.bo = NULL;
1041
1042     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
1043     vme_context->vme_batchbuffer.bo = NULL;
1044
1045     if (vme_context->vme_state_message) {
1046         free(vme_context->vme_state_message);
1047         vme_context->vme_state_message = NULL;
1048     }
1049
1050     free(vme_context);
1051 }
1052
1053 Bool gen75_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
1054 {
1055     struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context));
1056     struct i965_kernel *vme_kernel_list = NULL;
1057
1058     switch (encoder_context->profile) {
1059     case VAProfileH264Baseline:
1060     case VAProfileH264Main:
1061     case VAProfileH264High:
1062         vme_kernel_list = gen75_vme_kernels;
1063         encoder_context->vme_pipeline = gen75_vme_pipeline;
1064
1065         break;
1066
1067     case VAProfileMPEG2Simple:
1068     case VAProfileMPEG2Main:
1069         vme_kernel_list = gen75_vme_mpeg2_kernels;
1070         encoder_context->vme_pipeline = gen75_vme_mpeg2_pipeline;
1071
1072         break;
1073
1074     default:
1075         /* never get here */
1076         assert(0);
1077
1078         break;
1079     }
1080
1081     vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
1082
1083     vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6;
1084     vme_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data);
1085
1086     vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH;
1087
1088     vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
1089     vme_context->gpe_context.vfe_state.num_urb_entries = 16;
1090     vme_context->gpe_context.vfe_state.gpgpu_mode = 0;
1091     vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1;
1092     vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1;
1093
1094         vme_context->gpe_context.vfe_desc5.scoreboard0.enable = 1;
1095         vme_context->gpe_context.vfe_desc5.scoreboard0.type = SCOREBOARD_STALLING;
1096         vme_context->gpe_context.vfe_desc5.scoreboard0.mask = (MB_SCOREBOARD_A |
1097                                                                 MB_SCOREBOARD_B |
1098                                                                 MB_SCOREBOARD_C);
1099
1100         /* In VME prediction the current mb depends on the neighbour
1101          * A/B/C macroblock. So the left/up/up-right dependency should
1102          * be considered.
1103          */
1104         vme_context->gpe_context.vfe_desc6.scoreboard1.delta_x0 = -1;
1105         vme_context->gpe_context.vfe_desc6.scoreboard1.delta_y0 = 0;
1106         vme_context->gpe_context.vfe_desc6.scoreboard1.delta_x1 = 0;
1107         vme_context->gpe_context.vfe_desc6.scoreboard1.delta_y1 = -1;
1108         vme_context->gpe_context.vfe_desc6.scoreboard1.delta_x2 = 1;
1109         vme_context->gpe_context.vfe_desc6.scoreboard1.delta_y2 = -1;
1110
1111         vme_context->gpe_context.vfe_desc7.dword = 0;
1112
1113     i965_gpe_load_kernels(ctx,
1114                           &vme_context->gpe_context,
1115                           vme_kernel_list,
1116                           GEN6_VME_KERNEL_NUMBER);
1117     vme_context->vme_surface2_setup = gen7_gpe_surface2_setup;
1118     vme_context->vme_media_rw_surface_setup = gen7_gpe_media_rw_surface_setup;
1119     vme_context->vme_buffer_suface_setup = gen7_gpe_buffer_suface_setup;
1120     vme_context->vme_media_chroma_surface_setup = gen75_gpe_media_chroma_surface_setup;
1121
1122     encoder_context->vme_context = vme_context;
1123     encoder_context->vme_context_destroy = gen75_vme_context_destroy;
1124
1125     vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int));
1126
1127     return True;
1128 }