src/gen75_vme.c

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Zhao Yakui <yakui.zhao@intel.com>
  26  *    Xiang Haihao <haihao.xiang@intel.com>
  27  */
  28
  29 #include <stdio.h>
  30 #include <stdlib.h>
  31 #include <stdbool.h>
  32 #include <string.h>
  33 #include <assert.h>
  34
  35 #include "intel_batchbuffer.h"
  36 #include "intel_driver.h"
  37
  38 #include "i965_defines.h"
  39 #include "i965_drv_video.h"
  40 #include "i965_encoder.h"
  41 #include "gen6_vme.h"
  42 #include "gen6_mfc.h"
  43
  44 #define SURFACE_STATE_PADDED_SIZE_0_GEN7        ALIGN(sizeof(struct gen7_surface_state), 32)
  45 #define SURFACE_STATE_PADDED_SIZE_1_GEN7        ALIGN(sizeof(struct gen7_surface_state2), 32)
  46 #define SURFACE_STATE_PADDED_SIZE_GEN7          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN7, SURFACE_STATE_PADDED_SIZE_1_GEN7)
  47
  48 #define SURFACE_STATE_PADDED_SIZE_0_GEN6        ALIGN(sizeof(struct i965_surface_state), 32)
  49 #define SURFACE_STATE_PADDED_SIZE_1_GEN6        ALIGN(sizeof(struct i965_surface_state2), 32)
  50 #define SURFACE_STATE_PADDED_SIZE_GEN6          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN6, SURFACE_STATE_PADDED_SIZE_1_GEN6)
  51
  52 #define SURFACE_STATE_PADDED_SIZE               MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7)
  53 #define SURFACE_STATE_OFFSET(index)             (SURFACE_STATE_PADDED_SIZE * index)
  54 #define BINDING_TABLE_OFFSET(index)             (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index)
  55
  56 #define VME_INTRA_SHADER        0
  57 #define VME_INTER_SHADER        1
  58 #define VME_BINTER_SHADER       3
  59 #define VME_BATCHBUFFER         2
  60
  61 #define CURBE_ALLOCATION_SIZE   37              /* in 256-bit */
  62 #define CURBE_TOTAL_DATA_LENGTH (4 * 32)        /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */
  63 #define CURBE_URB_ENTRY_LENGTH  4               /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */
  64
  65 #define VME_MSG_LENGTH          32
  66
  67 static const uint32_t gen75_vme_intra_frame[][4] = {
  68 #include "shaders/vme/intra_frame_haswell.g75b"
  69 };
  70
  71 static const uint32_t gen75_vme_inter_frame[][4] = {
  72 #include "shaders/vme/inter_frame_haswell.g75b"
  73 };
  74
  75 static const uint32_t gen75_vme_inter_bframe[][4] = {
  76 #include "shaders/vme/inter_bframe_haswell.g75b"
  77 };
  78
  79 static const uint32_t gen75_vme_batchbuffer[][4] = {
  80 #include "shaders/vme/batchbuffer.g75b"
  81 };
  82
  83 static struct i965_kernel gen75_vme_kernels[] = {
  84     {
  85         "VME Intra Frame",
  86         VME_INTRA_SHADER, /*index*/
  87         gen75_vme_intra_frame,
  88         sizeof(gen75_vme_intra_frame),
  89         NULL
  90     },
  91     {
  92         "VME inter Frame",
  93         VME_INTER_SHADER,
  94         gen75_vme_inter_frame,
  95         sizeof(gen75_vme_inter_frame),
  96         NULL
  97     },
  98     {
  99         "VME BATCHBUFFER",
 100         VME_BATCHBUFFER,
 101         gen75_vme_batchbuffer,
 102         sizeof(gen75_vme_batchbuffer),
 103         NULL
 104     },
 105     {
 106         "VME inter BFrame",
 107         VME_BINTER_SHADER,
 108         gen75_vme_inter_bframe,
 109         sizeof(gen75_vme_inter_bframe),
 110         NULL
 111     }
 112 };
 113
 114 static const uint32_t gen75_vme_mpeg2_intra_frame[][4] = {
 115 #include "shaders/vme/intra_frame_haswell.g75b"
 116 };
 117
 118 static const uint32_t gen75_vme_mpeg2_inter_frame[][4] = {
 119 #include "shaders/vme/mpeg2_inter_frame_haswell.g75b"
 120 };
 121
 122 static const uint32_t gen75_vme_mpeg2_batchbuffer[][4] = {
 123 #include "shaders/vme/batchbuffer.g75b"
 124 };
 125
 126 static struct i965_kernel gen75_vme_mpeg2_kernels[] = {
 127     {
 128         "VME Intra Frame",
 129         VME_INTRA_SHADER, /*index*/
 130         gen75_vme_mpeg2_intra_frame,
 131         sizeof(gen75_vme_mpeg2_intra_frame),
 132         NULL
 133     },
 134     {
 135         "VME inter Frame",
 136         VME_INTER_SHADER,
 137         gen75_vme_mpeg2_inter_frame,
 138         sizeof(gen75_vme_mpeg2_inter_frame),
 139         NULL
 140     },
 141     {
 142         "VME BATCHBUFFER",
 143         VME_BATCHBUFFER,
 144         gen75_vme_mpeg2_batchbuffer,
 145         sizeof(gen75_vme_mpeg2_batchbuffer),
 146         NULL
 147     },
 148 };
 149
 150 /* only used for VME source surface state */
 151 static void
 152 gen75_vme_source_surface_state(VADriverContextP ctx,
 153                                int index,
 154                                struct object_surface *obj_surface,
 155                                struct intel_encoder_context *encoder_context)
 156 {
 157     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 158
 159     vme_context->vme_surface2_setup(ctx,
 160                                     &vme_context->gpe_context,
 161                                     obj_surface,
 162                                     BINDING_TABLE_OFFSET(index),
 163                                     SURFACE_STATE_OFFSET(index));
 164 }
 165
 166 static void
 167 gen75_vme_media_source_surface_state(VADriverContextP ctx,
 168                                      int index,
 169                                      struct object_surface *obj_surface,
 170                                      struct intel_encoder_context *encoder_context)
 171 {
 172     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 173
 174     vme_context->vme_media_rw_surface_setup(ctx,
 175                                             &vme_context->gpe_context,
 176                                             obj_surface,
 177                                             BINDING_TABLE_OFFSET(index),
 178                                             SURFACE_STATE_OFFSET(index));
 179 }
 180
 181 static void
 182 gen75_vme_media_chroma_source_surface_state(VADriverContextP ctx,
 183                                             int index,
 184                                             struct object_surface *obj_surface,
 185                                             struct intel_encoder_context *encoder_context)
 186 {
 187     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 188
 189     vme_context->vme_media_chroma_surface_setup(ctx,
 190                                                 &vme_context->gpe_context,
 191                                                 obj_surface,
 192                                                 BINDING_TABLE_OFFSET(index),
 193                                                 SURFACE_STATE_OFFSET(index));
 194 }
 195
 196 static void
 197 gen75_vme_output_buffer_setup(VADriverContextP ctx,
 198                               struct encode_state *encode_state,
 199                               int index,
 200                               struct intel_encoder_context *encoder_context)
 201
 202 {
 203     struct i965_driver_data *i965 = i965_driver_data(ctx);
 204     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 205     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 206     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 207     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 208     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 209     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 210
 211     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
 212     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
 213
 214     if (is_intra)
 215         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
 216     else
 217         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
 218     /*
 219      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
 220      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
 221      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
 222      */
 223
 224     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
 225                                               "VME output buffer",
 226                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
 227                                               0x1000);
 228     assert(vme_context->vme_output.bo);
 229     vme_context->vme_buffer_suface_setup(ctx,
 230                                          &vme_context->gpe_context,
 231                                          &vme_context->vme_output,
 232                                          BINDING_TABLE_OFFSET(index),
 233                                          SURFACE_STATE_OFFSET(index));
 234 }
 235
 236 static void
 237 gen75_vme_output_vme_batchbuffer_setup(VADriverContextP ctx,
 238                                        struct encode_state *encode_state,
 239                                        int index,
 240                                        struct intel_encoder_context *encoder_context)
 241
 242 {
 243     struct i965_driver_data *i965 = i965_driver_data(ctx);
 244     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 245     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 246     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 247     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 248
 249     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
 250     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
 251     vme_context->vme_batchbuffer.pitch = 16;
 252     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
 253                                                    "VME batchbuffer",
 254                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
 255                                                    0x1000);
 256     vme_context->vme_buffer_suface_setup(ctx,
 257                                          &vme_context->gpe_context,
 258                                          &vme_context->vme_batchbuffer,
 259                                          BINDING_TABLE_OFFSET(index),
 260                                          SURFACE_STATE_OFFSET(index));
 261 }
 262
 263 static VAStatus
 264 gen75_vme_surface_setup(VADriverContextP ctx,
 265                         struct encode_state *encode_state,
 266                         int is_intra,
 267                         struct intel_encoder_context *encoder_context)
 268 {
 269     struct i965_driver_data *i965 = i965_driver_data(ctx);
 270     struct object_surface *obj_surface;
 271     VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 272
 273     /*Setup surfaces state*/
 274     /* current picture for encoding */
 275     obj_surface = encode_state->input_yuv_object;
 276     gen75_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
 277     gen75_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
 278     gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
 279
 280     if (!is_intra) {
 281         /* reference 0 */
 282         obj_surface = SURFACE(pPicParameter->ReferenceFrames[0].picture_id);
 283         assert(obj_surface);
 284         if ( obj_surface->bo != NULL)
 285             gen75_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
 286
 287         /* reference 1 */
 288         obj_surface = SURFACE(pPicParameter->ReferenceFrames[1].picture_id);
 289         assert(obj_surface);
 290         if ( obj_surface->bo != NULL )
 291             gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
 292     }
 293
 294     /* VME output */
 295     gen75_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context);
 296     gen75_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
 297
 298     return VA_STATUS_SUCCESS;
 299 }
 300
 301 static VAStatus gen75_vme_interface_setup(VADriverContextP ctx,
 302                                           struct encode_state *encode_state,
 303                                           struct intel_encoder_context *encoder_context)
 304 {
 305     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 306     struct gen6_interface_descriptor_data *desc;
 307     int i;
 308     dri_bo *bo;
 309
 310     bo = vme_context->gpe_context.idrt.bo;
 311     dri_bo_map(bo, 1);
 312     assert(bo->virtual);
 313     desc = bo->virtual;
 314
 315     for (i = 0; i < vme_context->vme_kernel_sum; i++) {
 316         struct i965_kernel *kernel;
 317         kernel = &vme_context->gpe_context.kernels[i];
 318         assert(sizeof(*desc) == 32);
 319         /*Setup the descritor table*/
 320         memset(desc, 0, sizeof(*desc));
 321         desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6);
 322         desc->desc2.sampler_count = 0; /* FIXME: */
 323         desc->desc2.sampler_state_pointer = 0;
 324         desc->desc3.binding_table_entry_count = 1; /* FIXME: */
 325         desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5);
 326         desc->desc4.constant_urb_entry_read_offset = 0;
 327         desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH;
 328
 329         /*kernel start*/
 330         dri_bo_emit_reloc(bo,
 331                           I915_GEM_DOMAIN_INSTRUCTION, 0,
 332                           0,
 333                           i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0),
 334                           kernel->bo);
 335         desc++;
 336     }
 337     dri_bo_unmap(bo);
 338
 339     return VA_STATUS_SUCCESS;
 340 }
 341
 342 static VAStatus gen75_vme_constant_setup(VADriverContextP ctx,
 343                                          struct encode_state *encode_state,
 344                                          struct intel_encoder_context *encoder_context)
 345 {
 346     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 347     unsigned char *constant_buffer;
 348     unsigned int *vme_state_message;
 349     int mv_num = 32;
 350
 351     vme_state_message = (unsigned int *)vme_context->vme_state_message;
 352
 353     if (encoder_context->profile == VAProfileH264Baseline ||
 354         encoder_context->profile == VAProfileH264Main ||
 355         encoder_context->profile == VAProfileH264High) {
 356         if (vme_context->h264_level >= 30) {
 357             mv_num = 16;
 358
 359             if (vme_context->h264_level >= 31)
 360                 mv_num = 8;
 361         }
 362     } else if (encoder_context->profile == VAProfileMPEG2Simple ||
 363                encoder_context->profile == VAProfileMPEG2Main) {
 364         mv_num = 2;
 365     }
 366
 367     vme_state_message[31] = mv_num;
 368
 369     dri_bo_map(vme_context->gpe_context.curbe.bo, 1);
 370     assert(vme_context->gpe_context.curbe.bo->virtual);
 371     constant_buffer = vme_context->gpe_context.curbe.bo->virtual;
 372
 373     /* VME MV/Mb cost table is passed by using const buffer */
 374     /* Now it uses the fixed search path. So it is constructed directly
 375      * in the GPU shader.
 376      */
 377     memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128);
 378
 379     dri_bo_unmap(vme_context->gpe_context.curbe.bo);
 380
 381     return VA_STATUS_SUCCESS;
 382 }
 383
 384 static const unsigned int intra_mb_mode_cost_table[] = {
 385     0x31110001, // for qp0
 386     0x09110001, // for qp1
 387     0x15030001, // for qp2
 388     0x0b030001, // for qp3
 389     0x0d030011, // for qp4
 390     0x17210011, // for qp5
 391     0x41210011, // for qp6
 392     0x19210011, // for qp7
 393     0x25050003, // for qp8
 394     0x1b130003, // for qp9
 395     0x1d130003, // for qp10
 396     0x27070021, // for qp11
 397     0x51310021, // for qp12
 398     0x29090021, // for qp13
 399     0x35150005, // for qp14
 400     0x2b0b0013, // for qp15
 401     0x2d0d0013, // for qp16
 402     0x37170007, // for qp17
 403     0x61410031, // for qp18
 404     0x39190009, // for qp19
 405     0x45250015, // for qp20
 406     0x3b1b000b, // for qp21
 407     0x3d1d000d, // for qp22
 408     0x47270017, // for qp23
 409     0x71510041, // for qp24 ! center for qp=0..30
 410     0x49290019, // for qp25
 411     0x55350025, // for qp26
 412     0x4b2b001b, // for qp27
 413     0x4d2d001d, // for qp28
 414     0x57370027, // for qp29
 415     0x81610051, // for qp30
 416     0x57270017, // for qp31
 417     0x81510041, // for qp32 ! center for qp=31..51
 418     0x59290019, // for qp33
 419     0x65350025, // for qp34
 420     0x5b2b001b, // for qp35
 421     0x5d2d001d, // for qp36
 422     0x67370027, // for qp37
 423     0x91610051, // for qp38
 424     0x69390029, // for qp39
 425     0x75450035, // for qp40
 426     0x6b3b002b, // for qp41
 427     0x6d3d002d, // for qp42
 428     0x77470037, // for qp43
 429     0xa1710061, // for qp44
 430     0x79490039, // for qp45
 431     0x85550045, // for qp46
 432     0x7b4b003b, // for qp47
 433     0x7d4d003d, // for qp48
 434     0x87570047, // for qp49
 435     0xb1810071, // for qp50
 436     0x89590049  // for qp51
 437 };
 438
 439 static void gen75_vme_state_setup_fixup(VADriverContextP ctx,
 440                                         struct encode_state *encode_state,
 441                                         struct intel_encoder_context *encoder_context,
 442                                         unsigned int *vme_state_message)
 443 {
 444     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
 445     VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 446     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 447
 448     if (slice_param->slice_type != SLICE_TYPE_I &&
 449         slice_param->slice_type != SLICE_TYPE_SI)
 450         return;
 451     if (encoder_context->rate_control_mode == VA_RC_CQP)
 452         vme_state_message[0] = intra_mb_mode_cost_table[pic_param->pic_init_qp + slice_param->slice_qp_delta];
 453     else
 454         vme_state_message[0] = intra_mb_mode_cost_table[mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY];
 455 }
 456
 457 static VAStatus gen75_vme_vme_state_setup(VADriverContextP ctx,
 458                                           struct encode_state *encode_state,
 459                                           int is_intra,
 460                                           struct intel_encoder_context *encoder_context)
 461 {
 462     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 463     unsigned int *vme_state_message;
 464     int i;
 465
 466     //pass the MV/Mb cost into VME message on HASWell
 467     assert(vme_context->vme_state_message);
 468     vme_state_message = (unsigned int *)vme_context->vme_state_message;
 469
 470     vme_state_message[0] = 0x4a4a4a4a;
 471     vme_state_message[1] = 0x4a4a4a4a;
 472     vme_state_message[2] = 0x4a4a4a4a;
 473     vme_state_message[3] = 0x22120200;
 474     vme_state_message[4] = 0x62524232;
 475
 476     for (i=5; i < 8; i++) {
 477         vme_state_message[i] = 0;
 478     }
 479
 480     switch (encoder_context->profile) {
 481     case VAProfileH264Baseline:
 482     case VAProfileH264Main:
 483     case VAProfileH264High:
 484         gen75_vme_state_setup_fixup(ctx, encode_state, encoder_context, vme_state_message);
 485
 486         break;
 487
 488     default:
 489         /* no fixup */
 490         break;
 491     }
 492
 493     return VA_STATUS_SUCCESS;
 494 }
 495
 496
 497 static void
 498 gen75_vme_fill_vme_batchbuffer(VADriverContextP ctx,
 499                                struct encode_state *encode_state,
 500                                int mb_width, int mb_height,
 501                                int kernel,
 502                                int transform_8x8_mode_flag,
 503                                struct intel_encoder_context *encoder_context)
 504 {
 505     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 506     int mb_x = 0, mb_y = 0;
 507     int i, s;
 508     unsigned int *command_ptr;
 509
 510     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
 511     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
 512
 513     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 514         VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
 515         int slice_mb_begin = pSliceParameter->macroblock_address;
 516         int slice_mb_number = pSliceParameter->num_macroblocks;
 517         unsigned int mb_intra_ub;
 518         int slice_mb_x = pSliceParameter->macroblock_address % mb_width;
 519         for (i = 0; i < slice_mb_number;  ) {
 520             int mb_count = i + slice_mb_begin;
 521             mb_x = mb_count % mb_width;
 522             mb_y = mb_count / mb_width;
 523             mb_intra_ub = 0;
 524             if (mb_x != 0) {
 525                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
 526             }
 527             if (mb_y != 0) {
 528                 mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
 529                 if (mb_x != 0)
 530                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
 531                 if (mb_x != (mb_width -1))
 532                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 533             }
 534             if (i < mb_width) {
 535                 if (i == 0)
 536                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
 537                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
 538                 if ((i == (mb_width - 1)) && slice_mb_x) {
 539                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 540                 }
 541             }
 542
 543             if ((i == mb_width) && slice_mb_x) {
 544                 mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
 545             }
 546             *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
 547             *command_ptr++ = kernel;
 548             *command_ptr++ = 0;
 549             *command_ptr++ = 0;
 550             *command_ptr++ = 0;
 551             *command_ptr++ = 0;
 552
 553             /*inline data */
 554             *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
 555             *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
 556
 557             i += 1;
 558         }
 559     }
 560
 561     *command_ptr++ = 0;
 562     *command_ptr++ = MI_BATCH_BUFFER_END;
 563
 564     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
 565 }
 566
 567 static void gen75_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
 568 {
 569     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 570
 571     i965_gpe_context_init(ctx, &vme_context->gpe_context);
 572
 573     /* VME output buffer */
 574     dri_bo_unreference(vme_context->vme_output.bo);
 575     vme_context->vme_output.bo = NULL;
 576
 577     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
 578     vme_context->vme_batchbuffer.bo = NULL;
 579
 580     /* VME state */
 581     dri_bo_unreference(vme_context->vme_state.bo);
 582     vme_context->vme_state.bo = NULL;
 583 }
 584
 585 static void gen75_vme_pipeline_programing(VADriverContextP ctx,
 586                                           struct encode_state *encode_state,
 587                                           struct intel_encoder_context *encoder_context)
 588 {
 589     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 590     struct intel_batchbuffer *batch = encoder_context->base.batch;
 591     VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 592     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 593     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 594     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 595     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 596     int kernel_shader;
 597     bool allow_hwscore = true;
 598     int s;
 599
 600     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 601         pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
 602         if ((pSliceParameter->macroblock_address % width_in_mbs)) {
 603                 allow_hwscore = false;
 604                 break;
 605         }
 606     }
 607     if ((pSliceParameter->slice_type == SLICE_TYPE_I) ||
 608         (pSliceParameter->slice_type == SLICE_TYPE_I)) {
 609         kernel_shader = VME_INTRA_SHADER;
 610    } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) ||
 611         (pSliceParameter->slice_type == SLICE_TYPE_SP)) {
 612         kernel_shader = VME_INTER_SHADER;
 613    } else {
 614         kernel_shader = VME_BINTER_SHADER;
 615         if (!allow_hwscore)
 616              kernel_shader = VME_INTER_SHADER;
 617    }
 618     if (allow_hwscore)
 619         gen7_vme_walker_fill_vme_batchbuffer(ctx,
 620                                   encode_state,
 621                                   width_in_mbs, height_in_mbs,
 622                                   kernel_shader,
 623                                   pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
 624                                   encoder_context);
 625     else
 626         gen75_vme_fill_vme_batchbuffer(ctx,
 627                                    encode_state,
 628                                    width_in_mbs, height_in_mbs,
 629                                    kernel_shader,
 630                                    pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
 631                                    encoder_context);
 632
 633     intel_batchbuffer_start_atomic(batch, 0x1000);
 634     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
 635     BEGIN_BATCH(batch, 2);
 636     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
 637     OUT_RELOC(batch,
 638               vme_context->vme_batchbuffer.bo,
 639               I915_GEM_DOMAIN_COMMAND, 0,
 640               0);
 641     ADVANCE_BATCH(batch);
 642
 643     intel_batchbuffer_end_atomic(batch);
 644 }
 645
 646 static VAStatus gen75_vme_prepare(VADriverContextP ctx,
 647                                   struct encode_state *encode_state,
 648                                   struct intel_encoder_context *encoder_context)
 649 {
 650     VAStatus vaStatus = VA_STATUS_SUCCESS;
 651     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 652     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 653     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 654     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 655
 656     if (!vme_context->h264_level ||
 657         (vme_context->h264_level != pSequenceParameter->level_idc)) {
 658         vme_context->h264_level = pSequenceParameter->level_idc;
 659     }
 660
 661     intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context);
 662
 663     /*Setup all the memory object*/
 664     gen75_vme_surface_setup(ctx, encode_state, is_intra, encoder_context);
 665     gen75_vme_interface_setup(ctx, encode_state, encoder_context);
 666     //gen75_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context);
 667     gen75_vme_constant_setup(ctx, encode_state, encoder_context);
 668
 669     /*Programing media pipeline*/
 670     gen75_vme_pipeline_programing(ctx, encode_state, encoder_context);
 671
 672     return vaStatus;
 673 }
 674
 675 static VAStatus gen75_vme_run(VADriverContextP ctx,
 676                               struct encode_state *encode_state,
 677                               struct intel_encoder_context *encoder_context)
 678 {
 679     struct intel_batchbuffer *batch = encoder_context->base.batch;
 680
 681     intel_batchbuffer_flush(batch);
 682
 683     return VA_STATUS_SUCCESS;
 684 }
 685
 686 static VAStatus gen75_vme_stop(VADriverContextP ctx,
 687                                struct encode_state *encode_state,
 688                                struct intel_encoder_context *encoder_context)
 689 {
 690     return VA_STATUS_SUCCESS;
 691 }
 692
 693 static VAStatus
 694 gen75_vme_pipeline(VADriverContextP ctx,
 695                    VAProfile profile,
 696                    struct encode_state *encode_state,
 697                    struct intel_encoder_context *encoder_context)
 698 {
 699     gen75_vme_media_init(ctx, encoder_context);
 700     gen75_vme_prepare(ctx, encode_state, encoder_context);
 701     gen75_vme_run(ctx, encode_state, encoder_context);
 702     gen75_vme_stop(ctx, encode_state, encoder_context);
 703
 704     return VA_STATUS_SUCCESS;
 705 }
 706
 707 static void
 708 gen75_vme_mpeg2_output_buffer_setup(VADriverContextP ctx,
 709                                     struct encode_state *encode_state,
 710                                     int index,
 711                                     int is_intra,
 712                                     struct intel_encoder_context *encoder_context)
 713
 714 {
 715     struct i965_driver_data *i965 = i965_driver_data(ctx);
 716     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 717     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 718     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 719     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 720
 721     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
 722     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
 723
 724     if (is_intra)
 725         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2;
 726     else
 727         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24;
 728     /*
 729      * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref
 730      * + 16 FBR Info + 128 FBR MV + 32 FBR Ref.
 731      * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
 732      */
 733
 734     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
 735                                               "VME output buffer",
 736                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
 737                                               0x1000);
 738     assert(vme_context->vme_output.bo);
 739     vme_context->vme_buffer_suface_setup(ctx,
 740                                          &vme_context->gpe_context,
 741                                          &vme_context->vme_output,
 742                                          BINDING_TABLE_OFFSET(index),
 743                                          SURFACE_STATE_OFFSET(index));
 744 }
 745
 746 static void
 747 gen75_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx,
 748                                              struct encode_state *encode_state,
 749                                              int index,
 750                                              struct intel_encoder_context *encoder_context)
 751
 752 {
 753     struct i965_driver_data *i965 = i965_driver_data(ctx);
 754     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 755     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 756     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 757     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 758
 759     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
 760     vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
 761     vme_context->vme_batchbuffer.pitch = 16;
 762     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
 763                                                    "VME batchbuffer",
 764                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
 765                                                    0x1000);
 766     vme_context->vme_buffer_suface_setup(ctx,
 767                                          &vme_context->gpe_context,
 768                                          &vme_context->vme_batchbuffer,
 769                                          BINDING_TABLE_OFFSET(index),
 770                                          SURFACE_STATE_OFFSET(index));
 771 }
 772
 773 static VAStatus
 774 gen75_vme_mpeg2_surface_setup(VADriverContextP ctx,
 775                               struct encode_state *encode_state,
 776                               int is_intra,
 777                               struct intel_encoder_context *encoder_context)
 778 {
 779     struct i965_driver_data *i965 = i965_driver_data(ctx);
 780     struct object_surface *obj_surface;
 781     VAEncPictureParameterBufferMPEG2 *pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer;
 782
 783     /*Setup surfaces state*/
 784     /* current picture for encoding */
 785     obj_surface = encode_state->input_yuv_object;
 786     gen75_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
 787     gen75_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
 788     gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
 789
 790     if (!is_intra) {
 791         /* reference 0 */
 792         obj_surface = SURFACE(pic_param->forward_reference_picture);
 793         assert(obj_surface);
 794         if ( obj_surface->bo != NULL)
 795             gen75_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
 796
 797         /* reference 1 */
 798         obj_surface = SURFACE(pic_param->backward_reference_picture);
 799         if (obj_surface && obj_surface->bo != NULL)
 800             gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
 801     }
 802
 803     /* VME output */
 804     gen75_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context);
 805     gen75_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
 806
 807     return VA_STATUS_SUCCESS;
 808 }
 809
 810 static void
 811 gen75_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx,
 812                                      struct encode_state *encode_state,
 813                                      int mb_width, int mb_height,
 814                                      int kernel,
 815                                      int transform_8x8_mode_flag,
 816                                      struct intel_encoder_context *encoder_context)
 817 {
 818     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 819     int mb_x = 0, mb_y = 0;
 820     int i, s, j;
 821     unsigned int *command_ptr;
 822
 823
 824     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
 825     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
 826
 827     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 828         VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer;
 829
 830         for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) {
 831             int slice_mb_begin = slice_param->macroblock_address;
 832             int slice_mb_number = slice_param->num_macroblocks;
 833             unsigned int mb_intra_ub;
 834             int slice_mb_x = slice_param->macroblock_address % mb_width;
 835
 836             for (i = 0; i < slice_mb_number;) {
 837                 int mb_count = i + slice_mb_begin;
 838
 839                 mb_x = mb_count % mb_width;
 840                 mb_y = mb_count / mb_width;
 841                 mb_intra_ub = 0;
 842
 843                 if (mb_x != 0) {
 844                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
 845                 }
 846
 847                 if (mb_y != 0) {
 848                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
 849
 850                     if (mb_x != 0)
 851                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
 852
 853                     if (mb_x != (mb_width -1))
 854                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 855                 }
 856
 857                 if (i < mb_width) {
 858                     if (i == 0)
 859                         mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
 860
 861                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
 862
 863                     if ((i == (mb_width - 1)) && slice_mb_x) {
 864                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
 865                     }
 866                 }
 867
 868                 if ((i == mb_width) && slice_mb_x) {
 869                     mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
 870                 }
 871
 872                 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
 873                 *command_ptr++ = kernel;
 874                 *command_ptr++ = 0;
 875                 *command_ptr++ = 0;
 876                 *command_ptr++ = 0;
 877                 *command_ptr++ = 0;
 878
 879                 /*inline data */
 880                 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
 881                 *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
 882
 883                 i += 1;
 884             }
 885
 886             slice_param++;
 887         }
 888     }
 889
 890     *command_ptr++ = 0;
 891     *command_ptr++ = MI_BATCH_BUFFER_END;
 892
 893     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
 894 }
 895
 896 static void
 897 gen75_vme_mpeg2_pipeline_programing(VADriverContextP ctx,
 898                                     struct encode_state *encode_state,
 899                                     int is_intra,
 900                                     struct intel_encoder_context *encoder_context)
 901 {
 902     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 903     struct intel_batchbuffer *batch = encoder_context->base.batch;
 904     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
 905     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
 906     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
 907
 908     gen75_vme_mpeg2_fill_vme_batchbuffer(ctx,
 909                                          encode_state,
 910                                          width_in_mbs, height_in_mbs,
 911                                          is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER,
 912                                          0,
 913                                          encoder_context);
 914
 915     intel_batchbuffer_start_atomic(batch, 0x1000);
 916     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
 917     BEGIN_BATCH(batch, 2);
 918     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
 919     OUT_RELOC(batch,
 920               vme_context->vme_batchbuffer.bo,
 921               I915_GEM_DOMAIN_COMMAND, 0,
 922               0);
 923     ADVANCE_BATCH(batch);
 924
 925     intel_batchbuffer_end_atomic(batch);
 926 }
 927
 928 static VAStatus
 929 gen75_vme_mpeg2_prepare(VADriverContextP ctx,
 930                         struct encode_state *encode_state,
 931                         struct intel_encoder_context *encoder_context)
 932 {
 933     VAStatus vaStatus = VA_STATUS_SUCCESS;
 934     VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
 935
 936     /*Setup all the memory object*/
 937     gen75_vme_mpeg2_surface_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 938     gen75_vme_interface_setup(ctx, encode_state, encoder_context);
 939     gen75_vme_vme_state_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 940     gen75_vme_constant_setup(ctx, encode_state, encoder_context);
 941
 942     /*Programing media pipeline*/
 943     gen75_vme_mpeg2_pipeline_programing(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
 944
 945     return vaStatus;
 946 }
 947
 948 static VAStatus
 949 gen75_vme_mpeg2_pipeline(VADriverContextP ctx,
 950                          VAProfile profile,
 951                          struct encode_state *encode_state,
 952                          struct intel_encoder_context *encoder_context)
 953 {
 954     gen75_vme_media_init(ctx, encoder_context);
 955     gen75_vme_mpeg2_prepare(ctx, encode_state, encoder_context);
 956     gen75_vme_run(ctx, encode_state, encoder_context);
 957     gen75_vme_stop(ctx, encode_state, encoder_context);
 958
 959     return VA_STATUS_SUCCESS;
 960 }
 961
 962 static void
 963 gen75_vme_context_destroy(void *context)
 964 {
 965     struct gen6_vme_context *vme_context = context;
 966
 967     i965_gpe_context_destroy(&vme_context->gpe_context);
 968
 969     dri_bo_unreference(vme_context->vme_output.bo);
 970     vme_context->vme_output.bo = NULL;
 971
 972     dri_bo_unreference(vme_context->vme_state.bo);
 973     vme_context->vme_state.bo = NULL;
 974
 975     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
 976     vme_context->vme_batchbuffer.bo = NULL;
 977
 978     if (vme_context->vme_state_message) {
 979         free(vme_context->vme_state_message);
 980         vme_context->vme_state_message = NULL;
 981     }
 982
 983     free(vme_context);
 984 }
 985
 986 Bool gen75_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
 987 {
 988     struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context));
 989     struct i965_kernel *vme_kernel_list = NULL;
 990         int i965_kernel_num;
 991
 992     switch (encoder_context->profile) {
 993     case VAProfileH264Baseline:
 994     case VAProfileH264Main:
 995     case VAProfileH264High:
 996         vme_kernel_list = gen75_vme_kernels;
 997         encoder_context->vme_pipeline = gen75_vme_pipeline;
 998         i965_kernel_num = sizeof(gen75_vme_kernels) / sizeof(struct i965_kernel);
 999         break;
1000
1001     case VAProfileMPEG2Simple:
1002     case VAProfileMPEG2Main:
1003         vme_kernel_list = gen75_vme_mpeg2_kernels;
1004         encoder_context->vme_pipeline = gen75_vme_mpeg2_pipeline;
1005         i965_kernel_num = sizeof(gen75_vme_mpeg2_kernels) / sizeof(struct i965_kernel);
1006
1007         break;
1008
1009     default:
1010         /* never get here */
1011         assert(0);
1012
1013         break;
1014     }
1015     vme_context->vme_kernel_sum = i965_kernel_num;
1016     vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
1017
1018     vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6;
1019     vme_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data);
1020
1021     vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH;
1022
1023     vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
1024     vme_context->gpe_context.vfe_state.num_urb_entries = 16;
1025     vme_context->gpe_context.vfe_state.gpgpu_mode = 0;
1026     vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1;
1027     vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1;
1028
1029     gen7_vme_scoreboard_init(ctx, vme_context);
1030
1031     i965_gpe_load_kernels(ctx,
1032                           &vme_context->gpe_context,
1033                           vme_kernel_list,
1034                           i965_kernel_num);
1035     vme_context->vme_surface2_setup = gen7_gpe_surface2_setup;
1036     vme_context->vme_media_rw_surface_setup = gen7_gpe_media_rw_surface_setup;
1037     vme_context->vme_buffer_suface_setup = gen7_gpe_buffer_suface_setup;
1038     vme_context->vme_media_chroma_surface_setup = gen75_gpe_media_chroma_surface_setup;
1039
1040     encoder_context->vme_context = vme_context;
1041     encoder_context->vme_context_destroy = gen75_vme_context_destroy;
1042
1043     vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int));
1044
1045     return True;
1046 }