BDW doesn't support H.264 Baseline profile
[platform/upstream/libva-intel-driver.git] / src / gen6_vme.h
1 /*
2  * Copyright © 2009 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the
6  * "Software"), to deal in the Software without restriction, including
7  * without limitation the rights to use, copy, modify, merge, publish,
8  * distribute, sub license, and/or sell copies of the Software, and to
9  * permit persons to whom the Software is furnished to do so, subject to
10  * the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the
13  * next paragraph) shall be included in all copies or substantial portions
14  * of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22  * SOFTWAR
23  *
24  * Authors:
25  *    Zhou Chang <chang.zhou@intel.com>
26  *
27  */
28
29 #ifndef _GEN6_VME_H_
30 #define _GEN6_VME_H_
31
32 #include <xf86drm.h>
33 #include <drm.h>
34 #include <i915_drm.h>
35 #include <intel_bufmgr.h>
36
37 #include "i965_gpe_utils.h"
38
39 #define INTRA_VME_OUTPUT_IN_BYTES       16      /* in bytes */
40 #define INTRA_VME_OUTPUT_IN_DWS         (INTRA_VME_OUTPUT_IN_BYTES / 4)
41 #define INTER_VME_OUTPUT_IN_BYTES       160     /* the first 128 bytes for MVs and the last 32 bytes for other info */
42 #define INTER_VME_OUTPUT_IN_DWS         (INTER_VME_OUTPUT_IN_BYTES / 4)
43
44 #define MAX_INTERFACE_DESC_GEN6         MAX_GPE_KERNELS
45 #define MAX_MEDIA_SURFACES_GEN6         34
46
47 #define GEN6_VME_KERNEL_NUMBER          3
48
49 struct encode_state;
50 struct intel_encoder_context;
51
52 struct gen6_vme_context
53 {
54     struct i965_gpe_context gpe_context;
55
56     struct {
57         dri_bo *bo;
58     } vme_state;
59
60     struct i965_buffer_surface vme_output;
61     struct i965_buffer_surface vme_batchbuffer;
62
63
64     void (*vme_surface2_setup)(VADriverContextP ctx,
65                                struct i965_gpe_context *gpe_context,
66                                struct object_surface *obj_surface,
67                                unsigned long binding_table_offset,
68                                unsigned long surface_state_offset);
69     void (*vme_media_rw_surface_setup)(VADriverContextP ctx,
70                                        struct i965_gpe_context *gpe_context,
71                                        struct object_surface *obj_surface,
72                                        unsigned long binding_table_offset,
73                                        unsigned long surface_state_offset);
74     void (*vme_buffer_suface_setup)(VADriverContextP ctx,
75                                     struct i965_gpe_context *gpe_context,
76                                     struct i965_buffer_surface *buffer_surface,
77                                     unsigned long binding_table_offset,
78                                     unsigned long surface_state_offset);
79     void (*vme_media_chroma_surface_setup)(VADriverContextP ctx,
80                                            struct i965_gpe_context *gpe_context,
81                                            struct object_surface *obj_surface,
82                                            unsigned long binding_table_offset,
83                                            unsigned long surface_state_offset);
84     void *vme_state_message;
85     unsigned int h264_level;
86     unsigned int video_coding_type;
87     unsigned int vme_kernel_sum;
88     unsigned int mpeg2_level;
89
90     struct object_surface *used_reference_objects[2];
91     void *used_references[2];
92     unsigned int ref_index_in_mb[2];
93 };
94
95 #define MPEG2_PIC_WIDTH_HEIGHT  30
96 #define MPEG2_MV_RANGE          29
97 #define MPEG2_LEVEL_MASK        0x0f
98 #define MPEG2_LEVEL_LOW         0x0a
99 #define MPEG2_LEVEL_MAIN        0x08
100 #define MPEG2_LEVEL_HIGH        0x04
101
102
103 Bool gen75_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context);
104
105 extern void intel_vme_update_mbmv_cost(VADriverContextP ctx,
106                                        struct encode_state *encode_state,
107                                        struct intel_encoder_context *encoder_context);
108
109 Bool gen7_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context);
110
111 #define         MODE_INTRA_NONPRED      0
112 #define         MODE_INTRA_16X16        1
113 #define         MODE_INTRA_8X8          2
114 #define         MODE_INTRA_4X4          3
115 #define         MODE_INTER_16X8         4
116 #define         MODE_INTER_8X16         4
117 #define         MODE_INTER_8X8          5
118 #define         MODE_INTER_8X4          6
119 #define         MODE_INTER_4X8          6
120 #define         MODE_INTER_4X4          7
121 #define         MODE_INTER_16X16        8
122 #define         MODE_INTER_BWD          9
123 #define         MODE_REFID_COST         10
124 #define         MODE_CHROMA_INTRA       11
125
126 #define         MODE_INTER_MV0          12
127 #define         MODE_INTER_MV1          13
128 #define         MODE_INTER_MV2          14
129
130 #define         MODE_INTER_MV3          15
131 #define         MODE_INTER_MV4          16
132 #define         MODE_INTER_MV5          17
133 #define         MODE_INTER_MV6          18
134 #define         MODE_INTER_MV7          19
135
136 #define         INTRA_PRED_AVAIL_FLAG_AE        0x60
137 #define         INTRA_PRED_AVAIL_FLAG_B         0x10
138 #define         INTRA_PRED_AVAIL_FLAG_C         0x8
139 #define         INTRA_PRED_AVAIL_FLAG_D         0x4
140 #define         INTRA_PRED_AVAIL_FLAG_BCD_MASK  0x1C
141
142 extern void
143 gen7_vme_walker_fill_vme_batchbuffer(VADriverContextP ctx, 
144                                      struct encode_state *encode_state,
145                                      int mb_width, int mb_height,
146                                      int kernel,
147                                      int transform_8x8_mode_flag,
148                                      struct intel_encoder_context *encoder_context);
149
150 extern void 
151 gen7_vme_scoreboard_init(VADriverContextP ctx, struct gen6_vme_context *vme_context);
152
153 extern void
154 intel_vme_mpeg2_state_setup(VADriverContextP ctx,
155                             struct encode_state *encode_state,
156                             struct intel_encoder_context *encoder_context);
157
158 extern void
159 gen7_vme_mpeg2_walker_fill_vme_batchbuffer(VADriverContextP ctx, 
160                                            struct encode_state *encode_state,
161                                            int mb_width, int mb_height,
162                                            int kernel,
163                                            struct intel_encoder_context *encoder_context);
164
165 void
166 intel_avc_vme_reference_state(VADriverContextP ctx,
167                               struct encode_state *encode_state,
168                               struct intel_encoder_context *encoder_context,
169                               int list_index,
170                               int surface_index,
171                               void (* vme_source_surface_state)(
172                                   VADriverContextP ctx,
173                                   int index,
174                                   struct object_surface *obj_surface,
175                                   struct intel_encoder_context *encoder_context));
176
177 extern Bool gen8_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context);
178 #endif /* _GEN6_VME_H_ */