src/gen6_vme.c

   1 /*
   2  * Copyright © 2010-2011 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Zhou Chang <chang.zhou@intel.com>
  26  *
  27  */
  28
  29 #include <stdio.h>
  30 #include <stdlib.h>
  31 #include <string.h>
  32 #include <assert.h>
  33
  34 #include "intel_batchbuffer.h"
  35 #include "intel_driver.h"
  36
  37 #include "i965_defines.h"
  38 #include "i965_drv_video.h"
  39 #include "i965_encoder.h"
  40 #include "gen6_vme.h"
  41 #include "gen6_mfc.h"
  42
  43 #define SURFACE_STATE_PADDED_SIZE               MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7)
  44 #define SURFACE_STATE_OFFSET(index)             (SURFACE_STATE_PADDED_SIZE * index)
  45 #define BINDING_TABLE_OFFSET(index)             (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index)
  46
  47 #define CURBE_ALLOCATION_SIZE   37              /* in 256-bit */
  48 #define CURBE_TOTAL_DATA_LENGTH (4 * 32)        /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */
  49 #define CURBE_URB_ENTRY_LENGTH  4               /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */
  50
  51 enum VIDEO_CODING_TYPE{
  52     VIDEO_CODING_AVC = 0,
  53     VIDEO_CODING_SUM
  54 };
  55
  56 enum AVC_VME_KERNEL_TYPE{
  57     AVC_VME_INTRA_SHADER = 0,
  58     AVC_VME_INTER_SHADER,
  59     AVC_VME_BATCHBUFFER,
  60     AVC_VME_KERNEL_SUM
  61 };
  62
  63 static const uint32_t gen6_vme_intra_frame[][4] = {
  64 #include "shaders/vme/intra_frame.g6b"
  65 };
  66
  67 static const uint32_t gen6_vme_inter_frame[][4] = {
  68 #include "shaders/vme/inter_frame.g6b"
  69 };
  70
  71 static const uint32_t gen6_vme_batchbuffer[][4] = {
  72 #include "shaders/vme/batchbuffer.g6b"
  73 };
  74
  75 static struct i965_kernel gen6_vme_kernels[] = {
  76     {
  77         "AVC VME Intra Frame",
  78         AVC_VME_INTRA_SHADER,                   /*index*/
  79         gen6_vme_intra_frame,
  80         sizeof(gen6_vme_intra_frame),
  81         NULL
  82     },
  83     {
  84         "AVC VME inter Frame",
  85         AVC_VME_INTER_SHADER,
  86         gen6_vme_inter_frame,
  87         sizeof(gen6_vme_inter_frame),
  88         NULL
  89     },
  90     {
  91         "AVC VME BATCHBUFFER",
  92         AVC_VME_BATCHBUFFER,
  93         gen6_vme_batchbuffer,
  94         sizeof(gen6_vme_batchbuffer),
  95         NULL
  96     },
  97 };
  98
  99 /* only used for VME source surface state */
 100 static void
 101 gen6_vme_source_surface_state(VADriverContextP ctx,
 102                               int index,
 103                               struct object_surface *obj_surface,
 104                               struct intel_encoder_context *encoder_context)
 105 {
 106     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 107
 108     vme_context->vme_surface2_setup(ctx,
 109                                     &vme_context->gpe_context,
 110                                     obj_surface,
 111                                     BINDING_TABLE_OFFSET(index),
 112                                     SURFACE_STATE_OFFSET(index));
 113 }
 114
 115 static void
 116 gen6_vme_media_source_surface_state(VADriverContextP ctx,
 117                                     int index,
 118                                     struct object_surface *obj_surface,
 119                                     struct intel_encoder_context *encoder_context)
 120 {
 121     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 122
 123     vme_context->vme_media_rw_surface_setup(ctx,
 124                                             &vme_context->gpe_context,
 125                                             obj_surface,
 126                                             BINDING_TABLE_OFFSET(index),
 127                                             SURFACE_STATE_OFFSET(index));
 128 }
 129
 130 static void
 131 gen6_vme_output_buffer_setup(VADriverContextP ctx,
 132                              struct encode_state *encode_state,
 133                              int index,
 134                              struct intel_encoder_context *encoder_context)
 135
 136 {
 137     struct i965_driver_data *i965 = i965_driver_data(ctx);
 138     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 139     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 140     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 141     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 142     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 143     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 144
 145     vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs;
 146     vme_context->vme_output.pitch = 16; /* in bytes, always 16 */
 147
 148     if (is_intra)
 149         vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES;
 150     else
 151         vme_context->vme_output.size_block = INTER_VME_OUTPUT_IN_BYTES;
 152
 153     vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
 154                                               "VME output buffer",
 155                                               vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
 156                                               0x1000);
 157     assert(vme_context->vme_output.bo);
 158     vme_context->vme_buffer_suface_setup(ctx,
 159                                          &vme_context->gpe_context,
 160                                          &vme_context->vme_output,
 161                                          BINDING_TABLE_OFFSET(index),
 162                                          SURFACE_STATE_OFFSET(index));
 163 }
 164
 165 static void
 166 gen6_vme_output_vme_batchbuffer_setup(VADriverContextP ctx,
 167                                       struct encode_state *encode_state,
 168                                       int index,
 169                                       struct intel_encoder_context *encoder_context)
 170
 171 {
 172     struct i965_driver_data *i965 = i965_driver_data(ctx);
 173     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 174     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 175     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 176     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 177
 178     vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
 179     vme_context->vme_batchbuffer.size_block = 32; /* 2 OWORDs */
 180     vme_context->vme_batchbuffer.pitch = 16;
 181     vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
 182                                                    "VME batchbuffer",
 183                                                    vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
 184                                                    0x1000);
 185     vme_context->vme_buffer_suface_setup(ctx,
 186                                          &vme_context->gpe_context,
 187                                          &vme_context->vme_batchbuffer,
 188                                          BINDING_TABLE_OFFSET(index),
 189                                          SURFACE_STATE_OFFSET(index));
 190 }
 191
 192 static VAStatus
 193 gen6_vme_surface_setup(VADriverContextP ctx,
 194                        struct encode_state *encode_state,
 195                        int is_intra,
 196                        struct intel_encoder_context *encoder_context)
 197 {
 198     struct object_surface *obj_surface;
 199
 200     /*Setup surfaces state*/
 201     /* current picture for encoding */
 202     obj_surface = encode_state->input_yuv_object;
 203     gen6_vme_source_surface_state(ctx, 0, obj_surface, encoder_context);
 204     gen6_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context);
 205
 206     if (!is_intra) {
 207         VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 208         int slice_type;
 209
 210         slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
 211         assert(slice_type != SLICE_TYPE_I && slice_type != SLICE_TYPE_SI);
 212
 213         intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 0, 1, gen6_vme_source_surface_state);
 214
 215         if (slice_type == SLICE_TYPE_B)
 216             intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 1, 2, gen6_vme_source_surface_state);
 217     }
 218
 219     /* VME output */
 220     gen6_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context);
 221     gen6_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
 222
 223     return VA_STATUS_SUCCESS;
 224 }
 225
 226 static VAStatus gen6_vme_interface_setup(VADriverContextP ctx,
 227                                          struct encode_state *encode_state,
 228                                          struct intel_encoder_context *encoder_context)
 229 {
 230     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 231     struct gen6_interface_descriptor_data *desc;
 232     int i;
 233     dri_bo *bo;
 234
 235     bo = vme_context->gpe_context.idrt.bo;
 236     dri_bo_map(bo, 1);
 237     assert(bo->virtual);
 238     desc = bo->virtual;
 239
 240     for (i = 0; i < vme_context->vme_kernel_sum; i++) {
 241         struct i965_kernel *kernel;
 242         kernel = &vme_context->gpe_context.kernels[i];
 243         assert(sizeof(*desc) == 32);
 244         /*Setup the descritor table*/
 245         memset(desc, 0, sizeof(*desc));
 246         desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6);
 247         desc->desc2.sampler_count = 1; /* FIXME: */
 248         desc->desc2.sampler_state_pointer = (vme_context->vme_state.bo->offset >> 5);
 249         desc->desc3.binding_table_entry_count = 1; /* FIXME: */
 250         desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5);
 251         desc->desc4.constant_urb_entry_read_offset = 0;
 252         desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH;
 253
 254         /*kernel start*/
 255         dri_bo_emit_reloc(bo,
 256                           I915_GEM_DOMAIN_INSTRUCTION, 0,
 257                           0,
 258                           i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0),
 259                           kernel->bo);
 260         /*Sampler State(VME state pointer)*/
 261         dri_bo_emit_reloc(bo,
 262                           I915_GEM_DOMAIN_INSTRUCTION, 0,
 263                           (1 << 2),                                                                     //
 264                           i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc2),
 265                           vme_context->vme_state.bo);
 266         desc++;
 267     }
 268     dri_bo_unmap(bo);
 269
 270     return VA_STATUS_SUCCESS;
 271 }
 272
 273 static VAStatus gen6_vme_constant_setup(VADriverContextP ctx,
 274                                         struct encode_state *encode_state,
 275                                         struct intel_encoder_context *encoder_context)
 276 {
 277     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 278     // unsigned char *constant_buffer;
 279     unsigned int *vme_state_message;
 280     int mv_num = 32;
 281     if (vme_context->h264_level >= 30) {
 282         mv_num = 16;
 283         if (vme_context->h264_level >= 31)
 284             mv_num = 8;
 285     }
 286
 287     dri_bo_map(vme_context->gpe_context.curbe.bo, 1);
 288     assert(vme_context->gpe_context.curbe.bo->virtual);
 289     // constant_buffer = vme_context->curbe.bo->virtual;
 290     vme_state_message = (unsigned int *)vme_context->gpe_context.curbe.bo->virtual;
 291     vme_state_message[31] = mv_num;
 292
 293     /*TODO copy buffer into CURB*/
 294
 295     dri_bo_unmap( vme_context->gpe_context.curbe.bo);
 296
 297     return VA_STATUS_SUCCESS;
 298 }
 299
 300 static const unsigned int intra_mb_mode_cost_table[] = {
 301     0x31110001, // for qp0
 302     0x09110001, // for qp1
 303     0x15030001, // for qp2
 304     0x0b030001, // for qp3
 305     0x0d030011, // for qp4
 306     0x17210011, // for qp5
 307     0x41210011, // for qp6
 308     0x19210011, // for qp7
 309     0x25050003, // for qp8
 310     0x1b130003, // for qp9
 311     0x1d130003, // for qp10
 312     0x27070021, // for qp11
 313     0x51310021, // for qp12
 314     0x29090021, // for qp13
 315     0x35150005, // for qp14
 316     0x2b0b0013, // for qp15
 317     0x2d0d0013, // for qp16
 318     0x37170007, // for qp17
 319     0x61410031, // for qp18
 320     0x39190009, // for qp19
 321     0x45250015, // for qp20
 322     0x3b1b000b, // for qp21
 323     0x3d1d000d, // for qp22
 324     0x47270017, // for qp23
 325     0x71510041, // for qp24 ! center for qp=0..30
 326     0x49290019, // for qp25
 327     0x55350025, // for qp26
 328     0x4b2b001b, // for qp27
 329     0x4d2d001d, // for qp28
 330     0x57370027, // for qp29
 331     0x81610051, // for qp30
 332     0x57270017, // for qp31
 333     0x81510041, // for qp32 ! center for qp=31..51
 334     0x59290019, // for qp33
 335     0x65350025, // for qp34
 336     0x5b2b001b, // for qp35
 337     0x5d2d001d, // for qp36
 338     0x67370027, // for qp37
 339     0x91610051, // for qp38
 340     0x69390029, // for qp39
 341     0x75450035, // for qp40
 342     0x6b3b002b, // for qp41
 343     0x6d3d002d, // for qp42
 344     0x77470037, // for qp43
 345     0xa1710061, // for qp44
 346     0x79490039, // for qp45
 347     0x85550045, // for qp46
 348     0x7b4b003b, // for qp47
 349     0x7d4d003d, // for qp48
 350     0x87570047, // for qp49
 351     0xb1810071, // for qp50
 352     0x89590049  // for qp51
 353 };
 354
 355 static void gen6_vme_state_setup_fixup(VADriverContextP ctx,
 356                                        struct encode_state *encode_state,
 357                                        struct intel_encoder_context *encoder_context,
 358                                        unsigned int *vme_state_message)
 359 {
 360     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
 361     VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 362     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 363
 364     if (slice_param->slice_type != SLICE_TYPE_I &&
 365         slice_param->slice_type != SLICE_TYPE_SI)
 366         return;
 367
 368     if (encoder_context->rate_control_mode == VA_RC_CQP)
 369         vme_state_message[16] = intra_mb_mode_cost_table[pic_param->pic_init_qp + slice_param->slice_qp_delta];
 370     else
 371         vme_state_message[16] = intra_mb_mode_cost_table[mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY];
 372 }
 373
 374 static VAStatus gen6_vme_vme_state_setup(VADriverContextP ctx,
 375                                          struct encode_state *encode_state,
 376                                          int is_intra,
 377                                          struct intel_encoder_context *encoder_context)
 378 {
 379     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 380     unsigned int *vme_state_message;
 381     int i;
 382
 383     //building VME state message
 384     dri_bo_map(vme_context->vme_state.bo, 1);
 385     assert(vme_context->vme_state.bo->virtual);
 386     vme_state_message = (unsigned int *)vme_context->vme_state.bo->virtual;
 387
 388     vme_state_message[0] = 0x01010101;
 389     vme_state_message[1] = 0x10010101;
 390     vme_state_message[2] = 0x0F0F0F0F;
 391     vme_state_message[3] = 0x100F0F0F;
 392     vme_state_message[4] = 0x01010101;
 393     vme_state_message[5] = 0x10010101;
 394     vme_state_message[6] = 0x0F0F0F0F;
 395     vme_state_message[7] = 0x100F0F0F;
 396     vme_state_message[8] = 0x01010101;
 397     vme_state_message[9] = 0x10010101;
 398     vme_state_message[10] = 0x0F0F0F0F;
 399     vme_state_message[11] = 0x000F0F0F;
 400     vme_state_message[12] = 0x00;
 401     vme_state_message[13] = 0x00;
 402
 403     vme_state_message[14] = 0x4a4a;
 404     vme_state_message[15] = 0x0;
 405     vme_state_message[16] = 0x4a4a4a4a;
 406     vme_state_message[17] = 0x4a4a4a4a;
 407     vme_state_message[18] = 0x21110100;
 408     vme_state_message[19] = 0x61514131;
 409
 410     for(i = 20; i < 32; i++) {
 411         vme_state_message[i] = 0;
 412     }
 413     //vme_state_message[16] = 0x42424242;                       //cost function LUT set 0 for Intra
 414
 415     gen6_vme_state_setup_fixup(ctx, encode_state, encoder_context, vme_state_message);
 416
 417     dri_bo_unmap( vme_context->vme_state.bo);
 418     return VA_STATUS_SUCCESS;
 419 }
 420
 421 static void
 422 gen6_vme_fill_vme_batchbuffer(VADriverContextP ctx,
 423                               struct encode_state *encode_state,
 424                               int mb_width, int mb_height,
 425                               int kernel,
 426                               int transform_8x8_mode_flag,
 427                               struct intel_encoder_context *encoder_context)
 428 {
 429     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 430     int number_mb_cmds;
 431     int mb_x = 0, mb_y = 0;
 432     int i, s;
 433     unsigned int *command_ptr;
 434
 435     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
 436     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
 437
 438     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
 439         VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
 440         int slice_mb_begin = pSliceParameter->macroblock_address;
 441         int slice_mb_number = pSliceParameter->num_macroblocks;
 442
 443         for (i = 0; i < slice_mb_number;  ) {
 444             int mb_count = i + slice_mb_begin;
 445             mb_x = mb_count % mb_width;
 446             mb_y = mb_count / mb_width;
 447             if( i == 0 ) {
 448                 number_mb_cmds = mb_width;          // we must mark the slice edge.
 449             } else if ( (i + 128 ) <= slice_mb_number) {
 450                 number_mb_cmds = 128;
 451             } else {
 452                 number_mb_cmds = slice_mb_number - i;
 453             }
 454
 455             *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
 456             *command_ptr++ = kernel;
 457             *command_ptr++ = 0;
 458             *command_ptr++ = 0;
 459             *command_ptr++ = 0;
 460             *command_ptr++ = 0;
 461
 462             /*inline data */
 463             *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
 464             *command_ptr++ = (number_mb_cmds << 16 | transform_8x8_mode_flag | ((i==0) << 1));
 465
 466             i += number_mb_cmds;
 467         }
 468     }
 469
 470     *command_ptr++ = 0;
 471     *command_ptr++ = MI_BATCH_BUFFER_END;
 472
 473     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
 474 }
 475
 476 static void gen6_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
 477 {
 478     struct i965_driver_data *i965 = i965_driver_data(ctx);
 479     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 480     dri_bo *bo;
 481
 482     i965_gpe_context_init(ctx, &vme_context->gpe_context);
 483
 484     /* VME output buffer */
 485     dri_bo_unreference(vme_context->vme_output.bo);
 486     vme_context->vme_output.bo = NULL;
 487
 488     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
 489     vme_context->vme_batchbuffer.bo = NULL;
 490
 491     /* VME state */
 492     dri_bo_unreference(vme_context->vme_state.bo);
 493     bo = dri_bo_alloc(i965->intel.bufmgr,
 494                       "Buffer",
 495                       1024*16, 64);
 496     assert(bo);
 497     vme_context->vme_state.bo = bo;
 498 }
 499
 500 static void gen6_vme_pipeline_programing(VADriverContextP ctx,
 501                                          struct encode_state *encode_state,
 502                                          struct intel_encoder_context *encoder_context)
 503 {
 504     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 505     struct intel_batchbuffer *batch = encoder_context->base.batch;
 506     VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
 507     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 508     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 509     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 510     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
 511     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 512
 513     gen6_vme_fill_vme_batchbuffer(ctx,
 514                                   encode_state,
 515                                   width_in_mbs, height_in_mbs,
 516                                   is_intra ? AVC_VME_INTRA_SHADER : AVC_VME_INTER_SHADER,
 517                                   pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
 518                                   encoder_context);
 519
 520     intel_batchbuffer_start_atomic(batch, 0x1000);
 521     gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
 522     BEGIN_BATCH(batch, 2);
 523     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
 524     OUT_RELOC(batch,
 525               vme_context->vme_batchbuffer.bo,
 526               I915_GEM_DOMAIN_COMMAND, 0,
 527               0);
 528     ADVANCE_BATCH(batch);
 529
 530     intel_batchbuffer_end_atomic(batch);
 531 }
 532
 533 static VAStatus gen6_vme_prepare(VADriverContextP ctx,
 534                                  struct encode_state *encode_state,
 535                                  struct intel_encoder_context *encoder_context)
 536 {
 537     VAStatus vaStatus = VA_STATUS_SUCCESS;
 538     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 539     int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
 540     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 541     struct gen6_vme_context *vme_context = encoder_context->vme_context;
 542
 543     if (!vme_context->h264_level ||
 544         (vme_context->h264_level != pSequenceParameter->level_idc)) {
 545         vme_context->h264_level = pSequenceParameter->level_idc;
 546     }
 547     /*Setup all the memory object*/
 548     gen6_vme_surface_setup(ctx, encode_state, is_intra, encoder_context);
 549     gen6_vme_interface_setup(ctx, encode_state, encoder_context);
 550     gen6_vme_constant_setup(ctx, encode_state, encoder_context);
 551     gen6_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context);
 552
 553     /*Programing media pipeline*/
 554     gen6_vme_pipeline_programing(ctx, encode_state, encoder_context);
 555
 556     return vaStatus;
 557 }
 558
 559 static VAStatus gen6_vme_run(VADriverContextP ctx,
 560                              struct encode_state *encode_state,
 561                              struct intel_encoder_context *encoder_context)
 562 {
 563     struct intel_batchbuffer *batch = encoder_context->base.batch;
 564
 565     intel_batchbuffer_flush(batch);
 566
 567     return VA_STATUS_SUCCESS;
 568 }
 569
 570 static VAStatus gen6_vme_stop(VADriverContextP ctx,
 571                               struct encode_state *encode_state,
 572                               struct intel_encoder_context *encoder_context)
 573 {
 574     return VA_STATUS_SUCCESS;
 575 }
 576
 577 static VAStatus
 578 gen6_vme_pipeline(VADriverContextP ctx,
 579                   VAProfile profile,
 580                   struct encode_state *encode_state,
 581                   struct intel_encoder_context *encoder_context)
 582 {
 583     gen6_vme_media_init(ctx, encoder_context);
 584     gen6_vme_prepare(ctx, encode_state, encoder_context);
 585     gen6_vme_run(ctx, encode_state, encoder_context);
 586     gen6_vme_stop(ctx, encode_state, encoder_context);
 587
 588     return VA_STATUS_SUCCESS;
 589 }
 590
 591 static void
 592 gen6_vme_context_destroy(void *context)
 593 {
 594     struct gen6_vme_context *vme_context = context;
 595
 596     i965_gpe_context_destroy(&vme_context->gpe_context);
 597
 598     dri_bo_unreference(vme_context->vme_output.bo);
 599     vme_context->vme_output.bo = NULL;
 600
 601     dri_bo_unreference(vme_context->vme_state.bo);
 602     vme_context->vme_state.bo = NULL;
 603
 604     dri_bo_unreference(vme_context->vme_batchbuffer.bo);
 605     vme_context->vme_batchbuffer.bo = NULL;
 606
 607     free(vme_context);
 608 }
 609
 610 Bool gen6_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
 611 {
 612     struct gen6_vme_context *vme_context = NULL;
 613
 614     if (encoder_context->codec != CODEC_H264) {
 615         /* Never get here */
 616         assert(0);
 617         return False;
 618     }
 619
 620     vme_context = calloc(1, sizeof(struct gen6_vme_context));
 621     vme_context->gpe_context.surface_state_binding_table.length =
 622         (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
 623
 624     vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6;
 625     vme_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data);
 626     vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH;
 627
 628     vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
 629     vme_context->gpe_context.vfe_state.num_urb_entries = 16;
 630     vme_context->gpe_context.vfe_state.gpgpu_mode = 0;
 631     vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1;
 632     vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1;
 633
 634     vme_context->video_coding_type = VIDEO_CODING_AVC;
 635     vme_context->vme_kernel_sum = AVC_VME_KERNEL_SUM;
 636     i965_gpe_load_kernels(ctx,
 637                           &vme_context->gpe_context,
 638                           gen6_vme_kernels,
 639                           vme_context->vme_kernel_sum);
 640
 641     encoder_context->vme_pipeline = gen6_vme_pipeline;
 642     vme_context->vme_surface2_setup = i965_gpe_surface2_setup;
 643     vme_context->vme_media_rw_surface_setup = i965_gpe_media_rw_surface_setup;
 644     vme_context->vme_buffer_suface_setup = i965_gpe_buffer_suface_setup;
 645
 646     encoder_context->vme_context = vme_context;
 647     encoder_context->vme_context_destroy = gen6_vme_context_destroy;
 648
 649     return True;
 650 }