src/gen6_mfc_common.c

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Xiang Haihao <haihao.xiang@intel.com>
  26  *    Zhao Yakui <yakui.zhao@intel.com>
  27  *
  28  */
  29
  30 #include <stdio.h>
  31 #include <stdlib.h>
  32 #include <string.h>
  33 #include <assert.h>
  34 #include <math.h>
  35
  36 #include "intel_batchbuffer.h"
  37 #include "i965_defines.h"
  38 #include "i965_structs.h"
  39 #include "i965_drv_video.h"
  40 #include "i965_encoder.h"
  41 #include "i965_encoder_utils.h"
  42 #include "gen6_mfc.h"
  43 #include "gen6_vme.h"
  44
  45
  46 #define BRC_CLIP(x, min, max) \
  47 { \
  48     x = ((x > (max)) ? (max) : ((x < (min)) ? (min) : x)); \
  49 }
  50
  51 #define BRC_P_B_QP_DIFF 4
  52 #define BRC_I_P_QP_DIFF 2
  53 #define BRC_I_B_QP_DIFF (BRC_I_P_QP_DIFF + BRC_P_B_QP_DIFF)
  54
  55 #define BRC_PWEIGHT 0.6  /* weight if P slice with comparison to I slice */
  56 #define BRC_BWEIGHT 0.25 /* weight if B slice with comparison to I slice */
  57
  58 #define BRC_QP_MAX_CHANGE 5 /* maximum qp modification */
  59 #define BRC_CY 0.1 /* weight for */
  60 #define BRC_CX_UNDERFLOW 5.
  61 #define BRC_CX_OVERFLOW -4.
  62
  63 #define BRC_PI_0_5 1.5707963267948966192313216916398
  64
  65 static void
  66 intel_mfc_bit_rate_control_context_init(struct encode_state *encode_state,
  67                                        struct gen6_mfc_context *mfc_context)
  68 {
  69     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
  70     int width_in_mbs = (mfc_context->surface_state.width + 15) / 16;
  71     int height_in_mbs = (mfc_context->surface_state.height + 15) / 16;
  72     float fps =  pSequenceParameter->time_scale * 0.5 / pSequenceParameter->num_units_in_tick ;
  73     int inter_mb_size = pSequenceParameter->bits_per_second * 1.0 / (fps+4.0) / width_in_mbs / height_in_mbs;
  74     int intra_mb_size = inter_mb_size * 5.0;
  75     int i;
  76
  77     mfc_context->bit_rate_control_context[SLICE_TYPE_I].target_mb_size = intra_mb_size;
  78     mfc_context->bit_rate_control_context[SLICE_TYPE_I].target_frame_size = intra_mb_size * width_in_mbs * height_in_mbs;
  79     mfc_context->bit_rate_control_context[SLICE_TYPE_P].target_mb_size = inter_mb_size;
  80     mfc_context->bit_rate_control_context[SLICE_TYPE_P].target_frame_size = inter_mb_size * width_in_mbs * height_in_mbs;
  81     mfc_context->bit_rate_control_context[SLICE_TYPE_B].target_mb_size = inter_mb_size;
  82     mfc_context->bit_rate_control_context[SLICE_TYPE_B].target_frame_size = inter_mb_size * width_in_mbs * height_in_mbs;
  83
  84     for(i = 0 ; i < 3; i++) {
  85         mfc_context->bit_rate_control_context[i].QpPrimeY = 26;
  86         mfc_context->bit_rate_control_context[i].MaxQpNegModifier = 6;
  87         mfc_context->bit_rate_control_context[i].MaxQpPosModifier = 6;
  88         mfc_context->bit_rate_control_context[i].GrowInit = 6;
  89         mfc_context->bit_rate_control_context[i].GrowResistance = 4;
  90         mfc_context->bit_rate_control_context[i].ShrinkInit = 6;
  91         mfc_context->bit_rate_control_context[i].ShrinkResistance = 4;
  92
  93         mfc_context->bit_rate_control_context[i].Correct[0] = 8;
  94         mfc_context->bit_rate_control_context[i].Correct[1] = 4;
  95         mfc_context->bit_rate_control_context[i].Correct[2] = 2;
  96         mfc_context->bit_rate_control_context[i].Correct[3] = 2;
  97         mfc_context->bit_rate_control_context[i].Correct[4] = 4;
  98         mfc_context->bit_rate_control_context[i].Correct[5] = 8;
  99     }
 100
 101     mfc_context->bit_rate_control_context[SLICE_TYPE_I].TargetSizeInWord = (intra_mb_size + 16)/ 16;
 102     mfc_context->bit_rate_control_context[SLICE_TYPE_P].TargetSizeInWord = (inter_mb_size + 16)/ 16;
 103     mfc_context->bit_rate_control_context[SLICE_TYPE_B].TargetSizeInWord = (inter_mb_size + 16)/ 16;
 104
 105     mfc_context->bit_rate_control_context[SLICE_TYPE_I].MaxSizeInWord = mfc_context->bit_rate_control_context[SLICE_TYPE_I].TargetSizeInWord * 1.5;
 106     mfc_context->bit_rate_control_context[SLICE_TYPE_P].MaxSizeInWord = mfc_context->bit_rate_control_context[SLICE_TYPE_P].TargetSizeInWord * 1.5;
 107     mfc_context->bit_rate_control_context[SLICE_TYPE_B].MaxSizeInWord = mfc_context->bit_rate_control_context[SLICE_TYPE_B].TargetSizeInWord * 1.5;
 108 }
 109
 110 static void intel_mfc_brc_init(struct encode_state *encode_state,
 111                   struct intel_encoder_context* encoder_context)
 112 {
 113     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
 114     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 115     VAEncMiscParameterBuffer* pMiscParamHRD = (VAEncMiscParameterBuffer*)encode_state->misc_param[VAEncMiscParameterTypeHRD]->buffer;
 116     VAEncMiscParameterHRD* pParameterHRD = (VAEncMiscParameterHRD*)pMiscParamHRD->data;
 117     double bitrate = pSequenceParameter->bits_per_second;
 118     double framerate = (double)pSequenceParameter->time_scale /(2 * (double)pSequenceParameter->num_units_in_tick);
 119     int inum = 1, pnum = 0, bnum = 0; /* Gop structure: number of I, P, B frames in the Gop. */
 120     int intra_period = pSequenceParameter->intra_period;
 121     int ip_period = pSequenceParameter->ip_period;
 122     double qp1_size = 0.1 * 8 * 3 * (pSequenceParameter->picture_width_in_mbs<<4) * (pSequenceParameter->picture_height_in_mbs<<4)/2;
 123     double qp51_size = 0.001 * 8 * 3 * (pSequenceParameter->picture_width_in_mbs<<4) * (pSequenceParameter->picture_height_in_mbs<<4)/2;
 124     double bpf;
 125
 126     if (pSequenceParameter->ip_period) {
 127         pnum = (intra_period + ip_period - 1)/ip_period - 1;
 128         bnum = intra_period - inum - pnum;
 129     }
 130
 131     mfc_context->brc.mode = encoder_context->rate_control_mode;
 132
 133     mfc_context->brc.target_frame_size[SLICE_TYPE_I] = (int)((double)((bitrate * intra_period)/framerate) /
 134                                                              (double)(inum + BRC_PWEIGHT * pnum + BRC_BWEIGHT * bnum));
 135     mfc_context->brc.target_frame_size[SLICE_TYPE_P] = BRC_PWEIGHT * mfc_context->brc.target_frame_size[SLICE_TYPE_I];
 136     mfc_context->brc.target_frame_size[SLICE_TYPE_B] = BRC_BWEIGHT * mfc_context->brc.target_frame_size[SLICE_TYPE_I];
 137
 138     mfc_context->brc.gop_nums[SLICE_TYPE_I] = inum;
 139     mfc_context->brc.gop_nums[SLICE_TYPE_P] = pnum;
 140     mfc_context->brc.gop_nums[SLICE_TYPE_B] = bnum;
 141
 142     bpf = mfc_context->brc.bits_per_frame = bitrate/framerate;
 143
 144     mfc_context->hrd.buffer_size = (double)pParameterHRD->buffer_size;
 145     mfc_context->hrd.current_buffer_fullness =
 146         (double)(pParameterHRD->initial_buffer_fullness < mfc_context->hrd.buffer_size)?
 147             pParameterHRD->initial_buffer_fullness: mfc_context->hrd.buffer_size/2.;
 148     mfc_context->hrd.target_buffer_fullness = (double)mfc_context->hrd.buffer_size/2.;
 149     mfc_context->hrd.buffer_capacity = (double)mfc_context->hrd.buffer_size/qp1_size;
 150     mfc_context->hrd.violation_noted = 0;
 151
 152     if ((bpf > qp51_size) && (bpf < qp1_size)) {
 153         mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY = 51 - 50*(bpf - qp51_size)/(qp1_size - qp51_size);
 154     }
 155     else if (bpf >= qp1_size)
 156         mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY = 1;
 157     else if (bpf <= qp51_size)
 158         mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY = 51;
 159
 160     mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY = mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY;
 161     mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY = mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY;
 162
 163     BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY, 1, 51);
 164     BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY, 1, 51);
 165     BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY, 1, 51);
 166 }
 167
 168 int intel_mfc_update_hrd(struct encode_state *encode_state,
 169                                struct gen6_mfc_context *mfc_context,
 170                                int frame_bits)
 171 {
 172     double prev_bf = mfc_context->hrd.current_buffer_fullness;
 173
 174     mfc_context->hrd.current_buffer_fullness -= frame_bits;
 175
 176     if (mfc_context->hrd.buffer_size > 0 && mfc_context->hrd.current_buffer_fullness <= 0.) {
 177         mfc_context->hrd.current_buffer_fullness = prev_bf;
 178         return BRC_UNDERFLOW;
 179     }
 180
 181     mfc_context->hrd.current_buffer_fullness += mfc_context->brc.bits_per_frame;
 182     if (mfc_context->hrd.buffer_size > 0 && mfc_context->hrd.current_buffer_fullness > mfc_context->hrd.buffer_size) {
 183         if (mfc_context->brc.mode == VA_RC_VBR)
 184             mfc_context->hrd.current_buffer_fullness = mfc_context->hrd.buffer_size;
 185         else {
 186             mfc_context->hrd.current_buffer_fullness = prev_bf;
 187             return BRC_OVERFLOW;
 188         }
 189     }
 190     return BRC_NO_HRD_VIOLATION;
 191 }
 192
 193 int intel_mfc_brc_postpack(struct encode_state *encode_state,
 194                                  struct gen6_mfc_context *mfc_context,
 195                                  int frame_bits)
 196 {
 197     gen6_brc_status sts = BRC_NO_HRD_VIOLATION;
 198     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
 199     int slicetype = pSliceParameter->slice_type;
 200     int qpi = mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY;
 201     int qpp = mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY;
 202     int qpb = mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY;
 203     int qp; // quantizer of previously encoded slice of current type
 204     int qpn; // predicted quantizer for next frame of current type in integer format
 205     double qpf; // predicted quantizer for next frame of current type in float format
 206     double delta_qp; // QP correction
 207     int target_frame_size, frame_size_next;
 208     /* Notes:
 209      *  x - how far we are from HRD buffer borders
 210      *  y - how far we are from target HRD buffer fullness
 211      */
 212     double x, y;
 213     double frame_size_alpha;
 214
 215     if (slicetype == SLICE_TYPE_SP)
 216         slicetype = SLICE_TYPE_P;
 217     else if (slicetype == SLICE_TYPE_SI)
 218         slicetype = SLICE_TYPE_I;
 219
 220     qp = mfc_context->bit_rate_control_context[slicetype].QpPrimeY;
 221
 222     target_frame_size = mfc_context->brc.target_frame_size[slicetype];
 223     if (mfc_context->hrd.buffer_capacity < 5)
 224         frame_size_alpha = 0;
 225     else
 226         frame_size_alpha = (double)mfc_context->brc.gop_nums[slicetype];
 227     if (frame_size_alpha > 30) frame_size_alpha = 30;
 228     frame_size_next = target_frame_size + (double)(target_frame_size - frame_bits) /
 229                                           (double)(frame_size_alpha + 1.);
 230
 231     /* frame_size_next: avoiding negative number and too small value */
 232     if ((double)frame_size_next < (double)(target_frame_size * 0.25))
 233         frame_size_next = (int)((double)target_frame_size * 0.25);
 234
 235     qpf = (double)qp * target_frame_size / frame_size_next;
 236     qpn = (int)(qpf + 0.5);
 237
 238     if (qpn == qp) {
 239         /* setting qpn we round qpf making mistakes: now we are trying to compensate this */
 240         mfc_context->brc.qpf_rounding_accumulator += qpf - qpn;
 241         if (mfc_context->brc.qpf_rounding_accumulator > 1.0) {
 242             qpn++;
 243             mfc_context->brc.qpf_rounding_accumulator = 0.;
 244         } else if (mfc_context->brc.qpf_rounding_accumulator < -1.0) {
 245             qpn--;
 246             mfc_context->brc.qpf_rounding_accumulator = 0.;
 247         }
 248     }
 249     /* making sure that QP is not changing too fast */
 250     if ((qpn - qp) > BRC_QP_MAX_CHANGE) qpn = qp + BRC_QP_MAX_CHANGE;
 251     else if ((qpn - qp) < -BRC_QP_MAX_CHANGE) qpn = qp - BRC_QP_MAX_CHANGE;
 252     /* making sure that with QP predictions we did do not leave QPs range */
 253     BRC_CLIP(qpn, 1, 51);
 254
 255     /* checking wthether HRD compliance is still met */
 256     sts = intel_mfc_update_hrd(encode_state, mfc_context, frame_bits);
 257
 258     /* calculating QP delta as some function*/
 259     x = mfc_context->hrd.target_buffer_fullness - mfc_context->hrd.current_buffer_fullness;
 260     if (x > 0) {
 261         x /= mfc_context->hrd.target_buffer_fullness;
 262         y = mfc_context->hrd.current_buffer_fullness;
 263     }
 264     else {
 265         x /= (mfc_context->hrd.buffer_size - mfc_context->hrd.target_buffer_fullness);
 266         y = mfc_context->hrd.buffer_size - mfc_context->hrd.current_buffer_fullness;
 267     }
 268     if (y < 0.01) y = 0.01;
 269     if (x > 1) x = 1;
 270     else if (x < -1) x = -1;
 271
 272     delta_qp = BRC_QP_MAX_CHANGE*exp(-1/y)*sin(BRC_PI_0_5 * x);
 273     qpn = (int)(qpn + delta_qp + 0.5);
 274
 275     /* making sure that with QP predictions we did do not leave QPs range */
 276     BRC_CLIP(qpn, 1, 51);
 277
 278     if (sts == BRC_NO_HRD_VIOLATION) { // no HRD violation
 279         /* correcting QPs of slices of other types */
 280         if (slicetype == SLICE_TYPE_P) {
 281             if (abs(qpn + BRC_P_B_QP_DIFF - qpb) > 2)
 282                 mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY += (qpn + BRC_P_B_QP_DIFF - qpb) >> 1;
 283             if (abs(qpn - BRC_I_P_QP_DIFF - qpi) > 2)
 284                 mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY += (qpn - BRC_I_P_QP_DIFF - qpi) >> 1;
 285         } else if (slicetype == SLICE_TYPE_I) {
 286             if (abs(qpn + BRC_I_B_QP_DIFF - qpb) > 4)
 287                 mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY += (qpn + BRC_I_B_QP_DIFF - qpb) >> 2;
 288             if (abs(qpn + BRC_I_P_QP_DIFF - qpp) > 2)
 289                 mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY += (qpn + BRC_I_P_QP_DIFF - qpp) >> 2;
 290         } else { // SLICE_TYPE_B
 291             if (abs(qpn - BRC_P_B_QP_DIFF - qpp) > 2)
 292                 mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY += (qpn - BRC_P_B_QP_DIFF - qpp) >> 1;
 293             if (abs(qpn - BRC_I_B_QP_DIFF - qpi) > 4)
 294                 mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY += (qpn - BRC_I_B_QP_DIFF - qpi) >> 2;
 295         }
 296         BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY, 1, 51);
 297         BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY, 1, 51);
 298         BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY, 1, 51);
 299     } else if (sts == BRC_UNDERFLOW) { // underflow
 300         if (qpn <= qp) qpn = qp + 1;
 301         if (qpn > 51) {
 302             qpn = 51;
 303             sts = BRC_UNDERFLOW_WITH_MAX_QP; //underflow with maxQP
 304         }
 305     } else if (sts == BRC_OVERFLOW) {
 306         if (qpn >= qp) qpn = qp - 1;
 307         if (qpn < 1) { // < 0 (?) overflow with minQP
 308             qpn = 1;
 309             sts = BRC_OVERFLOW_WITH_MIN_QP; // bit stuffing to be done
 310         }
 311     }
 312
 313     mfc_context->bit_rate_control_context[slicetype].QpPrimeY = qpn;
 314
 315     return sts;
 316 }
 317
 318 static void intel_mfc_hrd_context_init(struct encode_state *encode_state,
 319                           struct intel_encoder_context *encoder_context)
 320 {
 321     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
 322     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
 323     unsigned int rate_control_mode = encoder_context->rate_control_mode;
 324     int target_bit_rate = pSequenceParameter->bits_per_second;
 325
 326     // current we only support CBR mode.
 327     if (rate_control_mode == VA_RC_CBR) {
 328         mfc_context->vui_hrd.i_bit_rate_value = target_bit_rate >> 10;
 329         mfc_context->vui_hrd.i_cpb_size_value = (target_bit_rate * 8) >> 10;
 330         mfc_context->vui_hrd.i_initial_cpb_removal_delay = mfc_context->vui_hrd.i_cpb_size_value * 0.5 * 1024 / target_bit_rate * 90000;
 331         mfc_context->vui_hrd.i_cpb_removal_delay = 2;
 332         mfc_context->vui_hrd.i_frame_number = 0;
 333
 334         mfc_context->vui_hrd.i_initial_cpb_removal_delay_length = 24;
 335         mfc_context->vui_hrd.i_cpb_removal_delay_length = 24;
 336         mfc_context->vui_hrd.i_dpb_output_delay_length = 24;
 337     }
 338
 339 }
 340
 341 void
 342 intel_mfc_hrd_context_update(struct encode_state *encode_state,
 343                           struct gen6_mfc_context *mfc_context)
 344 {
 345     mfc_context->vui_hrd.i_frame_number++;
 346 }
 347
 348 int intel_mfc_interlace_check(VADriverContextP ctx,
 349                    struct encode_state *encode_state,
 350                    struct intel_encoder_context *encoder_context)
 351 {
 352     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
 353     VAEncSliceParameterBufferH264 *pSliceParameter;
 354     int i;
 355     int mbCount = 0;
 356     int width_in_mbs = (mfc_context->surface_state.width + 15) / 16;
 357     int height_in_mbs = (mfc_context->surface_state.height + 15) / 16;
 358
 359     for (i = 0; i < encode_state->num_slice_params_ext; i++) {
 360         pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[i]->buffer;
 361         mbCount += pSliceParameter->num_macroblocks;
 362     }
 363
 364     if ( mbCount == ( width_in_mbs * height_in_mbs ) )
 365         return 0;
 366
 367     return 1;
 368 }
 369
 370 void intel_mfc_brc_prepare(struct encode_state *encode_state,
 371                           struct intel_encoder_context *encoder_context)
 372 {
 373     unsigned int rate_control_mode = encoder_context->rate_control_mode;
 374     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
 375
 376     if (rate_control_mode == VA_RC_CBR) {
 377         /*Programing bit rate control */
 378         if ( mfc_context->bit_rate_control_context[SLICE_TYPE_I].MaxSizeInWord == 0 ) {
 379             intel_mfc_bit_rate_control_context_init(encode_state, mfc_context);
 380             intel_mfc_brc_init(encode_state, encoder_context);
 381         }
 382
 383         /*Programing HRD control */
 384         if ( mfc_context->vui_hrd.i_cpb_size_value == 0 )
 385             intel_mfc_hrd_context_init(encode_state, encoder_context);
 386     }
 387 }
 388
 389 void intel_mfc_avc_pipeline_header_programing(VADriverContextP ctx,
 390                                                     struct encode_state *encode_state,
 391                                                     struct intel_encoder_context *encoder_context,
 392                                                     struct intel_batchbuffer *slice_batch)
 393 {
 394     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
 395     int idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_SPS);
 396
 397     if (encode_state->packed_header_data[idx]) {
 398         VAEncPackedHeaderParameterBuffer *param = NULL;
 399         unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer;
 400         unsigned int length_in_bits;
 401
 402         assert(encode_state->packed_header_param[idx]);
 403         param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer;
 404         length_in_bits = param->bit_length;
 405
 406         mfc_context->insert_object(ctx,
 407                                    encoder_context,
 408                                    header_data,
 409                                    ALIGN(length_in_bits, 32) >> 5,
 410                                    length_in_bits & 0x1f,
 411                                    5,   /* FIXME: check it */
 412                                    0,
 413                                    0,
 414                                    !param->has_emulation_bytes,
 415                                    slice_batch);
 416     }
 417
 418     idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_PPS);
 419
 420     if (encode_state->packed_header_data[idx]) {
 421         VAEncPackedHeaderParameterBuffer *param = NULL;
 422         unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer;
 423         unsigned int length_in_bits;
 424
 425         assert(encode_state->packed_header_param[idx]);
 426         param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer;
 427         length_in_bits = param->bit_length;
 428
 429         mfc_context->insert_object(ctx,
 430                                    encoder_context,
 431                                    header_data,
 432                                    ALIGN(length_in_bits, 32) >> 5,
 433                                    length_in_bits & 0x1f,
 434                                    5, /* FIXME: check it */
 435                                    0,
 436                                    0,
 437                                    !param->has_emulation_bytes,
 438                                    slice_batch);
 439     }
 440
 441     idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_SEI);
 442
 443     if (encode_state->packed_header_data[idx]) {
 444         VAEncPackedHeaderParameterBuffer *param = NULL;
 445         unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer;
 446         unsigned int length_in_bits;
 447
 448         assert(encode_state->packed_header_param[idx]);
 449         param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer;
 450         length_in_bits = param->bit_length;
 451
 452         mfc_context->insert_object(ctx,
 453                                    encoder_context,
 454                                    header_data,
 455                                    ALIGN(length_in_bits, 32) >> 5,
 456                                    length_in_bits & 0x1f,
 457                                    5, /* FIXME: check it */
 458                                    0,
 459                                    0,
 460                                    !param->has_emulation_bytes,
 461                                    slice_batch);
 462     }
 463 }
 464