2 * Copyright © 2009 Corbin Simpson
3 * Copyright © 2011 Marek Olšák <maraeo@gmail.com>
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
16 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
18 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 * The above copyright notice and this permission notice (including the
24 * next paragraph) shall be included in all copies or substantial portions
29 * Corbin Simpson <MostAwesomeDude@gmail.com>
30 * Joakim Sindholt <opensource@zhasha.com>
31 * Marek Olšák <maraeo@gmail.com>
34 #include "radeon_drm_bo.h"
35 #include "radeon_drm_cs.h"
36 #include "radeon_drm_public.h"
38 #include "pipebuffer/pb_bufmgr.h"
39 #include "util/u_memory.h"
44 #ifndef RADEON_INFO_WANT_HYPERZ
45 #define RADEON_INFO_WANT_HYPERZ 7
47 #ifndef RADEON_INFO_WANT_CMASK
48 #define RADEON_INFO_WANT_CMASK 8
51 /* Enable/disable feature access for one command stream.
52 * If enable == TRUE, return TRUE on success.
53 * Otherwise, return FALSE.
55 * We basically do the same thing kernel does, because we have to deal
56 * with multiple contexts (here command streams) backed by one winsys. */
57 static boolean radeon_set_fd_access(struct radeon_drm_cs *applier,
58 struct radeon_drm_cs **owner,
60 unsigned request, boolean enable)
62 struct drm_radeon_info info = {0};
63 unsigned value = enable ? 1 : 0;
65 pipe_mutex_lock(*mutex);
67 /* Early exit if we are sure the request will fail. */
70 pipe_mutex_unlock(*mutex);
74 if (*owner != applier) {
75 pipe_mutex_unlock(*mutex);
80 /* Pass through the request to the kernel. */
81 info.value = (unsigned long)&value;
82 info.request = request;
83 if (drmCommandWriteRead(applier->ws->fd, DRM_RADEON_INFO,
84 &info, sizeof(info)) != 0) {
85 pipe_mutex_unlock(*mutex);
89 /* Update the rights in the winsys. */
93 fprintf(stderr, "radeon: Acquired Hyper-Z.\n");
94 pipe_mutex_unlock(*mutex);
99 fprintf(stderr, "radeon: Released Hyper-Z.\n");
102 pipe_mutex_unlock(*mutex);
106 /* Helper function to do the ioctls needed for setup and init. */
107 static void do_ioctls(struct radeon_drm_winsys *winsys)
109 struct drm_radeon_gem_info gem_info = {0};
110 struct drm_radeon_info info = {0};
113 drmVersionPtr version;
115 info.value = (unsigned long)⌖
117 /* We do things in a specific order here.
119 * DRM version first. We need to be sure we're running on a KMS chipset.
120 * This is also for some features.
122 * Then, the PCI ID. This is essential and should return usable numbers
123 * for all Radeons. If this fails, we probably got handed an FD for some
126 * The GB and Z pipe requests should always succeed, but they might not
127 * return sensical values for all chipsets, but that's alright because
128 * the pipe drivers already know that.
130 * The GEM info is actually bogus on the kernel side, as well as our side
131 * (see radeon_gem_info_ioctl in radeon_gem.c) but that's alright because
132 * we don't actually use the info for anything yet. */
134 version = drmGetVersion(winsys->fd);
135 if (version->version_major != 2 ||
136 version->version_minor < 3) {
137 fprintf(stderr, "%s: DRM version is %d.%d.%d but this driver is "
138 "only compatible with 2.3.x (kernel 2.6.34) and later.\n",
140 version->version_major,
141 version->version_minor,
142 version->version_patchlevel);
143 drmFreeVersion(version);
147 winsys->drm_major = version->version_major;
148 winsys->drm_minor = version->version_minor;
149 winsys->drm_patchlevel = version->version_patchlevel;
151 info.request = RADEON_INFO_DEVICE_ID;
152 retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_INFO, &info, sizeof(info));
154 fprintf(stderr, "%s: Failed to get PCI ID, "
155 "error number %d\n", __FUNCTION__, retval);
158 winsys->pci_id = target;
160 info.request = RADEON_INFO_NUM_GB_PIPES;
161 retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_INFO, &info, sizeof(info));
163 fprintf(stderr, "%s: Failed to get GB pipe count, "
164 "error number %d\n", __FUNCTION__, retval);
167 winsys->gb_pipes = target;
169 info.request = RADEON_INFO_NUM_Z_PIPES;
170 retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_INFO, &info, sizeof(info));
172 fprintf(stderr, "%s: Failed to get Z pipe count, "
173 "error number %d\n", __FUNCTION__, retval);
176 winsys->z_pipes = target;
178 retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_GEM_INFO,
179 &gem_info, sizeof(gem_info));
181 fprintf(stderr, "%s: Failed to get MM info, error number %d\n",
182 __FUNCTION__, retval);
185 winsys->gart_size = gem_info.gart_size;
186 winsys->vram_size = gem_info.vram_size;
188 drmFreeVersion(version);
190 winsys->num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
193 static void radeon_winsys_destroy(struct radeon_winsys *rws)
195 struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
197 pipe_mutex_destroy(ws->hyperz_owner_mutex);
198 pipe_mutex_destroy(ws->cmask_owner_mutex);
200 ws->cman->destroy(ws->cman);
201 ws->kman->destroy(ws->kman);
205 static uint32_t radeon_get_value(struct radeon_winsys *rws,
206 enum radeon_value_id id)
208 struct radeon_drm_winsys *ws = (struct radeon_drm_winsys *)rws;
211 case RADEON_VID_PCI_ID:
213 case RADEON_VID_R300_GB_PIPES:
215 case RADEON_VID_R300_Z_PIPES:
217 case RADEON_VID_GART_SIZE:
218 return ws->gart_size;
219 case RADEON_VID_VRAM_SIZE:
220 return ws->vram_size;
221 case RADEON_VID_DRM_MAJOR:
222 return ws->drm_major;
223 case RADEON_VID_DRM_MINOR:
224 return ws->drm_minor;
225 case RADEON_VID_DRM_PATCHLEVEL:
226 return ws->drm_patchlevel;
227 case RADEON_VID_DRM_2_6_0:
228 return ws->drm_major*100 + ws->drm_minor >= 206;
229 case RADEON_VID_DRM_2_8_0:
230 return ws->drm_major*100 + ws->drm_minor >= 208;
235 static boolean radeon_cs_request_feature(struct radeon_winsys_cs *rcs,
236 enum radeon_feature_id fid,
239 struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
242 case RADEON_FID_HYPERZ_RAM_ACCESS:
243 if (debug_get_bool_option("RADEON_HYPERZ", FALSE)) {
244 return radeon_set_fd_access(cs, &cs->ws->hyperz_owner,
245 &cs->ws->hyperz_owner_mutex,
246 RADEON_INFO_WANT_HYPERZ, enable);
251 case RADEON_FID_CMASK_RAM_ACCESS:
252 if (debug_get_bool_option("RADEON_CMASK", FALSE)) {
253 return radeon_set_fd_access(cs, &cs->ws->cmask_owner,
254 &cs->ws->cmask_owner_mutex,
255 RADEON_INFO_WANT_CMASK, enable);
263 struct radeon_winsys *radeon_drm_winsys_create(int fd)
265 struct radeon_drm_winsys *ws = CALLOC_STRUCT(radeon_drm_winsys);
273 switch (ws->pci_id) {
274 #define CHIPSET(pci_id, name, family) case pci_id:
275 #include "pci_ids/r300_pci_ids.h"
282 /* Create managers. */
283 ws->kman = radeon_bomgr_create(ws);
286 ws->cman = pb_cache_manager_create(ws->kman, 1000000);
291 ws->base.destroy = radeon_winsys_destroy;
292 ws->base.get_value = radeon_get_value;
293 ws->base.cs_request_feature = radeon_cs_request_feature;
295 radeon_bomgr_init_functions(ws);
296 radeon_drm_cs_init_functions(ws);
298 pipe_mutex_init(ws->hyperz_owner_mutex);
299 pipe_mutex_init(ws->cmask_owner_mutex);
305 ws->cman->destroy(ws->cman);
307 ws->kman->destroy(ws->kman);