2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
33 #include <util/u_double_list.h>
34 #include <util/u_inlines.h>
35 #include "util/u_hash_table.h"
36 #include <os/os_thread.h>
39 #define PKT_COUNT_C 0xC000FFFF
40 #define PKT_COUNT_S(x) (((x) & 0x3FFF) << 16)
50 enum chip_class chip_class;
51 struct r600_tiling_info tiling_info;
52 struct r600_bomgr *bomgr;
55 struct r600_bo *fence_bo;
56 unsigned clock_crystal_freq;
57 unsigned num_backends;
58 unsigned num_tile_pipes;
60 boolean backend_map_valid;
61 unsigned minor_version;
63 /* List of buffer handles and its mutex. */
64 struct util_hash_table *bo_handles;
65 pipe_mutex bo_handles_mutex;
68 /* these flags are used in register flags and added into block flags */
69 #define REG_FLAG_NEED_BO 1
70 #define REG_FLAG_DIRTY_ALWAYS 2
71 #define REG_FLAG_RV6XX_SBU 4
72 #define REG_FLAG_NOT_R600 8
73 #define REG_FLAG_ENABLE_ALWAYS 16
74 #define BLOCK_FLAG_RESOURCE 32
75 #define REG_FLAG_FLUSH_CHANGE 64
84 #define BO_BOUND_TEXTURE 1
86 struct pipe_reference reference;
92 struct list_head fencedlist;
94 struct r600_context *ctx;
96 struct r600_reloc *reloc;
104 struct pipe_reference reference; /* this must be the first member for the r600_bo_reference inline to work */
105 /* DO NOT MOVE THIS ^ */
107 unsigned tiling_flags;
108 unsigned kernel_pitch;
110 struct radeon_bo *bo;
113 struct list_head list;
122 struct radeon *radeon;
125 struct list_head delayed;
126 unsigned num_delayed;
132 struct radeon *r600_new(int fd, unsigned device);
133 void r600_delete(struct radeon *r600);
138 unsigned radeon_family_from_device(unsigned device);
143 struct radeon_bo *radeon_bo(struct radeon *radeon, unsigned handle,
144 unsigned size, unsigned alignment, unsigned initial_domain);
145 void radeon_bo_reference(struct radeon *radeon, struct radeon_bo **dst,
146 struct radeon_bo *src);
147 int radeon_bo_wait(struct radeon *radeon, struct radeon_bo *bo);
148 int radeon_bo_busy(struct radeon *radeon, struct radeon_bo *bo, uint32_t *domain);
149 int radeon_bo_fencelist(struct radeon *radeon, struct radeon_bo **bolist, uint32_t num_bo);
150 int radeon_bo_get_tiling_flags(struct radeon *radeon,
151 struct radeon_bo *bo,
152 uint32_t *tiling_flags,
154 int radeon_bo_get_name(struct radeon *radeon,
155 struct radeon_bo *bo,
157 int radeon_bo_fixed_map(struct radeon *radeon, struct radeon_bo *bo);
162 int r600_context_init_fence(struct r600_context *ctx);
163 void r600_context_get_reloc(struct r600_context *ctx, struct r600_bo *rbo);
164 void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags,
165 unsigned flush_mask, struct r600_bo *rbo);
166 struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset);
167 int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg,
168 unsigned opcode, unsigned offset_base);
169 void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, struct r600_block *block);
170 void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block);
171 void r600_context_block_resource_emit_dirty(struct r600_context *ctx, struct r600_block *block);
172 void r600_context_dirty_block(struct r600_context *ctx, struct r600_block *block,
173 int dirty, int index);
174 int r600_setup_block_table(struct r600_context *ctx);
175 void r600_context_reg(struct r600_context *ctx,
176 unsigned offset, unsigned value,
178 void r600_init_cs(struct r600_context *ctx);
179 int r600_resource_init(struct r600_context *ctx, struct r600_range *range, unsigned offset, unsigned nblocks, unsigned stride, struct r600_reg *reg, int nreg, unsigned offset_base);
181 static INLINE void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct r600_bo *rbo)
183 struct radeon_bo *bo = rbo->bo;
188 r600_context_get_reloc(ctx, rbo);
190 /* set PKT3 to point to proper reloc */
197 void r600_bo_destroy(struct radeon *radeon, struct r600_bo *bo);
202 struct r600_bomgr *r600_bomgr_create(struct radeon *radeon, unsigned usecs);
203 void r600_bomgr_destroy(struct r600_bomgr *mgr);
204 boolean r600_bomgr_bo_destroy(struct r600_bomgr *mgr, struct r600_bo *bo);
205 void r600_bomgr_bo_init(struct r600_bomgr *mgr, struct r600_bo *bo);
206 struct r600_bo *r600_bomgr_bo_create(struct r600_bomgr *mgr,
220 static inline int radeon_bo_map(struct radeon *radeon, struct radeon_bo *bo)
222 if (bo->map_count == 0 && !bo->data)
223 return radeon_bo_fixed_map(radeon, bo);
228 static inline void radeon_bo_unmap(struct radeon *radeon, struct radeon_bo *bo)
231 assert(bo->map_count >= 0);
237 static inline boolean fence_is_after(unsigned fence, unsigned ofence)
239 /* handle wrap around */
240 if (fence < 0x80000000 && ofence > 0x80000000)