1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
26 #include "util/u_inlines.h"
27 #include "pipe/p_defines.h"
28 #include "util/u_math.h"
30 #include "svga_sampler_view.h"
31 #include "svga_winsys.h"
32 #include "svga_context.h"
33 #include "svga_state.h"
37 void svga_cleanup_tss_binding(struct svga_context *svga)
40 unsigned count = MAX2( svga->curr.num_sampler_views,
41 svga->state.hw_draw.num_views );
43 for (i = 0; i < count; i++) {
44 struct svga_hw_view_state *view = &svga->state.hw_draw.views[i];
46 svga_sampler_view_reference(&view->v, NULL);
47 pipe_sampler_view_reference( &svga->curr.sampler_views[i], NULL );
48 pipe_resource_reference( &view->texture, NULL );
58 struct svga_hw_view_state *view;
59 } bind[PIPE_MAX_SAMPLERS];
66 update_tss_binding(struct svga_context *svga,
69 boolean reemit = svga->rebind.texture_samplers;
71 unsigned count = MAX2( svga->curr.num_sampler_views,
72 svga->state.hw_draw.num_views );
76 struct bind_queue queue;
80 for (i = 0; i < count; i++) {
81 const struct svga_sampler_state *s = svga->curr.sampler[i];
82 struct svga_hw_view_state *view = &svga->state.hw_draw.views[i];
83 struct pipe_resource *texture = NULL;
86 if (svga->curr.sampler_views[i]) {
87 min_lod = MAX2(s->view_min_lod, 0);
88 max_lod = MIN2(s->view_max_lod, svga->curr.sampler_views[i]->texture->last_level);
89 texture = svga->curr.sampler_views[i]->texture;
95 if (view->texture != texture ||
96 view->min_lod != min_lod ||
97 view->max_lod != max_lod) {
99 svga_sampler_view_reference(&view->v, NULL);
100 pipe_resource_reference( &view->texture, texture );
103 view->min_lod = min_lod;
104 view->max_lod = max_lod;
107 view->v = svga_get_tex_sampler_view(&svga->pipe,
114 * We need to reemit non-null texture bindings, even when they are not
115 * dirty, to ensure that the resources are paged in.
119 (reemit && view->v)) {
120 queue.bind[queue.bind_count].unit = i;
121 queue.bind[queue.bind_count].view = view;
124 if (!view->dirty && view->v) {
125 svga_validate_sampler_view(svga, view->v);
129 svga->state.hw_draw.num_views = svga->curr.num_sampler_views;
131 if (queue.bind_count) {
132 SVGA3dTextureState *ts;
134 if (SVGA3D_BeginSetTextureState( svga->swc,
136 queue.bind_count ) != PIPE_OK)
139 for (i = 0; i < queue.bind_count; i++) {
140 struct svga_winsys_surface *handle;
142 ts[i].stage = queue.bind[i].unit;
143 ts[i].name = SVGA3D_TS_BIND_TEXTURE;
145 if (queue.bind[i].view->v) {
146 handle = queue.bind[i].view->v->handle;
151 svga->swc->surface_relocation(svga->swc,
156 queue.bind[i].view->dirty = FALSE;
159 SVGA_FIFOCommitAll( svga->swc );
162 svga->rebind.texture_samplers = FALSE;
167 return PIPE_ERROR_OUT_OF_MEMORY;
174 * Similar to update_tss_binding, but without any state checking/update.
176 * Called at the beginning of every new command buffer to ensure that
177 * non-dirty textures are properly paged-in.
180 svga_reemit_tss_bindings(struct svga_context *svga)
184 struct bind_queue queue;
186 assert(svga->rebind.texture_samplers);
188 queue.bind_count = 0;
190 for (i = 0; i < svga->state.hw_draw.num_views; i++) {
191 struct svga_hw_view_state *view = &svga->state.hw_draw.views[i];
194 queue.bind[queue.bind_count].unit = i;
195 queue.bind[queue.bind_count].view = view;
200 if (queue.bind_count) {
201 SVGA3dTextureState *ts;
203 ret = SVGA3D_BeginSetTextureState(svga->swc,
206 if (ret != PIPE_OK) {
210 for (i = 0; i < queue.bind_count; i++) {
211 struct svga_winsys_surface *handle;
213 ts[i].stage = queue.bind[i].unit;
214 ts[i].name = SVGA3D_TS_BIND_TEXTURE;
216 assert(queue.bind[i].view->v);
217 handle = queue.bind[i].view->v->handle;
218 svga->swc->surface_relocation(svga->swc,
224 SVGA_FIFOCommitAll(svga->swc);
227 svga->rebind.texture_samplers = FALSE;
233 struct svga_tracked_state svga_hw_tss_binding = {
234 "texture binding emit",
235 SVGA_NEW_TEXTURE_BINDING |
241 /***********************************************************************
246 SVGA3dTextureState ts[PIPE_MAX_SAMPLERS*SVGA3D_TS_MAX];
250 #define EMIT_TS(svga, unit, val, token, fail) \
252 if (svga->state.hw_draw.ts[unit][SVGA3D_TS_##token] != val) { \
253 svga_queue_tss( &queue, unit, SVGA3D_TS_##token, val ); \
254 svga->state.hw_draw.ts[unit][SVGA3D_TS_##token] = val; \
258 #define EMIT_TS_FLOAT(svga, unit, fvalue, token, fail) \
260 unsigned val = fui(fvalue); \
261 if (svga->state.hw_draw.ts[unit][SVGA3D_TS_##token] != val) { \
262 svga_queue_tss( &queue, unit, SVGA3D_TS_##token, val ); \
263 svga->state.hw_draw.ts[unit][SVGA3D_TS_##token] = val; \
269 svga_queue_tss( struct ts_queue *q,
274 assert(q->ts_count < sizeof(q->ts)/sizeof(q->ts[0]));
275 q->ts[q->ts_count].stage = unit;
276 q->ts[q->ts_count].name = tss;
277 q->ts[q->ts_count].value = value;
283 update_tss(struct svga_context *svga,
287 struct ts_queue queue;
290 for (i = 0; i < svga->curr.num_samplers; i++) {
291 if (svga->curr.sampler[i]) {
292 const struct svga_sampler_state *curr = svga->curr.sampler[i];
294 EMIT_TS(svga, i, curr->mipfilter, MIPFILTER, fail);
295 EMIT_TS(svga, i, curr->min_lod, TEXTURE_MIPMAP_LEVEL, fail);
296 EMIT_TS(svga, i, curr->magfilter, MAGFILTER, fail);
297 EMIT_TS(svga, i, curr->minfilter, MINFILTER, fail);
298 EMIT_TS(svga, i, curr->aniso_level, TEXTURE_ANISOTROPIC_LEVEL, fail);
299 EMIT_TS_FLOAT(svga, i, curr->lod_bias, TEXTURE_LOD_BIAS, fail);
300 EMIT_TS(svga, i, curr->addressu, ADDRESSU, fail);
301 EMIT_TS(svga, i, curr->addressw, ADDRESSW, fail);
302 EMIT_TS(svga, i, curr->bordercolor, BORDERCOLOR, fail);
303 // TEXCOORDINDEX -- hopefully not needed
305 if (svga->curr.tex_flags.flag_1d & (1 << i)) {
306 EMIT_TS(svga, i, SVGA3D_TEX_ADDRESS_WRAP, ADDRESSV, fail);
309 EMIT_TS(svga, i, curr->addressv, ADDRESSV, fail);
311 if (svga->curr.tex_flags.flag_srgb & (1 << i))
312 EMIT_TS_FLOAT(svga, i, 2.2f, GAMMA, fail);
314 EMIT_TS_FLOAT(svga, i, 1.0f, GAMMA, fail);
319 if (queue.ts_count) {
320 SVGA3dTextureState *ts;
322 if (SVGA3D_BeginSetTextureState( svga->swc,
324 queue.ts_count ) != PIPE_OK)
329 queue.ts_count * sizeof queue.ts[0]);
331 SVGA_FIFOCommitAll( svga->swc );
337 /* XXX: need to poison cached hardware state on failure to ensure
338 * dirty state gets re-emitted. Fix this by re-instating partial
339 * FIFOCommit command and only updating cached hw state once the
340 * initial allocation has succeeded.
342 memset(svga->state.hw_draw.ts, 0xcd, sizeof(svga->state.hw_draw.ts));
344 return PIPE_ERROR_OUT_OF_MEMORY;
348 struct svga_tracked_state svga_hw_tss = {
349 "texture state emit",
351 SVGA_NEW_TEXTURE_FLAGS),