1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "util/u_format.h"
33 #include "util/u_math.h"
34 #include "util/u_memory.h"
36 #include "svga_screen.h"
37 #include "svga_context.h"
38 #include "svga_resource_texture.h"
39 #include "svga_resource_buffer.h"
40 #include "svga_sampler_view.h"
41 #include "svga_winsys.h"
42 #include "svga_debug.h"
44 #include <util/u_string.h>
47 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
48 * know about primary surfaces. Find a better way to accomplish this.
50 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
54 svga_texture_is_referenced( struct pipe_context *pipe,
55 struct pipe_resource *texture,
56 unsigned face, unsigned level)
58 struct svga_texture *tex = svga_texture(texture);
59 struct svga_screen *ss = svga_screen(pipe->screen);
62 * The screen does not cache texture writes.
65 if (!tex->handle || ss->sws->surface_is_flushed(ss->sws, tex->handle))
66 return PIPE_UNREFERENCED;
69 * sws->surface_is_flushed() does not distinguish between read references
70 * and write references. So assume a reference is both.
73 return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
79 * Helper function and arrays
83 svga_translate_format(enum pipe_format format)
87 case PIPE_FORMAT_B8G8R8A8_UNORM:
88 return SVGA3D_A8R8G8B8;
89 case PIPE_FORMAT_B8G8R8X8_UNORM:
90 return SVGA3D_X8R8G8B8;
92 /* Required for GL2.1:
94 case PIPE_FORMAT_B8G8R8A8_SRGB:
95 return SVGA3D_A8R8G8B8;
97 case PIPE_FORMAT_B5G6R5_UNORM:
99 case PIPE_FORMAT_B5G5R5A1_UNORM:
100 return SVGA3D_A1R5G5B5;
101 case PIPE_FORMAT_B4G4R4A4_UNORM:
102 return SVGA3D_A4R4G4B4;
105 /* XXX: Doesn't seem to work properly.
106 case PIPE_FORMAT_Z32_UNORM:
109 case PIPE_FORMAT_Z16_UNORM:
111 case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
112 return SVGA3D_Z_D24S8;
113 case PIPE_FORMAT_X8Z24_UNORM:
114 return SVGA3D_Z_D24X8;
116 case PIPE_FORMAT_A8_UNORM:
117 return SVGA3D_ALPHA8;
118 case PIPE_FORMAT_L8_UNORM:
119 return SVGA3D_LUMINANCE8;
121 case PIPE_FORMAT_DXT1_RGB:
122 case PIPE_FORMAT_DXT1_RGBA:
124 case PIPE_FORMAT_DXT3_RGBA:
126 case PIPE_FORMAT_DXT5_RGBA:
130 return SVGA3D_FORMAT_INVALID;
136 svga_translate_format_render(enum pipe_format format)
139 case PIPE_FORMAT_B8G8R8A8_UNORM:
140 case PIPE_FORMAT_B8G8R8X8_UNORM:
141 case PIPE_FORMAT_B5G5R5A1_UNORM:
142 case PIPE_FORMAT_B4G4R4A4_UNORM:
143 case PIPE_FORMAT_B5G6R5_UNORM:
144 case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
145 case PIPE_FORMAT_X8Z24_UNORM:
146 case PIPE_FORMAT_Z32_UNORM:
147 case PIPE_FORMAT_Z16_UNORM:
148 case PIPE_FORMAT_L8_UNORM:
149 return svga_translate_format(format);
152 /* For on host conversion */
153 case PIPE_FORMAT_DXT1_RGB:
154 return SVGA3D_X8R8G8B8;
155 case PIPE_FORMAT_DXT1_RGBA:
156 case PIPE_FORMAT_DXT3_RGBA:
157 case PIPE_FORMAT_DXT5_RGBA:
158 return SVGA3D_A8R8G8B8;
162 return SVGA3D_FORMAT_INVALID;
168 svga_transfer_dma_band(struct svga_transfer *st,
169 SVGA3dTransferType transfer,
170 unsigned y, unsigned h, unsigned srcy)
172 struct svga_texture *texture = svga_texture(st->base.resource);
173 struct svga_screen *screen = svga_screen(texture->b.b.screen);
177 SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
178 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
184 st->base.box.x + st->base.box.width,
187 util_format_get_blocksize(texture->b.b.format) * 8 /
188 (util_format_get_blockwidth(texture->b.b.format)*util_format_get_blockheight(texture->b.b.format)));
190 box.x = st->base.box.x;
192 box.z = st->base.box.z;
193 box.w = st->base.box.width;
200 pipe_mutex_lock(screen->swc_mutex);
201 ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1);
203 screen->swc->flush(screen->swc, NULL);
204 ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1);
205 assert(ret == PIPE_OK);
207 pipe_mutex_unlock(screen->swc_mutex);
212 svga_transfer_dma(struct svga_transfer *st,
213 SVGA3dTransferType transfer)
215 struct svga_texture *texture = svga_texture(st->base.resource);
216 struct svga_screen *screen = svga_screen(texture->b.b.screen);
217 struct svga_winsys_screen *sws = screen->sws;
218 struct pipe_fence_handle *fence = NULL;
220 if (transfer == SVGA3D_READ_HOST_VRAM) {
221 SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
226 /* Do the DMA transfer in a single go */
228 svga_transfer_dma_band(st, transfer, st->base.box.y, st->base.box.height, 0);
230 if(transfer == SVGA3D_READ_HOST_VRAM) {
231 svga_screen_flush(screen, &fence);
232 sws->fence_finish(sws, fence, 0);
233 sws->fence_reference(sws, &fence, NULL);
238 unsigned blockheight = util_format_get_blockheight(st->base.resource->format);
239 h = st->hw_nblocksy * blockheight;
241 for(y = 0; y < st->base.box.height; y += h) {
242 unsigned offset, length;
245 if (y + h > st->base.box.height)
246 h = st->base.box.height - y;
248 /* Transfer band must be aligned to pixel block boundaries */
249 assert(y % blockheight == 0);
250 assert(h % blockheight == 0);
252 offset = y * st->base.stride / blockheight;
253 length = h * st->base.stride / blockheight;
255 sw = (uint8_t *)st->swbuf + offset;
257 if(transfer == SVGA3D_WRITE_HOST_VRAM) {
258 /* Wait for the previous DMAs to complete */
259 /* TODO: keep one DMA (at half the size) in the background */
261 svga_screen_flush(screen, &fence);
262 sws->fence_finish(sws, fence, 0);
263 sws->fence_reference(sws, &fence, NULL);
266 hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_WRITE);
269 memcpy(hw, sw, length);
270 sws->buffer_unmap(sws, st->hwbuf);
274 svga_transfer_dma_band(st, transfer, y, h, srcy);
276 if(transfer == SVGA3D_READ_HOST_VRAM) {
277 svga_screen_flush(screen, &fence);
278 sws->fence_finish(sws, fence, 0);
280 hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
283 memcpy(sw, hw, length);
284 sws->buffer_unmap(sws, st->hwbuf);
296 svga_texture_get_handle(struct pipe_screen *screen,
297 struct pipe_resource *texture,
298 struct winsys_handle *whandle)
300 struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
303 assert(svga_texture(texture)->key.cachable == 0);
304 svga_texture(texture)->key.cachable = 0;
305 stride = util_format_get_nblocksx(texture->format, texture->width0) *
306 util_format_get_blocksize(texture->format);
307 return sws->surface_get_handle(sws, svga_texture(texture)->handle, stride, whandle);
312 svga_texture_destroy(struct pipe_screen *screen,
313 struct pipe_resource *pt)
315 struct svga_screen *ss = svga_screen(screen);
316 struct svga_texture *tex = (struct svga_texture *)pt;
318 ss->texture_timestamp++;
320 svga_sampler_view_reference(&tex->cached_view, NULL);
323 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
325 SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
326 svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
337 /* XXX: Still implementing this as if it was a screen function, but
338 * can now modify it to queue transfers on the context.
340 static struct pipe_transfer *
341 svga_texture_get_transfer(struct pipe_context *pipe,
342 struct pipe_resource *texture,
343 struct pipe_subresource sr,
345 const struct pipe_box *box)
347 struct svga_screen *ss = svga_screen(pipe->screen);
348 struct svga_winsys_screen *sws = ss->sws;
349 struct svga_transfer *st;
350 unsigned nblocksx = util_format_get_nblocksx(texture->format, box->width);
351 unsigned nblocksy = util_format_get_nblocksy(texture->format, box->height);
353 /* We can't map texture storage directly */
354 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
357 st = CALLOC_STRUCT(svga_transfer);
361 pipe_resource_reference(&st->base.resource, texture);
363 st->base.usage = usage;
365 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
366 st->base.slice_stride = 0;
368 st->hw_nblocksy = nblocksy;
370 st->hwbuf = svga_winsys_buffer_create(ss,
373 st->hw_nblocksy*st->base.stride);
374 while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
375 st->hwbuf = svga_winsys_buffer_create(ss,
378 st->hw_nblocksy*st->base.stride);
384 if(st->hw_nblocksy < nblocksy) {
385 /* We couldn't allocate a hardware buffer big enough for the transfer,
386 * so allocate regular malloc memory instead */
387 debug_printf("%s: failed to allocate %u KB of DMA, splitting into %u x %u KB DMA transfers\n",
389 (nblocksy*st->base.stride + 1023)/1024,
390 (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
391 (st->hw_nblocksy*st->base.stride + 1023)/1024);
392 st->swbuf = MALLOC(nblocksy*st->base.stride);
397 if (usage & PIPE_TRANSFER_READ)
398 svga_transfer_dma(st, SVGA3D_READ_HOST_VRAM);
403 sws->buffer_destroy(sws, st->hwbuf);
410 /* XXX: Still implementing this as if it was a screen function, but
411 * can now modify it to queue transfers on the context.
414 svga_texture_transfer_map( struct pipe_context *pipe,
415 struct pipe_transfer *transfer )
417 struct svga_screen *ss = svga_screen(pipe->screen);
418 struct svga_winsys_screen *sws = ss->sws;
419 struct svga_transfer *st = svga_transfer(transfer);
424 /* The wait for read transfers already happened when svga_transfer_dma
426 return sws->buffer_map(sws, st->hwbuf, transfer->usage);
430 /* XXX: Still implementing this as if it was a screen function, but
431 * can now modify it to queue transfers on the context.
434 svga_texture_transfer_unmap(struct pipe_context *pipe,
435 struct pipe_transfer *transfer)
437 struct svga_screen *ss = svga_screen(pipe->screen);
438 struct svga_winsys_screen *sws = ss->sws;
439 struct svga_transfer *st = svga_transfer(transfer);
442 sws->buffer_unmap(sws, st->hwbuf);
447 svga_texture_transfer_destroy(struct pipe_context *pipe,
448 struct pipe_transfer *transfer)
450 struct svga_texture *tex = svga_texture(transfer->resource);
451 struct svga_screen *ss = svga_screen(pipe->screen);
452 struct svga_winsys_screen *sws = ss->sws;
453 struct svga_transfer *st = svga_transfer(transfer);
455 if (st->base.usage & PIPE_TRANSFER_WRITE) {
456 svga_transfer_dma(st, SVGA3D_WRITE_HOST_VRAM);
457 ss->texture_timestamp++;
458 tex->view_age[transfer->sr.level] = ++(tex->age);
459 tex->defined[transfer->sr.face][transfer->sr.level] = TRUE;
462 pipe_resource_reference(&st->base.resource, NULL);
464 sws->buffer_destroy(sws, st->hwbuf);
472 struct u_resource_vtbl svga_texture_vtbl =
474 svga_texture_get_handle, /* get_handle */
475 svga_texture_destroy, /* resource_destroy */
476 svga_texture_is_referenced, /* is_resource_referenced */
477 svga_texture_get_transfer, /* get_transfer */
478 svga_texture_transfer_destroy, /* transfer_destroy */
479 svga_texture_transfer_map, /* transfer_map */
480 u_default_transfer_flush_region, /* transfer_flush_region */
481 svga_texture_transfer_unmap, /* transfer_unmap */
482 u_default_transfer_inline_write /* transfer_inline_write */
488 struct pipe_resource *
489 svga_texture_create(struct pipe_screen *screen,
490 const struct pipe_resource *template)
492 struct svga_screen *svgascreen = svga_screen(screen);
493 struct svga_texture *tex = CALLOC_STRUCT(svga_texture);
498 tex->b.b = *template;
499 tex->b.vtbl = &svga_texture_vtbl;
500 pipe_reference_init(&tex->b.b.reference, 1);
501 tex->b.b.screen = screen;
503 assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
504 if(template->last_level >= SVGA_MAX_TEXTURE_LEVELS)
508 tex->key.size.width = template->width0;
509 tex->key.size.height = template->height0;
510 tex->key.size.depth = template->depth0;
512 if(template->target == PIPE_TEXTURE_CUBE) {
513 tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
514 tex->key.numFaces = 6;
517 tex->key.numFaces = 1;
520 tex->key.cachable = 1;
522 if (template->bind & PIPE_BIND_SAMPLER_VIEW)
523 tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
525 if (template->bind & PIPE_BIND_DISPLAY_TARGET) {
526 tex->key.cachable = 0;
529 if (template->bind & PIPE_BIND_SHARED) {
530 tex->key.cachable = 0;
533 if (template->bind & PIPE_BIND_SCANOUT) {
534 tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT;
535 tex->key.cachable = 0;
539 * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
540 * know beforehand whether a texture will be used as a rendertarget or not
541 * and it always requests PIPE_BIND_RENDER_TARGET, therefore
542 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
545 if((template->bind & PIPE_BIND_RENDER_TARGET) &&
546 !util_format_is_s3tc(template->format))
547 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
550 if(template->bind & PIPE_BIND_DEPTH_STENCIL)
551 tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
553 tex->key.numMipLevels = template->last_level + 1;
555 tex->key.format = svga_translate_format(template->format);
556 if(tex->key.format == SVGA3D_FORMAT_INVALID)
559 SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
560 tex->handle = svga_screen_surface_create(svgascreen, &tex->key);
562 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle);
575 struct pipe_resource *
576 svga_texture_from_handle(struct pipe_screen *screen,
577 const struct pipe_resource *template,
578 struct winsys_handle *whandle)
580 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
581 struct svga_winsys_surface *srf;
582 struct svga_texture *tex;
583 enum SVGA3dSurfaceFormat format = 0;
586 /* Only supports one type */
587 if (template->target != PIPE_TEXTURE_2D ||
588 template->last_level != 0 ||
589 template->depth0 != 1) {
593 srf = sws->surface_from_handle(sws, whandle, &format);
598 if (svga_translate_format(template->format) != format) {
599 unsigned f1 = svga_translate_format(template->format);
600 unsigned f2 = format;
602 /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
603 if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
604 (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
605 (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) {
606 debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
611 tex = CALLOC_STRUCT(svga_texture);
615 tex->b.b = *template;
616 tex->b.vtbl = &svga_texture_vtbl;
617 pipe_reference_init(&tex->b.b.reference, 1);
618 tex->b.b.screen = screen;
620 if (format == SVGA3D_X8R8G8B8)
621 tex->b.b.format = PIPE_FORMAT_B8G8R8X8_UNORM;
622 else if (format == SVGA3D_A8R8G8B8)
623 tex->b.b.format = PIPE_FORMAT_B8G8R8A8_UNORM;
628 SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
630 tex->key.cachable = 0;