1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
35 #include "svga_context.h"
36 #include "svga_screen.h"
37 #include "svga_resource_buffer.h"
38 #include "svga_resource_buffer_upload.h"
39 #include "svga_winsys.h"
40 #include "svga_debug.h"
43 /* Allocate a winsys_buffer (ie. DMA, aka GMR memory).
45 struct svga_winsys_buffer *
46 svga_winsys_buffer_create( struct svga_screen *ss,
51 struct svga_winsys_screen *sws = ss->sws;
52 struct svga_winsys_buffer *buf;
55 buf = sws->buffer_create(sws, alignment, usage, size);
58 SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "flushing screen to find %d bytes GMR\n",
61 /* Try flushing all pending DMAs */
62 svga_screen_flush(ss, NULL);
63 buf = sws->buffer_create(sws, alignment, usage, size);
72 svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf)
74 struct svga_winsys_screen *sws = ss->sws;
76 assert(!sbuf->map.count);
79 sws->buffer_destroy(sws, sbuf->hwbuf);
87 * Allocate DMA'ble storage for the buffer.
89 * Called before mapping a buffer.
92 svga_buffer_create_hw_storage(struct svga_screen *ss,
93 struct svga_buffer *sbuf)
98 unsigned alignment = 16;
100 unsigned size = sbuf->b.b.width0;
102 sbuf->hwbuf = svga_winsys_buffer_create(ss, alignment, usage, size);
104 return PIPE_ERROR_OUT_OF_MEMORY;
106 assert(!sbuf->dma.pending);
115 svga_buffer_create_host_surface(struct svga_screen *ss,
116 struct svga_buffer *sbuf)
121 sbuf->key.format = SVGA3D_BUFFER;
122 if(sbuf->b.b.bind & PIPE_BIND_VERTEX_BUFFER)
123 sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER;
124 if(sbuf->b.b.bind & PIPE_BIND_INDEX_BUFFER)
125 sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER;
127 sbuf->key.size.width = sbuf->b.b.width0;
128 sbuf->key.size.height = 1;
129 sbuf->key.size.depth = 1;
131 sbuf->key.numFaces = 1;
132 sbuf->key.numMipLevels = 1;
133 sbuf->key.cachable = 1;
135 SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n", sbuf->b.b.width0);
137 sbuf->handle = svga_screen_surface_create(ss, &sbuf->key);
139 return PIPE_ERROR_OUT_OF_MEMORY;
141 /* Always set the discard flag on the first time the buffer is written
142 * as svga_screen_surface_create might have passed a recycled host
145 sbuf->dma.flags.discard = TRUE;
147 SVGA_DBG(DEBUG_DMA, " --> got sid %p sz %d (buffer)\n", sbuf->handle, sbuf->b.b.width0);
155 svga_buffer_destroy_host_surface(struct svga_screen *ss,
156 struct svga_buffer *sbuf)
159 SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n", sbuf->handle, sbuf->b.b.width0);
160 svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle);
166 * Variant of SVGA3D_BufferDMA which leaves the copy box temporarily in blank.
168 static enum pipe_error
169 svga_buffer_upload_command(struct svga_context *svga,
170 struct svga_buffer *sbuf)
172 struct svga_winsys_context *swc = svga->swc;
173 struct svga_winsys_buffer *guest = sbuf->hwbuf;
174 struct svga_winsys_surface *host = sbuf->handle;
175 SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
176 SVGA3dCmdSurfaceDMA *cmd;
177 uint32 numBoxes = sbuf->map.num_ranges;
178 SVGA3dCopyBox *boxes;
179 SVGA3dCmdSurfaceDMASuffix *pSuffix;
180 unsigned region_flags;
181 unsigned surface_flags;
182 struct pipe_resource *dummy;
184 if(transfer == SVGA3D_WRITE_HOST_VRAM) {
185 region_flags = SVGA_RELOC_READ;
186 surface_flags = SVGA_RELOC_WRITE;
188 else if(transfer == SVGA3D_READ_HOST_VRAM) {
189 region_flags = SVGA_RELOC_WRITE;
190 surface_flags = SVGA_RELOC_READ;
194 return PIPE_ERROR_BAD_INPUT;
199 cmd = SVGA3D_FIFOReserve(swc,
200 SVGA_3D_CMD_SURFACE_DMA,
201 sizeof *cmd + numBoxes * sizeof *boxes + sizeof *pSuffix,
204 return PIPE_ERROR_OUT_OF_MEMORY;
206 swc->region_relocation(swc, &cmd->guest.ptr, guest, 0, region_flags);
207 cmd->guest.pitch = 0;
209 swc->surface_relocation(swc, &cmd->host.sid, host, surface_flags);
211 cmd->host.mipmap = 0;
213 cmd->transfer = transfer;
215 sbuf->dma.boxes = (SVGA3dCopyBox *)&cmd[1];
216 sbuf->dma.svga = svga;
218 /* Increment reference count */
220 pipe_resource_reference(&dummy, &sbuf->b.b);
222 pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + numBoxes * sizeof *boxes);
223 pSuffix->suffixSize = sizeof *pSuffix;
224 pSuffix->maximumOffset = sbuf->b.b.width0;
225 pSuffix->flags = sbuf->dma.flags;
227 SVGA_FIFOCommitAll(swc);
229 sbuf->dma.flags.discard = FALSE;
236 * Patch up the upload DMA command reserved by svga_buffer_upload_command
237 * with the final ranges.
240 svga_buffer_upload_flush(struct svga_context *svga,
241 struct svga_buffer *sbuf)
243 SVGA3dCopyBox *boxes;
246 assert(sbuf->handle);
248 assert(sbuf->map.num_ranges);
249 assert(sbuf->dma.svga == svga);
250 assert(sbuf->dma.boxes);
253 * Patch the DMA command with the final copy box.
256 SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
258 boxes = sbuf->dma.boxes;
259 for(i = 0; i < sbuf->map.num_ranges; ++i) {
260 SVGA_DBG(DEBUG_DMA, " bytes %u - %u\n",
261 sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
263 boxes[i].x = sbuf->map.ranges[i].start;
266 boxes[i].w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
269 boxes[i].srcx = sbuf->map.ranges[i].start;
274 sbuf->map.num_ranges = 0;
276 assert(sbuf->head.prev && sbuf->head.next);
277 LIST_DEL(&sbuf->head);
279 sbuf->head.next = sbuf->head.prev = NULL;
281 sbuf->dma.pending = FALSE;
283 sbuf->dma.svga = NULL;
284 sbuf->dma.boxes = NULL;
286 /* Decrement reference count */
287 pipe_reference(&(sbuf->b.b.reference), NULL);
294 * Note a dirty range.
296 * This function only notes the range down. It doesn't actually emit a DMA
297 * upload command. That only happens when a context tries to refer to this
298 * buffer, and the DMA upload command is added to that context's command buffer.
300 * We try to lump as many contiguous DMA transfers together as possible.
303 svga_buffer_add_range(struct svga_buffer *sbuf,
308 unsigned nearest_range;
309 unsigned nearest_dist;
313 if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
314 nearest_range = sbuf->map.num_ranges;
317 nearest_range = SVGA_BUFFER_MAX_RANGES - 1;
322 * Try to grow one of the ranges.
324 * Note that it is not this function task to care about overlapping ranges,
325 * as the GMR was already given so it is too late to do anything. Situations
326 * where overlapping ranges may pose a problem should be detected via
327 * pipe_context::is_resource_referenced and the context that refers to the
328 * buffer should be flushed.
331 for(i = 0; i < sbuf->map.num_ranges; ++i) {
336 left_dist = start - sbuf->map.ranges[i].end;
337 right_dist = sbuf->map.ranges[i].start - end;
338 dist = MAX2(left_dist, right_dist);
342 * Ranges are contiguous or overlapping -- extend this one and return.
345 sbuf->map.ranges[i].start = MIN2(sbuf->map.ranges[i].start, start);
346 sbuf->map.ranges[i].end = MAX2(sbuf->map.ranges[i].end, end);
351 * Discontiguous ranges -- keep track of the nearest range.
354 if (dist < nearest_dist) {
362 * We cannot add a new range to an existing DMA command, so patch-up the
363 * pending DMA upload and start clean.
366 if(sbuf->dma.pending)
367 svga_buffer_upload_flush(sbuf->dma.svga, sbuf);
369 assert(!sbuf->dma.pending);
370 assert(!sbuf->dma.svga);
371 assert(!sbuf->dma.boxes);
373 if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
378 sbuf->map.ranges[sbuf->map.num_ranges].start = start;
379 sbuf->map.ranges[sbuf->map.num_ranges].end = end;
380 ++sbuf->map.num_ranges;
383 * Everything else failed, so just extend the nearest range.
385 * It is OK to do this because we always keep a local copy of the
386 * host buffer data, for SW TNL, and the host never modifies the buffer.
389 assert(nearest_range < SVGA_BUFFER_MAX_RANGES);
390 assert(nearest_range < sbuf->map.num_ranges);
391 sbuf->map.ranges[nearest_range].start = MIN2(sbuf->map.ranges[nearest_range].start, start);
392 sbuf->map.ranges[nearest_range].end = MAX2(sbuf->map.ranges[nearest_range].end, end);
399 * Copy the contents of the malloc buffer to a hardware buffer.
401 static INLINE enum pipe_error
402 svga_buffer_update_hw(struct svga_screen *ss, struct svga_buffer *sbuf)
413 ret = svga_buffer_create_hw_storage(ss, sbuf);
417 pipe_mutex_lock(ss->swc_mutex);
418 map = ss->sws->buffer_map(ss->sws, sbuf->hwbuf, PIPE_TRANSFER_WRITE);
421 pipe_mutex_unlock(ss->swc_mutex);
422 svga_buffer_destroy_hw_storage(ss, sbuf);
426 memcpy(map, sbuf->swbuf, sbuf->b.b.width0);
427 ss->sws->buffer_unmap(ss->sws, sbuf->hwbuf);
429 /* This user/malloc buffer is now indistinguishable from a gpu buffer */
430 assert(!sbuf->map.count);
431 if(!sbuf->map.count) {
435 align_free(sbuf->swbuf);
439 pipe_mutex_unlock(ss->swc_mutex);
447 * Upload the buffer to the host in a piecewise fashion.
449 * Used when the buffer is too big to fit in the GMR aperture.
451 static INLINE enum pipe_error
452 svga_buffer_upload_piecewise(struct svga_screen *ss,
453 struct svga_context *svga,
454 struct svga_buffer *sbuf)
456 struct svga_winsys_screen *sws = ss->sws;
457 const unsigned alignment = sizeof(void *);
458 const unsigned usage = 0;
461 assert(sbuf->map.num_ranges);
462 assert(!sbuf->dma.pending);
464 SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
466 for (i = 0; i < sbuf->map.num_ranges; ++i) {
467 struct svga_buffer_range *range = &sbuf->map.ranges[i];
468 unsigned offset = range->start;
469 unsigned size = range->end - range->start;
471 while (offset < range->end) {
472 struct svga_winsys_buffer *hwbuf;
476 if (offset + size > range->end)
477 size = range->end - offset;
479 hwbuf = svga_winsys_buffer_create(ss, alignment, usage, size);
483 return PIPE_ERROR_OUT_OF_MEMORY;
484 hwbuf = svga_winsys_buffer_create(ss, alignment, usage, size);
487 SVGA_DBG(DEBUG_DMA, " bytes %u - %u\n",
488 offset, offset + size);
490 map = sws->buffer_map(sws, hwbuf,
491 PIPE_TRANSFER_WRITE |
492 PIPE_TRANSFER_DISCARD);
495 memcpy(map, sbuf->swbuf, size);
496 sws->buffer_unmap(sws, hwbuf);
499 ret = SVGA3D_BufferDMA(svga->swc,
501 SVGA3D_WRITE_HOST_VRAM,
502 size, 0, offset, sbuf->dma.flags);
504 svga_context_flush(svga, NULL);
505 ret = SVGA3D_BufferDMA(svga->swc,
507 SVGA3D_WRITE_HOST_VRAM,
508 size, 0, offset, sbuf->dma.flags);
509 assert(ret == PIPE_OK);
512 sbuf->dma.flags.discard = FALSE;
514 sws->buffer_destroy(sws, hwbuf);
520 sbuf->map.num_ranges = 0;
528 /* Get (or create/upload) the winsys surface handle so that we can
529 * refer to this buffer in fifo commands.
531 struct svga_winsys_surface *
532 svga_buffer_handle(struct svga_context *svga,
533 struct pipe_resource *buf)
535 struct pipe_screen *screen = svga->pipe.screen;
536 struct svga_screen *ss = svga_screen(screen);
537 struct svga_buffer *sbuf;
543 sbuf = svga_buffer(buf);
545 assert(!sbuf->map.count);
549 ret = svga_buffer_create_host_surface(ss, sbuf);
554 assert(sbuf->handle);
556 if (sbuf->map.num_ranges) {
557 if (!sbuf->dma.pending) {
559 * No pending DMA upload yet, so insert a DMA upload command now.
563 * Migrate the data from swbuf -> hwbuf if necessary.
565 ret = svga_buffer_update_hw(ss, sbuf);
566 if (ret == PIPE_OK) {
568 * Queue a dma command.
571 ret = svga_buffer_upload_command(svga, sbuf);
572 if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
573 svga_context_flush(svga, NULL);
574 ret = svga_buffer_upload_command(svga, sbuf);
575 assert(ret == PIPE_OK);
577 if (ret == PIPE_OK) {
578 sbuf->dma.pending = TRUE;
579 assert(!sbuf->head.prev && !sbuf->head.next);
580 LIST_ADDTAIL(&sbuf->head, &svga->dirty_buffers);
583 else if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
585 * The buffer is too big to fit in the GMR aperture, so break it in
588 ret = svga_buffer_upload_piecewise(ss, svga, sbuf);
591 if (ret != PIPE_OK) {
593 * Something unexpected happened above. There is very little that
594 * we can do other than proceeding while ignoring the dirty ranges.
597 sbuf->map.num_ranges = 0;
602 * There a pending dma already. Make sure it is from this context.
604 assert(sbuf->dma.svga == svga);
608 assert(!sbuf->map.num_ranges || sbuf->dma.pending);
616 svga_context_flush_buffers(struct svga_context *svga)
618 struct list_head *curr, *next;
619 struct svga_buffer *sbuf;
621 curr = svga->dirty_buffers.next;
623 while(curr != &svga->dirty_buffers) {
624 sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
626 assert(p_atomic_read(&sbuf->b.b.reference.count) != 0);
627 assert(sbuf->dma.pending);
629 svga_buffer_upload_flush(svga, sbuf);