r600g: consolidate more translate functions
[profile/ivi/mesa.git] / src / gallium / drivers / r600 / r600_pipe.h
1 /*
2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * on the rights to use, copy, modify, merge, publish, distribute, sub
8  * license, and/or sell copies of the Software, and to permit persons to whom
9  * the Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  *      Jerome Glisse
25  */
26 #ifndef R600_PIPE_H
27 #define R600_PIPE_H
28
29 #include "../../winsys/radeon/drm/radeon_winsys.h"
30
31 #include "pipe/p_state.h"
32 #include "pipe/p_screen.h"
33 #include "pipe/p_context.h"
34 #include "util/u_math.h"
35 #include "util/u_slab.h"
36 #include "util/u_vbuf.h"
37 #include "r600.h"
38 #include "r600_public.h"
39 #include "r600_shader.h"
40 #include "r600_resource.h"
41
42 #define R600_MAX_CONST_BUFFERS 2
43 #define R600_MAX_CONST_BUFFER_SIZE 4096
44
45 #ifdef PIPE_ARCH_BIG_ENDIAN
46 #define R600_BIG_ENDIAN 1
47 #else
48 #define R600_BIG_ENDIAN 0
49 #endif
50
51 enum r600_atom_flags {
52         /* When set, atoms are added at the beginning of the dirty list
53          * instead of the end. */
54         EMIT_EARLY = (1 << 0)
55 };
56
57 /* This encapsulates a state or an operation which can emitted into the GPU
58  * command stream. It's not limited to states only, it can be used for anything
59  * that wants to write commands into the CS (e.g. cache flushes). */
60 struct r600_atom {
61         void (*emit)(struct r600_context *ctx, struct r600_atom *state);
62
63         unsigned                num_dw;
64         enum r600_atom_flags    flags;
65         bool                    dirty;
66
67         struct list_head        head;
68 };
69
70 struct r600_atom_surface_sync {
71         struct r600_atom atom;
72         unsigned flush_flags; /* CP_COHER_CNTL */
73 };
74
75 enum r600_pipe_state_id {
76         R600_PIPE_STATE_BLEND = 0,
77         R600_PIPE_STATE_BLEND_COLOR,
78         R600_PIPE_STATE_CONFIG,
79         R600_PIPE_STATE_SEAMLESS_CUBEMAP,
80         R600_PIPE_STATE_CLIP,
81         R600_PIPE_STATE_SCISSOR,
82         R600_PIPE_STATE_VIEWPORT,
83         R600_PIPE_STATE_RASTERIZER,
84         R600_PIPE_STATE_VGT,
85         R600_PIPE_STATE_FRAMEBUFFER,
86         R600_PIPE_STATE_DSA,
87         R600_PIPE_STATE_STENCIL_REF,
88         R600_PIPE_STATE_PS_SHADER,
89         R600_PIPE_STATE_VS_SHADER,
90         R600_PIPE_STATE_CONSTANT,
91         R600_PIPE_STATE_SAMPLER,
92         R600_PIPE_STATE_RESOURCE,
93         R600_PIPE_STATE_POLYGON_OFFSET,
94         R600_PIPE_STATE_FETCH_SHADER,
95         R600_PIPE_NSTATES
96 };
97
98 struct r600_pipe_fences {
99         struct r600_resource            *bo;
100         unsigned                        *data;
101         unsigned                        next_index;
102         /* linked list of preallocated blocks */
103         struct list_head                blocks;
104         /* linked list of freed fences */
105         struct list_head                pool;
106         pipe_mutex                      mutex;
107 };
108
109 struct r600_screen {
110         struct pipe_screen              screen;
111         struct radeon_winsys            *ws;
112         unsigned                        family;
113         enum chip_class                 chip_class;
114         struct radeon_info              info;
115         struct r600_tiling_info         tiling_info;
116         struct util_slab_mempool        pool_buffers;
117         struct r600_pipe_fences         fences;
118
119         unsigned                        num_contexts;
120         unsigned                        use_surface;
121
122         /* for thread-safe write accessing to num_contexts */
123         pipe_mutex                      mutex_num_contexts;
124 };
125
126 struct r600_pipe_sampler_view {
127         struct pipe_sampler_view        base;
128         struct r600_pipe_resource_state         state;
129 };
130
131 struct r600_pipe_rasterizer {
132         struct r600_pipe_state          rstate;
133         boolean                         flatshade;
134         boolean                         two_side;
135         unsigned                        sprite_coord_enable;
136         unsigned                        clip_plane_enable;
137         unsigned                        pa_sc_line_stipple;
138         unsigned                        pa_su_sc_mode_cntl;
139         unsigned                        pa_cl_clip_cntl;
140         float                           offset_units;
141         float                           offset_scale;
142 };
143
144 struct r600_pipe_blend {
145         struct r600_pipe_state          rstate;
146         unsigned                        cb_target_mask;
147         unsigned                        cb_color_control;
148 };
149
150 struct r600_pipe_dsa {
151         struct r600_pipe_state          rstate;
152         unsigned                        alpha_ref;
153         unsigned                        db_render_override;
154         unsigned                        db_render_control;
155         ubyte                           valuemask[2];
156         ubyte                           writemask[2];
157 };
158
159 struct r600_vertex_element
160 {
161         unsigned                        count;
162         struct pipe_vertex_element      elements[PIPE_MAX_ATTRIBS];
163         struct u_vbuf_elements          *vmgr_elements;
164         struct r600_resource            *fetch_shader;
165         unsigned                        fs_size;
166         struct r600_pipe_state          rstate;
167         /* if offset is to big for fetch instructio we need to alterate
168          * offset of vertex buffer, record here the offset need to add
169          */
170         unsigned                        vbuffer_need_offset;
171         unsigned                        vbuffer_offset[PIPE_MAX_ATTRIBS];
172 };
173
174 struct r600_pipe_shader {
175         struct r600_shader              shader;
176         struct r600_pipe_state          rstate;
177         struct r600_resource            *bo;
178         struct r600_resource            *bo_fetch;
179         struct r600_vertex_element      vertex_elements;
180         struct tgsi_token               *tokens;
181         unsigned        sprite_coord_enable;
182         unsigned        flatshade;
183         unsigned        pa_cl_vs_out_cntl;
184         struct pipe_stream_output_info  so;
185 };
186
187 struct r600_pipe_sampler_state {
188         struct r600_pipe_state          rstate;
189         boolean seamless_cube_map;
190 };
191
192 /* needed for blitter save */
193 #define NUM_TEX_UNITS 16
194
195 struct r600_textures_info {
196         struct r600_pipe_sampler_view   *views[NUM_TEX_UNITS];
197         struct r600_pipe_sampler_state  *samplers[NUM_TEX_UNITS];
198         unsigned                        n_views;
199         unsigned                        n_samplers;
200         bool                            samplers_dirty;
201         bool                            is_array_sampler[NUM_TEX_UNITS];
202 };
203
204 struct r600_fence {
205         struct pipe_reference           reference;
206         unsigned                        index; /* in the shared bo */
207         struct list_head                head;
208 };
209
210 #define FENCE_BLOCK_SIZE 16
211
212 struct r600_fence_block {
213         struct r600_fence               fences[FENCE_BLOCK_SIZE];
214         struct list_head                head;
215 };
216
217 #define R600_CONSTANT_ARRAY_SIZE 256
218 #define R600_RESOURCE_ARRAY_SIZE 160
219
220 struct r600_stencil_ref
221 {
222         ubyte ref_value[2];
223         ubyte valuemask[2];
224         ubyte writemask[2];
225 };
226
227 struct r600_context {
228         struct pipe_context             context;
229         struct blitter_context          *blitter;
230         enum radeon_family              family;
231         enum chip_class                 chip_class;
232         unsigned                        r6xx_num_clause_temp_gprs;
233         void                            *custom_dsa_flush;
234         struct r600_screen              *screen;
235         struct radeon_winsys            *ws;
236         struct r600_pipe_state          *states[R600_PIPE_NSTATES];
237         struct r600_vertex_element      *vertex_elements;
238         struct r600_pipe_resource_state fs_resource[PIPE_MAX_ATTRIBS];
239         struct pipe_framebuffer_state   framebuffer;
240         unsigned                        cb_target_mask;
241         unsigned                        cb_color_control;
242         unsigned                        pa_sc_line_stipple;
243         unsigned                        pa_su_sc_mode_cntl;
244         unsigned                        pa_cl_clip_cntl;
245         /* for saving when using blitter */
246         struct pipe_stencil_ref         stencil_ref;
247         struct pipe_viewport_state      viewport;
248         struct pipe_clip_state          clip;
249         struct r600_pipe_state          config;
250         struct r600_pipe_shader         *ps_shader;
251         struct r600_pipe_shader         *vs_shader;
252         struct r600_pipe_state          vs_const_buffer;
253         struct r600_pipe_resource_state         vs_const_buffer_resource[R600_MAX_CONST_BUFFERS];
254         struct r600_pipe_state          ps_const_buffer;
255         struct r600_pipe_resource_state         ps_const_buffer_resource[R600_MAX_CONST_BUFFERS];
256         struct r600_pipe_rasterizer     *rasterizer;
257         struct r600_pipe_state          vgt;
258         struct r600_pipe_state          spi;
259         struct pipe_query               *current_render_cond;
260         unsigned                        current_render_cond_mode;
261         struct pipe_query               *saved_render_cond;
262         unsigned                        saved_render_cond_mode;
263         /* shader information */
264         boolean                         two_side;
265         unsigned                        sprite_coord_enable;
266         boolean                         export_16bpc;
267         unsigned                        alpha_ref;
268         boolean                         alpha_ref_dirty;
269         unsigned                        nr_cbufs;
270         struct r600_textures_info       vs_samplers;
271         struct r600_textures_info       ps_samplers;
272
273         struct u_vbuf                   *vbuf_mgr;
274         struct util_slab_mempool        pool_transfers;
275         boolean                         have_depth_texture, have_depth_fb;
276
277         unsigned default_ps_gprs, default_vs_gprs;
278
279         /* States based on r600_state. */
280         struct list_head                dirty_states;
281         struct r600_atom_surface_sync   atom_surface_sync;
282         struct r600_atom                atom_r6xx_flush_and_inv;
283
284         /* Below are variables from the old r600_context.
285          */
286         struct radeon_winsys_cs *cs;
287
288         struct r600_range       *range;
289         unsigned                nblocks;
290         struct r600_block       **blocks;
291         struct list_head        dirty;
292         struct list_head        resource_dirty;
293         struct list_head        enable_list;
294         unsigned                pm4_dirty_cdwords;
295         unsigned                ctx_pm4_ndwords;
296         unsigned                init_dwords;
297
298         /* The list of active queries. Only one query of each type can be active. */
299         struct list_head        active_query_list;
300         unsigned                num_cs_dw_queries_suspend;
301         unsigned                num_cs_dw_streamout_end;
302
303         unsigned                backend_mask;
304         unsigned                max_db; /* for OQ */
305         unsigned                flags;
306         boolean                 predicate_drawing;
307         struct r600_range       ps_resources;
308         struct r600_range       vs_resources;
309         struct r600_range       fs_resources;
310         int                     num_ps_resources, num_vs_resources, num_fs_resources;
311
312         unsigned                num_so_targets;
313         struct r600_so_target   *so_targets[PIPE_MAX_SO_BUFFERS];
314         boolean                 streamout_start;
315         unsigned                streamout_append_bitmask;
316         unsigned                *vs_so_stride_in_dw;
317 };
318
319 static INLINE void r600_emit_atom(struct r600_context *rctx, struct r600_atom *atom)
320 {
321         atom->emit(rctx, atom);
322         atom->dirty = false;
323         if (atom->head.next && atom->head.prev)
324                 LIST_DELINIT(&atom->head);
325 }
326
327 static INLINE void r600_atom_dirty(struct r600_context *rctx, struct r600_atom *state)
328 {
329         if (!state->dirty) {
330                 if (state->flags & EMIT_EARLY) {
331                         LIST_ADD(&state->head, &rctx->dirty_states);
332                 } else {
333                         LIST_ADDTAIL(&state->head, &rctx->dirty_states);
334                 }
335                 state->dirty = true;
336         }
337 }
338
339 /* evergreen_state.c */
340 void evergreen_init_state_functions(struct r600_context *rctx);
341 void evergreen_init_config(struct r600_context *rctx);
342 void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader);
343 void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader);
344 void evergreen_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve);
345 void *evergreen_create_db_flush_dsa(struct r600_context *rctx);
346 void evergreen_polygon_offset_update(struct r600_context *rctx);
347 void evergreen_pipe_init_buffer_resource(struct r600_context *rctx,
348                                          struct r600_pipe_resource_state *rstate);
349 void evergreen_pipe_mod_buffer_resource(struct pipe_context *ctx,
350                                         struct r600_pipe_resource_state *rstate,
351                                         struct r600_resource *rbuffer,
352                                         unsigned offset, unsigned stride,
353                                         enum radeon_bo_usage usage);
354 boolean evergreen_is_format_supported(struct pipe_screen *screen,
355                                       enum pipe_format format,
356                                       enum pipe_texture_target target,
357                                       unsigned sample_count,
358                                       unsigned usage);
359
360 /* r600_blit.c */
361 void r600_init_blit_functions(struct r600_context *rctx);
362 void r600_blit_uncompress_depth(struct pipe_context *ctx, struct r600_resource_texture *texture);
363 void r600_blit_push_depth(struct pipe_context *ctx, struct r600_resource_texture *texture);
364 void r600_flush_depth_textures(struct r600_context *rctx);
365
366 /* r600_buffer.c */
367 bool r600_init_resource(struct r600_screen *rscreen,
368                         struct r600_resource *res,
369                         unsigned size, unsigned alignment,
370                         unsigned bind, unsigned usage);
371 struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
372                                          const struct pipe_resource *templ);
373 struct pipe_resource *r600_user_buffer_create(struct pipe_screen *screen,
374                                               void *ptr, unsigned bytes,
375                                               unsigned bind);
376 void r600_upload_index_buffer(struct r600_context *rctx,
377                               struct pipe_index_buffer *ib, unsigned count);
378
379
380 /* r600_pipe.c */
381 void r600_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
382                 unsigned flags);
383
384 /* r600_query.c */
385 void r600_init_query_functions(struct r600_context *rctx);
386
387 /* r600_resource.c */
388 void r600_init_context_resource_functions(struct r600_context *r600);
389
390 /* r600_shader.c */
391 int r600_pipe_shader_create(struct pipe_context *ctx, struct r600_pipe_shader *shader);
392 void r600_pipe_shader_destroy(struct pipe_context *ctx, struct r600_pipe_shader *shader);
393 int r600_find_vs_semantic_index(struct r600_shader *vs,
394                                 struct r600_shader *ps, int id);
395
396 /* r600_state.c */
397 void r600_update_sampler_states(struct r600_context *rctx);
398 void r600_init_state_functions(struct r600_context *rctx);
399 void r600_init_config(struct r600_context *rctx);
400 void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader);
401 void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader);
402 void r600_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve);
403 void *r600_create_db_flush_dsa(struct r600_context *rctx);
404 void r600_polygon_offset_update(struct r600_context *rctx);
405 void r600_pipe_init_buffer_resource(struct r600_context *rctx,
406                                     struct r600_pipe_resource_state *rstate);
407 void r600_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate,
408                                    struct r600_resource *rbuffer,
409                                    unsigned offset, unsigned stride,
410                                    enum radeon_bo_usage usage);
411 void r600_adjust_gprs(struct r600_context *rctx);
412 boolean r600_is_format_supported(struct pipe_screen *screen,
413                                  enum pipe_format format,
414                                  enum pipe_texture_target target,
415                                  unsigned sample_count,
416                                  unsigned usage);
417
418 /* r600_texture.c */
419 void r600_init_screen_texture_functions(struct pipe_screen *screen);
420 void r600_init_surface_functions(struct r600_context *r600);
421 uint32_t r600_translate_texformat(struct pipe_screen *screen, enum pipe_format format,
422                                   const unsigned char *swizzle_view,
423                                   uint32_t *word4_p, uint32_t *yuv_format_p);
424 unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,
425                                         unsigned level, unsigned layer);
426
427 /* r600_translate.c */
428 void r600_translate_index_buffer(struct r600_context *r600,
429                                  struct pipe_index_buffer *ib,
430                                  unsigned count);
431
432 /* r600_state_common.c */
433 void r600_init_common_atoms(struct r600_context *rctx);
434 unsigned r600_get_cb_flush_flags(struct r600_context *rctx);
435 void r600_texture_barrier(struct pipe_context *ctx);
436 void r600_set_index_buffer(struct pipe_context *ctx,
437                            const struct pipe_index_buffer *ib);
438 void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count,
439                              const struct pipe_vertex_buffer *buffers);
440 void *r600_create_vertex_elements(struct pipe_context *ctx,
441                                   unsigned count,
442                                   const struct pipe_vertex_element *elements);
443 void r600_delete_vertex_element(struct pipe_context *ctx, void *state);
444 void r600_bind_blend_state(struct pipe_context *ctx, void *state);
445 void r600_bind_dsa_state(struct pipe_context *ctx, void *state);
446 void r600_bind_rs_state(struct pipe_context *ctx, void *state);
447 void r600_delete_rs_state(struct pipe_context *ctx, void *state);
448 void r600_sampler_view_destroy(struct pipe_context *ctx,
449                                struct pipe_sampler_view *state);
450 void r600_delete_state(struct pipe_context *ctx, void *state);
451 void r600_bind_vertex_elements(struct pipe_context *ctx, void *state);
452 void *r600_create_shader_state(struct pipe_context *ctx,
453                                const struct pipe_shader_state *state);
454 void r600_bind_ps_shader(struct pipe_context *ctx, void *state);
455 void r600_bind_vs_shader(struct pipe_context *ctx, void *state);
456 void r600_delete_ps_shader(struct pipe_context *ctx, void *state);
457 void r600_delete_vs_shader(struct pipe_context *ctx, void *state);
458 void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
459                               struct pipe_resource *buffer);
460 struct pipe_stream_output_target *
461 r600_create_so_target(struct pipe_context *ctx,
462                       struct pipe_resource *buffer,
463                       unsigned buffer_offset,
464                       unsigned buffer_size);
465 void r600_so_target_destroy(struct pipe_context *ctx,
466                             struct pipe_stream_output_target *target);
467 void r600_set_so_targets(struct pipe_context *ctx,
468                          unsigned num_targets,
469                          struct pipe_stream_output_target **targets,
470                          unsigned append_bitmask);
471 void r600_set_pipe_stencil_ref(struct pipe_context *ctx,
472                                const struct pipe_stencil_ref *state);
473 void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info);
474 uint32_t r600_translate_stencil_op(int s_op);
475 uint32_t r600_translate_fill(uint32_t func);
476 unsigned r600_tex_wrap(unsigned wrap);
477 unsigned r600_tex_filter(unsigned filter);
478 unsigned r600_tex_mipfilter(unsigned filter);
479 unsigned r600_tex_compare(unsigned compare);
480
481 /*
482  * common helpers
483  */
484 static INLINE uint32_t S_FIXED(float value, uint32_t frac_bits)
485 {
486         return value * (1 << frac_bits);
487 }
488 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
489
490 static inline unsigned r600_tex_aniso_filter(unsigned filter)
491 {
492         if (filter <= 1)   return 0;
493         if (filter <= 2)   return 1;
494         if (filter <= 4)   return 2;
495         if (filter <= 8)   return 3;
496          /* else */        return 4;
497 }
498
499 /* 12.4 fixed-point */
500 static INLINE unsigned r600_pack_float_12p4(float x)
501 {
502         return x <= 0    ? 0 :
503                x >= 4096 ? 0xffff : x * 16;
504 }
505
506 #endif