2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
29 #include "../../winsys/radeon/drm/radeon_winsys.h"
31 #include "pipe/p_state.h"
32 #include "pipe/p_screen.h"
33 #include "pipe/p_context.h"
34 #include "util/u_math.h"
35 #include "util/u_slab.h"
36 #include "util/u_vbuf.h"
38 #include "r600_public.h"
39 #include "r600_shader.h"
40 #include "r600_resource.h"
42 #define R600_MAX_CONST_BUFFERS 2
43 #define R600_MAX_CONST_BUFFER_SIZE 4096
45 #ifdef PIPE_ARCH_BIG_ENDIAN
46 #define R600_BIG_ENDIAN 1
48 #define R600_BIG_ENDIAN 0
51 enum r600_pipe_state_id {
52 R600_PIPE_STATE_BLEND = 0,
53 R600_PIPE_STATE_BLEND_COLOR,
54 R600_PIPE_STATE_CONFIG,
55 R600_PIPE_STATE_SEAMLESS_CUBEMAP,
57 R600_PIPE_STATE_SCISSOR,
58 R600_PIPE_STATE_VIEWPORT,
59 R600_PIPE_STATE_RASTERIZER,
61 R600_PIPE_STATE_FRAMEBUFFER,
63 R600_PIPE_STATE_STENCIL_REF,
64 R600_PIPE_STATE_PS_SHADER,
65 R600_PIPE_STATE_VS_SHADER,
66 R600_PIPE_STATE_CONSTANT,
67 R600_PIPE_STATE_SAMPLER,
68 R600_PIPE_STATE_RESOURCE,
69 R600_PIPE_STATE_POLYGON_OFFSET,
70 R600_PIPE_STATE_FETCH_SHADER,
74 struct r600_pipe_fences {
75 struct r600_resource *bo;
78 /* linked list of preallocated blocks */
79 struct list_head blocks;
80 /* linked list of freed fences */
81 struct list_head pool;
86 struct pipe_screen screen;
87 struct radeon_winsys *ws;
89 enum chip_class chip_class;
90 struct radeon_info info;
91 struct r600_tiling_info tiling_info;
92 struct util_slab_mempool pool_buffers;
93 struct r600_pipe_fences fences;
95 unsigned num_contexts;
97 /* for thread-safe write accessing to num_contexts */
98 pipe_mutex mutex_num_contexts;
101 struct r600_pipe_sampler_view {
102 struct pipe_sampler_view base;
103 struct r600_pipe_resource_state state;
106 struct r600_pipe_rasterizer {
107 struct r600_pipe_state rstate;
108 boolean clamp_vertex_color;
109 boolean clamp_fragment_color;
112 unsigned sprite_coord_enable;
113 unsigned clip_plane_enable;
118 struct r600_pipe_blend {
119 struct r600_pipe_state rstate;
120 unsigned cb_target_mask;
123 struct r600_pipe_dsa {
124 struct r600_pipe_state rstate;
128 struct r600_vertex_element
131 struct pipe_vertex_element elements[PIPE_MAX_ATTRIBS];
132 struct u_vbuf_elements *vmgr_elements;
133 struct r600_resource *fetch_shader;
135 struct r600_pipe_state rstate;
136 /* if offset is to big for fetch instructio we need to alterate
137 * offset of vertex buffer, record here the offset need to add
139 unsigned vbuffer_need_offset;
140 unsigned vbuffer_offset[PIPE_MAX_ATTRIBS];
143 struct r600_pipe_shader {
144 struct r600_shader shader;
145 struct r600_pipe_state rstate;
146 struct r600_resource *bo;
147 struct r600_resource *bo_fetch;
148 struct r600_vertex_element vertex_elements;
149 struct tgsi_token *tokens;
150 unsigned sprite_coord_enable;
151 struct pipe_stream_output_info so;
154 struct r600_pipe_sampler_state {
155 struct r600_pipe_state rstate;
156 boolean seamless_cube_map;
159 /* needed for blitter save */
160 #define NUM_TEX_UNITS 16
162 struct r600_textures_info {
163 struct r600_pipe_sampler_view *views[NUM_TEX_UNITS];
164 struct r600_pipe_sampler_state *samplers[NUM_TEX_UNITS];
168 bool is_array_sampler[NUM_TEX_UNITS];
172 struct pipe_reference reference;
173 unsigned index; /* in the shared bo */
174 struct list_head head;
177 #define FENCE_BLOCK_SIZE 16
179 struct r600_fence_block {
180 struct r600_fence fences[FENCE_BLOCK_SIZE];
181 struct list_head head;
184 #define R600_CONSTANT_ARRAY_SIZE 256
185 #define R600_RESOURCE_ARRAY_SIZE 160
187 struct r600_pipe_context {
188 struct pipe_context context;
189 struct blitter_context *blitter;
190 enum radeon_family family;
191 enum chip_class chip_class;
192 void *custom_dsa_flush;
193 struct r600_screen *screen;
194 struct radeon_winsys *ws;
195 struct r600_pipe_state *states[R600_PIPE_NSTATES];
196 struct r600_context ctx;
197 struct r600_vertex_element *vertex_elements;
198 struct r600_pipe_resource_state fs_resource[PIPE_MAX_ATTRIBS];
199 struct pipe_framebuffer_state framebuffer;
200 unsigned cb_target_mask;
201 /* for saving when using blitter */
202 struct pipe_stencil_ref stencil_ref;
203 struct pipe_viewport_state viewport;
204 struct pipe_clip_state clip;
205 struct r600_pipe_state config;
206 struct r600_pipe_shader *ps_shader;
207 struct r600_pipe_shader *vs_shader;
208 struct r600_pipe_state vs_const_buffer;
209 struct r600_pipe_resource_state vs_const_buffer_resource[R600_MAX_CONST_BUFFERS];
210 struct r600_pipe_state ps_const_buffer;
211 struct r600_pipe_resource_state ps_const_buffer_resource[R600_MAX_CONST_BUFFERS];
212 struct r600_pipe_rasterizer *rasterizer;
213 struct r600_pipe_state vgt;
214 struct r600_pipe_state spi;
215 struct pipe_query *current_render_cond;
216 unsigned current_render_cond_mode;
217 struct pipe_query *saved_render_cond;
218 unsigned saved_render_cond_mode;
219 /* shader information */
220 boolean clamp_vertex_color;
221 boolean clamp_fragment_color;
223 unsigned user_clip_plane_enable;
224 unsigned clip_dist_enable;
225 unsigned sprite_coord_enable;
226 boolean export_16bpc;
228 boolean alpha_ref_dirty;
230 struct r600_textures_info vs_samplers;
231 struct r600_textures_info ps_samplers;
233 struct u_vbuf *vbuf_mgr;
234 struct util_slab_mempool pool_transfers;
235 boolean have_depth_texture, have_depth_fb;
237 unsigned default_ps_gprs, default_vs_gprs;
240 /* evergreen_state.c */
241 void evergreen_init_state_functions(struct r600_pipe_context *rctx);
242 void evergreen_init_config(struct r600_pipe_context *rctx);
243 void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader);
244 void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader);
245 void evergreen_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve);
246 void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx);
247 void evergreen_polygon_offset_update(struct r600_pipe_context *rctx);
248 void evergreen_pipe_init_buffer_resource(struct r600_pipe_context *rctx,
249 struct r600_pipe_resource_state *rstate);
250 void evergreen_pipe_mod_buffer_resource(struct pipe_context *ctx,
251 struct r600_pipe_resource_state *rstate,
252 struct r600_resource *rbuffer,
253 unsigned offset, unsigned stride,
254 enum radeon_bo_usage usage);
255 boolean evergreen_is_format_supported(struct pipe_screen *screen,
256 enum pipe_format format,
257 enum pipe_texture_target target,
258 unsigned sample_count,
262 void r600_init_blit_functions(struct r600_pipe_context *rctx);
263 void r600_blit_uncompress_depth(struct pipe_context *ctx, struct r600_resource_texture *texture);
264 void r600_blit_push_depth(struct pipe_context *ctx, struct r600_resource_texture *texture);
265 void r600_flush_depth_textures(struct r600_pipe_context *rctx);
268 bool r600_init_resource(struct r600_screen *rscreen,
269 struct r600_resource *res,
270 unsigned size, unsigned alignment,
271 unsigned bind, unsigned usage);
272 struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
273 const struct pipe_resource *templ);
274 struct pipe_resource *r600_user_buffer_create(struct pipe_screen *screen,
275 void *ptr, unsigned bytes,
277 void r600_upload_index_buffer(struct r600_pipe_context *rctx,
278 struct pipe_index_buffer *ib, unsigned count);
282 void r600_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
286 void r600_init_query_functions(struct r600_pipe_context *rctx);
288 /* r600_resource.c */
289 void r600_init_context_resource_functions(struct r600_pipe_context *r600);
292 int r600_pipe_shader_create(struct pipe_context *ctx, struct r600_pipe_shader *shader);
293 void r600_pipe_shader_destroy(struct pipe_context *ctx, struct r600_pipe_shader *shader);
294 int r600_find_vs_semantic_index(struct r600_shader *vs,
295 struct r600_shader *ps, int id);
298 void r600_update_sampler_states(struct r600_pipe_context *rctx);
299 void r600_init_state_functions(struct r600_pipe_context *rctx);
300 void r600_init_config(struct r600_pipe_context *rctx);
301 void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader);
302 void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader);
303 void r600_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve);
304 void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx);
305 void r600_polygon_offset_update(struct r600_pipe_context *rctx);
306 void r600_pipe_init_buffer_resource(struct r600_pipe_context *rctx,
307 struct r600_pipe_resource_state *rstate);
308 void r600_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate,
309 struct r600_resource *rbuffer,
310 unsigned offset, unsigned stride,
311 enum radeon_bo_usage usage);
312 void r600_adjust_gprs(struct r600_pipe_context *rctx);
313 boolean r600_is_format_supported(struct pipe_screen *screen,
314 enum pipe_format format,
315 enum pipe_texture_target target,
316 unsigned sample_count,
320 void r600_init_screen_texture_functions(struct pipe_screen *screen);
321 void r600_init_surface_functions(struct r600_pipe_context *r600);
322 uint32_t r600_translate_texformat(struct pipe_screen *screen, enum pipe_format format,
323 const unsigned char *swizzle_view,
324 uint32_t *word4_p, uint32_t *yuv_format_p);
325 unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,
326 unsigned level, unsigned layer);
328 /* r600_translate.c */
329 void r600_translate_index_buffer(struct r600_pipe_context *r600,
330 struct pipe_index_buffer *ib,
333 /* r600_state_common.c */
334 void r600_set_index_buffer(struct pipe_context *ctx,
335 const struct pipe_index_buffer *ib);
336 void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count,
337 const struct pipe_vertex_buffer *buffers);
338 void *r600_create_vertex_elements(struct pipe_context *ctx,
340 const struct pipe_vertex_element *elements);
341 void r600_delete_vertex_element(struct pipe_context *ctx, void *state);
342 void r600_bind_blend_state(struct pipe_context *ctx, void *state);
343 void r600_bind_dsa_state(struct pipe_context *ctx, void *state);
344 void r600_bind_rs_state(struct pipe_context *ctx, void *state);
345 void r600_delete_rs_state(struct pipe_context *ctx, void *state);
346 void r600_sampler_view_destroy(struct pipe_context *ctx,
347 struct pipe_sampler_view *state);
348 void r600_delete_state(struct pipe_context *ctx, void *state);
349 void r600_bind_vertex_elements(struct pipe_context *ctx, void *state);
350 void *r600_create_shader_state(struct pipe_context *ctx,
351 const struct pipe_shader_state *state);
352 void r600_bind_ps_shader(struct pipe_context *ctx, void *state);
353 void r600_bind_vs_shader(struct pipe_context *ctx, void *state);
354 void r600_delete_ps_shader(struct pipe_context *ctx, void *state);
355 void r600_delete_vs_shader(struct pipe_context *ctx, void *state);
356 void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
357 struct pipe_resource *buffer);
358 struct pipe_stream_output_target *
359 r600_create_so_target(struct pipe_context *ctx,
360 struct pipe_resource *buffer,
361 unsigned buffer_offset,
362 unsigned buffer_size);
363 void r600_so_target_destroy(struct pipe_context *ctx,
364 struct pipe_stream_output_target *target);
365 void r600_set_so_targets(struct pipe_context *ctx,
366 unsigned num_targets,
367 struct pipe_stream_output_target **targets,
368 unsigned append_bitmask);
371 void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info);
376 static INLINE u32 S_FIXED(float value, u32 frac_bits)
378 return value * (1 << frac_bits);
380 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
382 static inline unsigned r600_tex_aniso_filter(unsigned filter)
384 if (filter <= 1) return 0;
385 if (filter <= 2) return 1;
386 if (filter <= 4) return 2;
387 if (filter <= 8) return 3;