src/gallium/drivers/r300/r300_state.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #include "util/u_math.h"
  24 #include "util/u_pack_color.h"
  25
  26 #include "r300_context.h"
  27 #include "r300_reg.h"
  28
  29 /* r300_state: Functions used to intialize state context by translating
  30  * Gallium state objects into semi-native r300 state objects.
  31  *
  32  * XXX break this file up into pieces if it gets too big! */
  33
  34 /* Pack a float into a dword. */
  35 static uint32_t pack_float_32(float f)
  36 {
  37     union {
  38         float f;
  39         uint32_t u;
  40     } u;
  41
  42     u.f = f;
  43     return u.u;
  44 }
  45
  46 static uint32_t translate_blend_function(int blend_func) {
  47     switch (blend_func) {
  48         case PIPE_BLEND_ADD:
  49             return R300_COMB_FCN_ADD_CLAMP;
  50         case PIPE_BLEND_SUBTRACT:
  51             return R300_COMB_FCN_SUB_CLAMP;
  52         case PIPE_BLEND_REVERSE_SUBTRACT:
  53             return R300_COMB_FCN_RSUB_CLAMP;
  54         case PIPE_BLEND_MIN:
  55             return R300_COMB_FCN_MIN;
  56         case PIPE_BLEND_MAX:
  57             return R300_COMB_FCN_MAX;
  58         default:
  59             /* XXX should be unreachable, handle this */
  60             break;
  61     }
  62     return 0;
  63 }
  64
  65 /* XXX we can also offer the D3D versions of some of these... */
  66 static uint32_t translate_blend_factor(int blend_fact) {
  67     switch (blend_fact) {
  68         case PIPE_BLENDFACTOR_ONE:
  69             return R300_BLEND_GL_ONE;
  70         case PIPE_BLENDFACTOR_SRC_COLOR:
  71             return R300_BLEND_GL_SRC_COLOR;
  72         case PIPE_BLENDFACTOR_SRC_ALPHA:
  73             return R300_BLEND_GL_SRC_ALPHA;
  74         case PIPE_BLENDFACTOR_DST_ALPHA:
  75             return R300_BLEND_GL_DST_ALPHA;
  76         case PIPE_BLENDFACTOR_DST_COLOR:
  77             return R300_BLEND_GL_DST_COLOR;
  78         case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
  79             return R300_BLEND_GL_SRC_ALPHA_SATURATE;
  80         case PIPE_BLENDFACTOR_CONST_COLOR:
  81             return R300_BLEND_GL_CONST_COLOR;
  82         case PIPE_BLENDFACTOR_CONST_ALPHA:
  83             return R300_BLEND_GL_CONST_ALPHA;
  84         /* XXX WTF are these?
  85         case PIPE_BLENDFACTOR_SRC1_COLOR:
  86         case PIPE_BLENDFACTOR_SRC1_ALPHA: */
  87         case PIPE_BLENDFACTOR_ZERO:
  88             return R300_BLEND_GL_ZERO;
  89         case PIPE_BLENDFACTOR_INV_SRC_COLOR:
  90             return R300_BLEND_GL_ONE_MINUS_SRC_COLOR;
  91         case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
  92             return R300_BLEND_GL_ONE_MINUS_SRC_ALPHA;
  93         case PIPE_BLENDFACTOR_INV_DST_ALPHA:
  94             return R300_BLEND_GL_ONE_MINUS_DST_ALPHA;
  95         case PIPE_BLENDFACTOR_INV_DST_COLOR:
  96             return R300_BLEND_GL_ONE_MINUS_DST_COLOR;
  97         case PIPE_BLENDFACTOR_INV_CONST_COLOR:
  98             return R300_BLEND_GL_ONE_MINUS_CONST_COLOR;
  99         case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
 100             return R300_BLEND_GL_ONE_MINUS_CONST_ALPHA;
 101         /* XXX see above
 102         case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
 103         case PIPE_BLENDFACTOR_INV_SRC1_ALPHA: */
 104         default:
 105             /* XXX the mythical 0x16 blend factor! */
 106             break;
 107     }
 108     return 0;
 109 }
 110
 111 /* Create a new blend state based on the CSO blend state.
 112  *
 113  * This encompasses alpha blending, logic/raster ops, and blend dithering. */
 114 static void* r300_create_blend_state(struct pipe_context* pipe,
 115                                      const struct pipe_blend_state* state)
 116 {
 117     struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
 118
 119     if (state->blend_enable) {
 120         /* XXX for now, always do separate alpha...
 121          * is it faster to do it with one reg? */
 122         blend->blend_control = R300_ALPHA_BLEND_ENABLE |
 123                 R300_SEPARATE_ALPHA_ENABLE |
 124                 R300_READ_ENABLE |
 125                 translate_blend_function(state->rgb_func) |
 126                 (translate_blend_factor(state->rgb_src_factor) <<
 127                     R300_SRC_BLEND_SHIFT) |
 128                 (translate_blend_factor(state->rgb_dst_factor) <<
 129                     R300_DST_BLEND_SHIFT);
 130         blend->alpha_blend_control =
 131                 translate_blend_function(state->alpha_func) |
 132                 (translate_blend_factor(state->alpha_src_factor) <<
 133                     R300_SRC_BLEND_SHIFT) |
 134                 (translate_blend_factor(state->alpha_dst_factor) <<
 135                     R300_DST_BLEND_SHIFT);
 136     }
 137
 138     /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
 139     /* XXX are logicops still allowed if blending's disabled?
 140      * Does Gallium take care of it for us? */
 141     if (state->logicop_enable) {
 142         blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
 143                 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
 144     }
 145
 146     if (state->dither) {
 147         blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
 148                 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
 149     }
 150
 151     return (void*)blend;
 152 }
 153
 154 /* Bind blend state. */
 155 static void r300_bind_blend_state(struct pipe_context* pipe,
 156                                   void* state)
 157 {
 158     struct r300_context* r300 = r300_context(pipe);
 159
 160     r300->blend_state = (struct r300_blend_state*)state;
 161     r300->dirty_state |= R300_NEW_BLEND;
 162 }
 163
 164 /* Free blend state. */
 165 static void r300_delete_blend_state(struct pipe_context* pipe,
 166                                     void* state)
 167 {
 168     FREE(state);
 169 }
 170
 171 /* Set blend color.
 172  * Setup both R300 and R500 registers, figure out later which one to write. */
 173 static void r300_set_blend_color(struct pipe_context* pipe,
 174                                  const struct pipe_blend_color* color)
 175 {
 176     struct r300_context* r300 = r300_context(pipe);
 177     uint32_t r, g, b, a;
 178     ubyte ur, ug, ub, ua;
 179
 180     r = util_iround(color->color[0] * 1023.0f);
 181     g = util_iround(color->color[1] * 1023.0f);
 182     b = util_iround(color->color[2] * 1023.0f);
 183     a = util_iround(color->color[3] * 1023.0f);
 184
 185     ur = float_to_ubyte(color->color[0]);
 186     ug = float_to_ubyte(color->color[1]);
 187     ub = float_to_ubyte(color->color[2]);
 188     ua = float_to_ubyte(color->color[3]);
 189
 190     r300->blend_color_state->blend_color = (a << 24) | (r << 16) | (g << 8) | b;
 191
 192     r300->blend_color_state->blend_color_red_alpha = ur | (ua << 16);
 193     r300->blend_color_state->blend_color_green_blue = ub | (ug << 16);
 194
 195     r300->dirty_state |= R300_NEW_BLEND_COLOR;
 196 }
 197
 198 static void r300_set_clip_state(struct pipe_context* pipe,
 199                                 const struct pipe_clip_state* state)
 200 {
 201     struct r300_context* r300 = r300_context(pipe);
 202     /* XXX Draw */
 203     draw_flush(r300->draw);
 204     draw_set_clip_state(r300->draw, state);
 205 }
 206
 207 static void
 208     r300_set_constant_buffer(struct pipe_context* pipe,
 209                              uint shader, uint index,
 210                              const struct pipe_constant_buffer* buffer)
 211 {
 212     /* XXX */
 213 }
 214
 215 static uint32_t translate_depth_stencil_function(int zs_func) {
 216     switch (zs_func) {
 217         case PIPE_FUNC_NEVER:
 218             return R300_ZS_NEVER;
 219         case PIPE_FUNC_LESS:
 220             return R300_ZS_LESS;
 221         case PIPE_FUNC_EQUAL:
 222             return R300_ZS_EQUAL;
 223         case PIPE_FUNC_LEQUAL:
 224             return R300_ZS_LEQUAL;
 225         case PIPE_FUNC_GREATER:
 226             return R300_ZS_GREATER;
 227         case PIPE_FUNC_NOTEQUAL:
 228             return R300_ZS_NOTEQUAL;
 229         case PIPE_FUNC_GEQUAL:
 230             return R300_ZS_GEQUAL;
 231         case PIPE_FUNC_ALWAYS:
 232             return R300_ZS_ALWAYS;
 233         default:
 234             /* XXX shouldn't be reachable */
 235             break;
 236     }
 237     return 0;
 238 }
 239
 240 static uint32_t translate_stencil_op(int s_op) {
 241     switch (s_op) {
 242         case PIPE_STENCIL_OP_KEEP:
 243             return R300_ZS_KEEP;
 244         case PIPE_STENCIL_OP_ZERO:
 245             return R300_ZS_ZERO;
 246         case PIPE_STENCIL_OP_REPLACE:
 247             return R300_ZS_REPLACE;
 248         case PIPE_STENCIL_OP_INCR:
 249             return R300_ZS_INCR;
 250         case PIPE_STENCIL_OP_DECR:
 251             return R300_ZS_DECR;
 252         case PIPE_STENCIL_OP_INCR_WRAP:
 253             return R300_ZS_INCR_WRAP;
 254         case PIPE_STENCIL_OP_DECR_WRAP:
 255             return R300_ZS_DECR_WRAP;
 256         case PIPE_STENCIL_OP_INVERT:
 257             return R300_ZS_INVERT;
 258         default:
 259             /* XXX shouldn't be reachable */
 260             break;
 261     }
 262     return 0;
 263 }
 264
 265 static uint32_t translate_alpha_function(int alpha_func) {
 266     switch (alpha_func) {
 267         case PIPE_FUNC_NEVER:
 268             return R300_FG_ALPHA_FUNC_NEVER;
 269         case PIPE_FUNC_LESS:
 270             return R300_FG_ALPHA_FUNC_LESS;
 271         case PIPE_FUNC_EQUAL:
 272             return R300_FG_ALPHA_FUNC_EQUAL;
 273         case PIPE_FUNC_LEQUAL:
 274             return R300_FG_ALPHA_FUNC_LE;
 275         case PIPE_FUNC_GREATER:
 276             return R300_FG_ALPHA_FUNC_GREATER;
 277         case PIPE_FUNC_NOTEQUAL:
 278             return R300_FG_ALPHA_FUNC_NOTEQUAL;
 279         case PIPE_FUNC_GEQUAL:
 280             return R300_FG_ALPHA_FUNC_GE;
 281         case PIPE_FUNC_ALWAYS:
 282             return R300_FG_ALPHA_FUNC_ALWAYS;
 283         default:
 284             /* XXX shouldn't be reachable */
 285             break;
 286     }
 287     return 0;
 288 }
 289
 290 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
 291  *
 292  * This contains the depth buffer, stencil buffer, alpha test, and such.
 293  * On the Radeon, depth and stencil buffer setup are intertwined, which is
 294  * the reason for some of the strange-looking assignments across registers. */
 295 static void*
 296         r300_create_dsa_state(struct pipe_context* pipe,
 297                               const struct pipe_depth_stencil_alpha_state* state)
 298 {
 299     struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
 300
 301     /* Depth test setup. */
 302     if (state->depth.enabled) {
 303         dsa->z_buffer_control |= R300_Z_ENABLE;
 304
 305         if (state->depth.writemask) {
 306             dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
 307         }
 308
 309         dsa->z_stencil_control |=
 310             (translate_depth_stencil_function(state->depth.func) <<
 311                 R300_Z_FUNC_SHIFT);
 312     }
 313
 314     /* Stencil buffer setup. */
 315     if (state->stencil[0].enabled) {
 316         dsa->z_buffer_control |= R300_STENCIL_ENABLE;
 317         dsa->z_stencil_control |=
 318                 (translate_depth_stencil_function(state->stencil[0].func) <<
 319                     R300_S_FRONT_FUNC_SHIFT) |
 320                 (translate_stencil_op(state->stencil[0].fail_op) <<
 321                     R300_S_FRONT_SFAIL_OP_SHIFT) |
 322                 (translate_stencil_op(state->stencil[0].zpass_op) <<
 323                     R300_S_FRONT_ZPASS_OP_SHIFT) |
 324                 (translate_stencil_op(state->stencil[0].zfail_op) <<
 325                     R300_S_FRONT_ZFAIL_OP_SHIFT);
 326
 327         dsa->stencil_ref_mask = (state->stencil[0].ref_value) |
 328                 (state->stencil[0].value_mask << R300_STENCILMASK_SHIFT) |
 329                 (state->stencil[0].write_mask << R300_STENCILWRITEMASK_SHIFT);
 330
 331         if (state->stencil[1].enabled) {
 332             dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
 333             dsa->z_stencil_control |=
 334                 (translate_depth_stencil_function(state->stencil[1].func) <<
 335                     R300_S_BACK_FUNC_SHIFT) |
 336                 (translate_stencil_op(state->stencil[1].fail_op) <<
 337                     R300_S_BACK_SFAIL_OP_SHIFT) |
 338                 (translate_stencil_op(state->stencil[1].zpass_op) <<
 339                     R300_S_BACK_ZPASS_OP_SHIFT) |
 340                 (translate_stencil_op(state->stencil[1].zfail_op) <<
 341                     R300_S_BACK_ZFAIL_OP_SHIFT);
 342
 343             dsa->stencil_ref_bf = (state->stencil[1].ref_value) |
 344                 (state->stencil[1].value_mask << R300_STENCILMASK_SHIFT) |
 345                 (state->stencil[1].write_mask << R300_STENCILWRITEMASK_SHIFT);
 346         }
 347     }
 348
 349     /* Alpha test setup. */
 350     if (state->alpha.enabled) {
 351         dsa->alpha_function = translate_alpha_function(state->alpha.func) |
 352             R300_FG_ALPHA_FUNC_ENABLE;
 353         dsa->alpha_reference = CLAMP(state->alpha.ref * 1023.0f, 0, 1023);
 354     } else {
 355         dsa->z_buffer_top = R300_ZTOP_ENABLE;
 356     }
 357
 358     return (void*)dsa;
 359 }
 360
 361 /* Bind DSA state. */
 362 static void r300_bind_dsa_state(struct pipe_context* pipe,
 363                                 void* state)
 364 {
 365     struct r300_context* r300 = r300_context(pipe);
 366
 367     r300->dsa_state = (struct r300_dsa_state*)state;
 368     r300->dirty_state |= R300_NEW_DSA;
 369 }
 370
 371 /* Free DSA state. */
 372 static void r300_delete_dsa_state(struct pipe_context* pipe,
 373                                   void* state)
 374 {
 375     FREE(state);
 376 }
 377
 378 static void r300_set_edgeflags(struct pipe_context* pipe,
 379                                const unsigned* bitfield)
 380 {
 381     /* XXX you know it's bad when i915 has this blank too */
 382 }
 383
 384 static void
 385     r300_set_framebuffer_state(struct pipe_context* pipe,
 386                                const struct pipe_framebuffer_state* state)
 387 {
 388     struct r300_context* r300 = r300_context(pipe);
 389
 390     draw_flush(r300->draw);
 391
 392     r300->framebuffer_state = *state;
 393
 394     /* XXX do we need to mark dirty state? */
 395 }
 396
 397 /* Create fragment shader state. */
 398 static void* r300_create_fs_state(struct pipe_context* pipe,
 399                                   const struct pipe_shader_state* state)
 400 {
 401     struct r300_fs_state* fs = CALLOC_STRUCT(r300_fs_state);
 402
 403     return (void*)fs;
 404 }
 405
 406 /* Bind fragment shader state. */
 407 static void r300_bind_fs_state(struct pipe_context* pipe, void* state)
 408 {
 409     struct r300_context* r300 = r300_context(pipe);
 410
 411     r300->fs_state = (struct r300_fs_state*)state;
 412
 413     r300->dirty_state |= R300_NEW_FRAGMENT_SHADER;
 414 }
 415
 416 /* Delect fragment shader state. */
 417 static void r300_delete_fs_state(struct pipe_context* pipe, void* state)
 418 {
 419     FREE(state);
 420 }
 421
 422 static void r300_set_polygon_stipple(struct pipe_context* pipe,
 423                                      const struct pipe_poly_stipple* state)
 424 {
 425     /* XXX */
 426 }
 427
 428 #if 0
 429 struct pipe_rasterizer_state
 430 {
 431     unsigned flatshade:1;
 432     unsigned light_twoside:1;
 433     unsigned fill_cw:2;        /**< PIPE_POLYGON_MODE_x */
 434     unsigned fill_ccw:2;       /**< PIPE_POLYGON_MODE_x */
 435     unsigned scissor:1;
 436     unsigned poly_smooth:1;
 437     unsigned poly_stipple_enable:1;
 438     unsigned point_smooth:1;
 439     unsigned point_sprite:1;
 440     unsigned multisample:1;         /* XXX maybe more ms state in future */
 441     unsigned line_smooth:1;
 442     unsigned line_last_pixel:1;
 443     unsigned bypass_clipping:1;
 444     unsigned bypass_vs:1; /**< Skip the vertex shader.  Note that the shader is
 445     still needed though, to indicate inputs/outputs */
 446     unsigned origin_lower_left:1;  /**< Is (0,0) the lower-left corner? */
 447     unsigned flatshade_first:1;   /**< take color attribute from the first vertex of a primitive */
 448     unsigned gl_rasterization_rules:1; /**< enable tweaks for GL rasterization?  */
 449     ubyte sprite_coord_mode[PIPE_MAX_SHADER_OUTPUTS]; /**< PIPE_SPRITE_COORD_ */
 450 };
 451 #endif
 452
 453 static INLINE int pack_float_16_6x(float f) {
 454     return ((int)(f * 6.0) & 0xffff);
 455 }
 456
 457 /* Create a new rasterizer state based on the CSO rasterizer state.
 458  *
 459  * This is a very large chunk of state, and covers most of the graphics
 460  * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
 461  *
 462  * In a not entirely unironic sidenote, this state has nearly nothing to do
 463  * with the actual block on the Radeon called the rasterizer (RS). */
 464 static void* r300_create_rs_state(struct pipe_context* pipe,
 465                                   const struct pipe_rasterizer_state* state)
 466 {
 467     struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
 468
 469     /* XXX this is part of HW TCL */
 470     /* XXX endian control */
 471     rs->vap_control_status = R300_VAP_TCL_BYPASS;
 472
 473     rs->point_size = pack_float_16_6x(state->point_size) |
 474         (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
 475
 476     rs->line_control = pack_float_16_6x(state->line_width) |
 477         R300_GA_LINE_CNTL_END_TYPE_COMP;
 478
 479     /* Radeons don't think in "CW/CCW", they think in "front/back". */
 480     if (state->front_winding == PIPE_WINDING_CW) {
 481         rs->cull_mode = R300_FRONT_FACE_CW;
 482
 483         if (state->offset_cw) {
 484             rs->polygon_offset_enable |= R300_FRONT_ENABLE;
 485         }
 486         if (state->offset_ccw) {
 487             rs->polygon_offset_enable |= R300_BACK_ENABLE;
 488         }
 489     } else {
 490         rs->cull_mode = R300_FRONT_FACE_CCW;
 491
 492         if (state->offset_ccw) {
 493             rs->polygon_offset_enable |= R300_FRONT_ENABLE;
 494         }
 495         if (state->offset_cw) {
 496             rs->polygon_offset_enable |= R300_BACK_ENABLE;
 497         }
 498     }
 499     if (state->front_winding & state->cull_mode) {
 500         rs->cull_mode |= R300_CULL_FRONT;
 501     }
 502     if (~(state->front_winding) & state->cull_mode) {
 503         rs->cull_mode |= R300_CULL_BACK;
 504     }
 505
 506     if (rs->polygon_offset_enable) {
 507         rs->depth_offset_front = rs->depth_offset_back =
 508                 pack_float_32(state->offset_units);
 509         rs->depth_scale_front = rs->depth_scale_back =
 510                 pack_float_32(state->offset_scale);
 511     }
 512
 513     if (state->line_stipple_enable) {
 514         rs->line_stipple_config =
 515             R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
 516             (pack_float_32((float)state->line_stipple_factor) &
 517                 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
 518         /* XXX this might need to be scaled up */
 519         rs->line_stipple_value = state->line_stipple_pattern;
 520     }
 521
 522     return (void*)rs;
 523 }
 524
 525 /* Bind rasterizer state. */
 526 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
 527 {
 528     struct r300_context* r300 = r300_context(pipe);
 529
 530     r300->rs_state = (struct r300_rs_state*)state;
 531     r300->dirty_state |= R300_NEW_RASTERIZER;
 532 }
 533
 534 /* Free rasterizer state. */
 535 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
 536 {
 537     FREE(state);
 538 }
 539
 540 static uint32_t translate_wrap(int wrap) {
 541     switch (wrap) {
 542         case PIPE_TEX_WRAP_REPEAT:
 543             return R300_TX_REPEAT;
 544         case PIPE_TEX_WRAP_CLAMP:
 545             return R300_TX_CLAMP;
 546         case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
 547             return R300_TX_CLAMP_TO_EDGE;
 548         case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
 549             return R300_TX_CLAMP_TO_BORDER;
 550         case PIPE_TEX_WRAP_MIRROR_REPEAT:
 551             return R300_TX_REPEAT | R300_TX_MIRRORED;
 552         case PIPE_TEX_WRAP_MIRROR_CLAMP:
 553             return R300_TX_CLAMP | R300_TX_MIRRORED;
 554         case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
 555             return R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED;
 556         case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
 557             return R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED;
 558         default:
 559             /* XXX handle this? */
 560             return 0;
 561     }
 562 }
 563
 564 static uint32_t translate_tex_filters(int min, int mag, int mip) {
 565     uint32_t retval = 0;
 566     switch (min) {
 567         case PIPE_TEX_FILTER_NEAREST:
 568             retval |= R300_TX_MIN_FILTER_NEAREST;
 569         case PIPE_TEX_FILTER_LINEAR:
 570             retval |= R300_TX_MIN_FILTER_LINEAR;
 571         case PIPE_TEX_FILTER_ANISO:
 572             retval |= R300_TX_MIN_FILTER_ANISO;
 573         default:
 574             /* XXX WTF?! */
 575             break;
 576     }
 577     switch (mag) {
 578         case PIPE_TEX_FILTER_NEAREST:
 579             retval |= R300_TX_MAG_FILTER_NEAREST;
 580         case PIPE_TEX_FILTER_LINEAR:
 581             retval |= R300_TX_MAG_FILTER_LINEAR;
 582         case PIPE_TEX_FILTER_ANISO:
 583             retval |= R300_TX_MAG_FILTER_ANISO;
 584         default:
 585             /* XXX WTF?! */
 586             break;
 587     }
 588     switch (mip) {
 589         case PIPE_TEX_MIPFILTER_NONE:
 590             retval |= R300_TX_MIN_FILTER_MIP_NONE;
 591         case PIPE_TEX_MIPFILTER_NEAREST:
 592             retval |= R300_TX_MIN_FILTER_MIP_NEAREST;
 593         case PIPE_TEX_MIPFILTER_LINEAR:
 594             retval |= R300_TX_MIN_FILTER_MIP_LINEAR;
 595         default:
 596             /* XXX WTF?! */
 597             break;
 598     }
 599
 600     return retval;
 601 }
 602
 603 static uint32_t anisotropy(float max_aniso) {
 604     if (max_aniso >= 16.0f) {
 605         return R300_TX_MAX_ANISO_16_TO_1;
 606     } else if (max_aniso >= 8.0f) {
 607         return R300_TX_MAX_ANISO_8_TO_1;
 608     } else if (max_aniso >= 4.0f) {
 609         return R300_TX_MAX_ANISO_4_TO_1;
 610     } else if (max_aniso >= 2.0f) {
 611         return R300_TX_MAX_ANISO_2_TO_1;
 612     } else {
 613         return R300_TX_MAX_ANISO_1_TO_1;
 614     }
 615 }
 616
 617 static void*
 618         r300_create_sampler_state(struct pipe_context* pipe,
 619                                   const struct pipe_sampler_state* state)
 620 {
 621     struct r300_context* r300 = r300_context(pipe);
 622     struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
 623     int lod_bias;
 624
 625     sampler->filter0 |=
 626         (translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
 627         (translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
 628         (translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
 629
 630     sampler->filter0 |= translate_tex_filters(state->min_img_filter,
 631                                               state->mag_img_filter,
 632                                               state->min_mip_filter);
 633
 634     lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
 635
 636     sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
 637
 638     sampler->filter1 |= anisotropy(state->max_anisotropy);
 639
 640     util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM,
 641                     &sampler->border_color);
 642
 643     /* R500-specific fixups and optimizations */
 644     if (r300_screen(r300->context.screen)->caps->is_r500) {
 645         sampler->filter1 |= R500_BORDER_FIX;
 646     }
 647
 648     return (void*)sampler;
 649 }
 650
 651 static void r300_bind_sampler_states(struct pipe_context* pipe,
 652                                      unsigned count,
 653                                      void** states)
 654 {
 655     struct r300_context* r300 = r300_context(pipe);
 656     int i;
 657
 658     if (count > 8) {
 659         return;
 660     }
 661
 662     for (i = 0; i < count; i++) {
 663         if (r300->sampler_states[i] != states[i]) {
 664             r300->sampler_states[i] = (struct r300_sampler_state*)states[i];
 665             r300->dirty_state |= (R300_NEW_SAMPLER << i);
 666         }
 667     }
 668
 669     r300->sampler_count = count;
 670 }
 671
 672 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
 673 {
 674     FREE(state);
 675 }
 676
 677 static void r300_set_sampler_textures(struct pipe_context* pipe,
 678                                       unsigned count,
 679                                       struct pipe_texture** texture)
 680 {
 681     struct r300_context* r300 = r300_context(pipe);
 682     int i;
 683
 684     /* XXX magic num */
 685     if (count > 8) {
 686         return;
 687     }
 688
 689     for (i = 0; i < count; i++) {
 690         if (r300->textures[i] != (struct r300_texture*)texture[i]) {
 691             pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
 692                 texture[i]);
 693             /* XXX NEW_TEXTURE instead? */
 694             r300->dirty_state |= (R300_NEW_SAMPLER << i);
 695         }
 696     }
 697
 698     for (i = count; i < 8; i++) {
 699         /* XXX also state change? */
 700         pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
 701             NULL);
 702     }
 703
 704     r300->texture_count = count;
 705 }
 706
 707 static void r300_set_scissor_state(struct pipe_context* pipe,
 708                                    const struct pipe_scissor_state* state)
 709 {
 710     struct r300_context* r300 = r300_context(pipe);
 711     draw_flush(r300->draw);
 712
 713     uint32_t left, top, right, bottom;
 714
 715     /* So, a bit of info. The scissors are offset by R300_SCISSORS_OFFSET in
 716      * both directions for all values, and can only be 13 bits wide. Why?
 717      * We may never know. */
 718     left = (state->minx + R300_SCISSORS_OFFSET) & 0x1fff;
 719     top = (state->miny + R300_SCISSORS_OFFSET) & 0x1fff;
 720     right = (state->maxx + R300_SCISSORS_OFFSET) & 0x1fff;
 721     bottom = (state->maxy + R300_SCISSORS_OFFSET) & 0x1fff;
 722
 723     r300->scissor_state->scissor_top_left = (left << R300_SCISSORS_X_SHIFT) |
 724             (top << R300_SCISSORS_Y_SHIFT);
 725     r300->scissor_state->scissor_bottom_right =
 726         (right << R300_SCISSORS_X_SHIFT) | (bottom << R300_SCISSORS_Y_SHIFT);
 727
 728     r300->dirty_state |= R300_NEW_SCISSOR;
 729 }
 730
 731 static void r300_set_viewport_state(struct pipe_context* pipe,
 732                                     const struct pipe_viewport_state* state)
 733 {
 734     struct r300_context* r300 = r300_context(pipe);
 735     /* XXX handing this off to Draw for now */
 736     draw_set_viewport_state(r300->draw, state);
 737 }
 738
 739 static void r300_set_vertex_buffers(struct pipe_context* pipe,
 740                                     unsigned count,
 741                                     const struct pipe_vertex_buffer* buffers)
 742 {
 743     struct r300_context* r300 = r300_context(pipe);
 744     /* XXX Draw */
 745     draw_flush(r300->draw);
 746     draw_set_vertex_buffers(r300->draw, count, buffers);
 747 }
 748
 749 static void r300_set_vertex_elements(struct pipe_context* pipe,
 750                                     unsigned count,
 751                                     const struct pipe_vertex_element* elements)
 752 {
 753     struct r300_context* r300 = r300_context(pipe);
 754     /* XXX Draw */
 755     draw_flush(r300->draw);
 756     draw_set_vertex_elements(r300->draw, count, elements);
 757 }
 758
 759 static void* r300_create_vs_state(struct pipe_context* pipe,
 760                                   const struct pipe_shader_state* state)
 761 {
 762     struct r300_context* context = r300_context(pipe);
 763     /* XXX handing this off to Draw for now */
 764     return draw_create_vertex_shader(context->draw, state);
 765 }
 766
 767 static void r300_bind_vs_state(struct pipe_context* pipe, void* state) {
 768     struct r300_context* context = r300_context(pipe);
 769     /* XXX handing this off to Draw for now */
 770     draw_bind_vertex_shader(context->draw, (struct draw_vertex_shader*)state);
 771 }
 772
 773 static void r300_delete_vs_state(struct pipe_context* pipe, void* state)
 774 {
 775     struct r300_context* context = r300_context(pipe);
 776     /* XXX handing this off to Draw for now */
 777     draw_delete_vertex_shader(context->draw, (struct draw_vertex_shader*)state);
 778 }
 779
 780 void r300_init_state_functions(struct r300_context* r300)
 781 {
 782     r300->context.create_blend_state = r300_create_blend_state;
 783     r300->context.bind_blend_state = r300_bind_blend_state;
 784     r300->context.delete_blend_state = r300_delete_blend_state;
 785
 786     r300->context.set_blend_color = r300_set_blend_color;
 787
 788     r300->context.set_clip_state = r300_set_clip_state;
 789
 790     r300->context.set_constant_buffer = r300_set_constant_buffer;
 791
 792     r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
 793     r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
 794     r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
 795
 796     r300->context.set_edgeflags = r300_set_edgeflags;
 797
 798     r300->context.set_framebuffer_state = r300_set_framebuffer_state;
 799
 800     r300->context.create_fs_state = r300_create_fs_state;
 801     r300->context.bind_fs_state = r300_bind_fs_state;
 802     r300->context.delete_fs_state = r300_delete_fs_state;
 803
 804     r300->context.set_polygon_stipple = r300_set_polygon_stipple;
 805
 806     r300->context.create_rasterizer_state = r300_create_rs_state;
 807     r300->context.bind_rasterizer_state = r300_bind_rs_state;
 808     r300->context.delete_rasterizer_state = r300_delete_rs_state;
 809
 810     r300->context.create_sampler_state = r300_create_sampler_state;
 811     r300->context.bind_sampler_states = r300_bind_sampler_states;
 812     r300->context.delete_sampler_state = r300_delete_sampler_state;
 813
 814     r300->context.set_sampler_textures = r300_set_sampler_textures;
 815
 816     r300->context.set_scissor_state = r300_set_scissor_state;
 817
 818     r300->context.set_viewport_state = r300_set_viewport_state;
 819
 820     r300->context.set_vertex_buffers = r300_set_vertex_buffers;
 821     r300->context.set_vertex_elements = r300_set_vertex_elements;
 822
 823     r300->context.create_vs_state = r300_create_vs_state;
 824     r300->context.bind_vs_state = r300_bind_vs_state;
 825     r300->context.delete_vs_state = r300_delete_vs_state;
 826 }