src/gallium/drivers/r300/r300_state.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #include "util/u_math.h"
  24 #include "util/u_pack_color.h"
  25
  26 #include "r300_context.h"
  27 #include "r300_reg.h"
  28
  29 /* r300_state: Functions used to intialize state context by translating
  30  * Gallium state objects into semi-native r300 state objects.
  31  *
  32  * XXX break this file up into pieces if it gets too big! */
  33
  34 /* Pack a float into a dword. */
  35 static uint32_t pack_float_32(float f)
  36 {
  37     union {
  38         float f;
  39         uint32_t u;
  40     } u;
  41
  42     u.f = f;
  43     return u.u;
  44 }
  45
  46 static uint32_t translate_blend_function(int blend_func) {
  47     switch (blend_func) {
  48         case PIPE_BLEND_ADD:
  49             return R300_COMB_FCN_ADD_CLAMP;
  50         case PIPE_BLEND_SUBTRACT:
  51             return R300_COMB_FCN_SUB_CLAMP;
  52         case PIPE_BLEND_REVERSE_SUBTRACT:
  53             return R300_COMB_FCN_RSUB_CLAMP;
  54         case PIPE_BLEND_MIN:
  55             return R300_COMB_FCN_MIN;
  56         case PIPE_BLEND_MAX:
  57             return R300_COMB_FCN_MAX;
  58         default:
  59             /* XXX should be unreachable, handle this */
  60             break;
  61     }
  62     return 0;
  63 }
  64
  65 /* XXX we can also offer the D3D versions of some of these... */
  66 static uint32_t translate_blend_factor(int blend_fact) {
  67     switch (blend_fact) {
  68         case PIPE_BLENDFACTOR_ONE:
  69             return R300_BLEND_GL_ONE;
  70         case PIPE_BLENDFACTOR_SRC_COLOR:
  71             return R300_BLEND_GL_SRC_COLOR;
  72         case PIPE_BLENDFACTOR_SRC_ALPHA:
  73             return R300_BLEND_GL_SRC_ALPHA;
  74         case PIPE_BLENDFACTOR_DST_ALPHA:
  75             return R300_BLEND_GL_DST_ALPHA;
  76         case PIPE_BLENDFACTOR_DST_COLOR:
  77             return R300_BLEND_GL_DST_COLOR;
  78         case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
  79             return R300_BLEND_GL_SRC_ALPHA_SATURATE;
  80         case PIPE_BLENDFACTOR_CONST_COLOR:
  81             return R300_BLEND_GL_CONST_COLOR;
  82         case PIPE_BLENDFACTOR_CONST_ALPHA:
  83             return R300_BLEND_GL_CONST_ALPHA;
  84         /* XXX WTF are these?
  85         case PIPE_BLENDFACTOR_SRC1_COLOR:
  86         case PIPE_BLENDFACTOR_SRC1_ALPHA: */
  87         case PIPE_BLENDFACTOR_ZERO:
  88             return R300_BLEND_GL_ZERO;
  89         case PIPE_BLENDFACTOR_INV_SRC_COLOR:
  90             return R300_BLEND_GL_ONE_MINUS_SRC_COLOR;
  91         case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
  92             return R300_BLEND_GL_ONE_MINUS_SRC_ALPHA;
  93         case PIPE_BLENDFACTOR_INV_DST_ALPHA:
  94             return R300_BLEND_GL_ONE_MINUS_DST_ALPHA;
  95         case PIPE_BLENDFACTOR_INV_DST_COLOR:
  96             return R300_BLEND_GL_ONE_MINUS_DST_COLOR;
  97         case PIPE_BLENDFACTOR_INV_CONST_COLOR:
  98             return R300_BLEND_GL_ONE_MINUS_CONST_COLOR;
  99         case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
 100             return R300_BLEND_GL_ONE_MINUS_CONST_ALPHA;
 101         /* XXX see above
 102         case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
 103         case PIPE_BLENDFACTOR_INV_SRC1_ALPHA: */
 104         default:
 105             /* XXX the mythical 0x16 blend factor! */
 106             break;
 107     }
 108     return 0;
 109 }
 110
 111 /* Create a new blend state based on the CSO blend state.
 112  *
 113  * This encompasses alpha blending, logic/raster ops, and blend dithering. */
 114 static void* r300_create_blend_state(struct pipe_context* pipe,
 115                                      const struct pipe_blend_state* state)
 116 {
 117     struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
 118
 119     if (state->blend_enable) {
 120         /* XXX for now, always do separate alpha...
 121          * is it faster to do it with one reg? */
 122         blend->blend_control = R300_ALPHA_BLEND_ENABLE |
 123                 R300_SEPARATE_ALPHA_ENABLE |
 124                 R300_READ_ENABLE |
 125                 translate_blend_function(state->rgb_func) |
 126                 (translate_blend_factor(state->rgb_src_factor) <<
 127                     R300_SRC_BLEND_SHIFT) |
 128                 (translate_blend_factor(state->rgb_dst_factor) <<
 129                     R300_DST_BLEND_SHIFT);
 130         blend->alpha_blend_control =
 131                 translate_blend_function(state->alpha_func) |
 132                 (translate_blend_factor(state->alpha_src_factor) <<
 133                     R300_SRC_BLEND_SHIFT) |
 134                 (translate_blend_factor(state->alpha_dst_factor) <<
 135                     R300_DST_BLEND_SHIFT);
 136     }
 137
 138     /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
 139     /* XXX are logicops still allowed if blending's disabled?
 140      * Does Gallium take care of it for us? */
 141     if (state->logicop_enable) {
 142         blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
 143                 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
 144     }
 145
 146     if (state->dither) {
 147         blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
 148                 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
 149     }
 150
 151     return (void*)blend;
 152 }
 153
 154 /* Bind blend state. */
 155 static void r300_bind_blend_state(struct pipe_context* pipe,
 156                                   void* state)
 157 {
 158     struct r300_context* r300 = r300_context(pipe);
 159
 160     r300->blend_state = (struct r300_blend_state*)state;
 161     r300->dirty_state |= R300_NEW_BLEND;
 162 }
 163
 164 /* Free blend state. */
 165 static void r300_delete_blend_state(struct pipe_context* pipe,
 166                                     void* state)
 167 {
 168     FREE(state);
 169 }
 170
 171 /* Set blend color.
 172  * Setup both R300 and R500 registers, figure out later which one to write. */
 173 static void r300_set_blend_color(struct pipe_context* pipe,
 174                                  const struct pipe_blend_color* color)
 175 {
 176     struct r300_context* r300 = r300_context(pipe);
 177     uint32_t r, g, b, a;
 178     ubyte ur, ug, ub, ua;
 179
 180     r = util_iround(color->color[0] * 1023.0f);
 181     g = util_iround(color->color[1] * 1023.0f);
 182     b = util_iround(color->color[2] * 1023.0f);
 183     a = util_iround(color->color[3] * 1023.0f);
 184
 185     ur = float_to_ubyte(color->color[0]);
 186     ug = float_to_ubyte(color->color[1]);
 187     ub = float_to_ubyte(color->color[2]);
 188     ua = float_to_ubyte(color->color[3]);
 189
 190     r300->blend_color_state->blend_color = (a << 24) | (r << 16) | (g << 8) | b;
 191
 192     r300->blend_color_state->blend_color_red_alpha = ur | (ua << 16);
 193     r300->blend_color_state->blend_color_green_blue = ub | (ug << 16);
 194
 195     r300->dirty_state |= R300_NEW_BLEND_COLOR;
 196 }
 197
 198 static uint32_t translate_depth_stencil_function(int zs_func) {
 199     switch (zs_func) {
 200         case PIPE_FUNC_NEVER:
 201             return R300_ZS_NEVER;
 202         case PIPE_FUNC_LESS:
 203             return R300_ZS_LESS;
 204         case PIPE_FUNC_EQUAL:
 205             return R300_ZS_EQUAL;
 206         case PIPE_FUNC_LEQUAL:
 207             return R300_ZS_LEQUAL;
 208         case PIPE_FUNC_GREATER:
 209             return R300_ZS_GREATER;
 210         case PIPE_FUNC_NOTEQUAL:
 211             return R300_ZS_NOTEQUAL;
 212         case PIPE_FUNC_GEQUAL:
 213             return R300_ZS_GEQUAL;
 214         case PIPE_FUNC_ALWAYS:
 215             return R300_ZS_ALWAYS;
 216         default:
 217             /* XXX shouldn't be reachable */
 218             break;
 219     }
 220     return 0;
 221 }
 222
 223 static uint32_t translate_stencil_op(int s_op) {
 224     switch (s_op) {
 225         case PIPE_STENCIL_OP_KEEP:
 226             return R300_ZS_KEEP;
 227         case PIPE_STENCIL_OP_ZERO:
 228             return R300_ZS_ZERO;
 229         case PIPE_STENCIL_OP_REPLACE:
 230             return R300_ZS_REPLACE;
 231         case PIPE_STENCIL_OP_INCR:
 232             return R300_ZS_INCR;
 233         case PIPE_STENCIL_OP_DECR:
 234             return R300_ZS_DECR;
 235         case PIPE_STENCIL_OP_INCR_WRAP:
 236             return R300_ZS_INCR_WRAP;
 237         case PIPE_STENCIL_OP_DECR_WRAP:
 238             return R300_ZS_DECR_WRAP;
 239         case PIPE_STENCIL_OP_INVERT:
 240             return R300_ZS_INVERT;
 241         default:
 242             /* XXX shouldn't be reachable */
 243             break;
 244     }
 245     return 0;
 246 }
 247
 248 static uint32_t translate_alpha_function(int alpha_func) {
 249     switch (alpha_func) {
 250         case PIPE_FUNC_NEVER:
 251             return R300_FG_ALPHA_FUNC_NEVER;
 252         case PIPE_FUNC_LESS:
 253             return R300_FG_ALPHA_FUNC_LESS;
 254         case PIPE_FUNC_EQUAL:
 255             return R300_FG_ALPHA_FUNC_EQUAL;
 256         case PIPE_FUNC_LEQUAL:
 257             return R300_FG_ALPHA_FUNC_LE;
 258         case PIPE_FUNC_GREATER:
 259             return R300_FG_ALPHA_FUNC_GREATER;
 260         case PIPE_FUNC_NOTEQUAL:
 261             return R300_FG_ALPHA_FUNC_NOTEQUAL;
 262         case PIPE_FUNC_GEQUAL:
 263             return R300_FG_ALPHA_FUNC_GE;
 264         case PIPE_FUNC_ALWAYS:
 265             return R300_FG_ALPHA_FUNC_ALWAYS;
 266         default:
 267             /* XXX shouldn't be reachable */
 268             break;
 269     }
 270     return 0;
 271 }
 272
 273 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
 274  *
 275  * This contains the depth buffer, stencil buffer, alpha test, and such.
 276  * On the Radeon, depth and stencil buffer setup are intertwined, which is
 277  * the reason for some of the strange-looking assignments across registers. */
 278 static void*
 279         r300_create_dsa_state(struct pipe_context* pipe,
 280                               const struct pipe_depth_stencil_alpha_state* state)
 281 {
 282     struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
 283
 284     /* Depth test setup. */
 285     if (state->depth.enabled) {
 286         dsa->z_buffer_control |= R300_Z_ENABLE;
 287
 288         if (state->depth.writemask) {
 289             dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
 290         }
 291
 292         dsa->z_stencil_control |=
 293                 (translate_depth_stencil_function(state->depth.func) <<
 294                     R300_Z_FUNC_SHIFT);
 295     }
 296
 297     /* Stencil buffer setup. */
 298     if (state->stencil[0].enabled) {
 299         dsa->z_buffer_control |= R300_STENCIL_ENABLE;
 300         dsa->z_stencil_control |=
 301                 (translate_depth_stencil_function(state->stencil[0].func) <<
 302                     R300_S_FRONT_FUNC_SHIFT) |
 303                 (translate_stencil_op(state->stencil[0].fail_op) <<
 304                     R300_S_FRONT_SFAIL_OP_SHIFT) |
 305                 (translate_stencil_op(state->stencil[0].zpass_op) <<
 306                     R300_S_FRONT_ZPASS_OP_SHIFT) |
 307                 (translate_stencil_op(state->stencil[0].zfail_op) <<
 308                     R300_S_FRONT_ZFAIL_OP_SHIFT);
 309
 310         dsa->stencil_ref_mask = (state->stencil[0].ref_value) |
 311                 (state->stencil[0].value_mask << R300_STENCILMASK_SHIFT) |
 312                 (state->stencil[0].write_mask << R300_STENCILWRITEMASK_SHIFT);
 313
 314         if (state->stencil[1].enabled) {
 315             dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
 316             dsa->z_stencil_control |=
 317                     (translate_depth_stencil_function(state->stencil[1].func) <<
 318                         R300_S_BACK_FUNC_SHIFT) |
 319                     (translate_stencil_op(state->stencil[1].fail_op) <<
 320                         R300_S_BACK_SFAIL_OP_SHIFT) |
 321                     (translate_stencil_op(state->stencil[1].zpass_op) <<
 322                         R300_S_BACK_ZPASS_OP_SHIFT) |
 323                     (translate_stencil_op(state->stencil[1].zfail_op) <<
 324                         R300_S_BACK_ZFAIL_OP_SHIFT);
 325
 326             dsa->stencil_ref_bf = (state->stencil[1].ref_value) |
 327                     (state->stencil[1].value_mask << R300_STENCILMASK_SHIFT) |
 328                     (state->stencil[1].write_mask << R300_STENCILWRITEMASK_SHIFT);
 329         }
 330     }
 331
 332     /* Alpha test setup. */
 333     if (state->alpha.enabled) {
 334         dsa->alpha_function = translate_alpha_function(state->alpha.func) |
 335                 R300_FG_ALPHA_FUNC_ENABLE;
 336         dsa->alpha_reference = CLAMP(state->alpha.ref * 1023.0f, 0, 1023);
 337     } else {
 338         dsa->z_buffer_top = R300_ZTOP_ENABLE;
 339     }
 340
 341     return (void*)dsa;
 342 }
 343
 344 /* Bind DSA state. */
 345 static void r300_bind_dsa_state(struct pipe_context* pipe,
 346                                 void* state)
 347 {
 348     struct r300_context* r300 = r300_context(pipe);
 349
 350     r300->dsa_state = (struct r300_dsa_state*)state;
 351     r300->dirty_state |= R300_NEW_DSA;
 352 }
 353
 354 /* Free DSA state. */
 355 static void r300_delete_dsa_state(struct pipe_context* pipe,
 356                                   void* state)
 357 {
 358     FREE(state);
 359 }
 360 #if 0
 361 struct pipe_rasterizer_state
 362 {
 363     unsigned flatshade:1;
 364     unsigned light_twoside:1;
 365     unsigned fill_cw:2;        /**< PIPE_POLYGON_MODE_x */
 366     unsigned fill_ccw:2;       /**< PIPE_POLYGON_MODE_x */
 367     unsigned scissor:1;
 368     unsigned poly_smooth:1;
 369     unsigned poly_stipple_enable:1;
 370     unsigned point_smooth:1;
 371     unsigned point_sprite:1;
 372     unsigned point_size_per_vertex:1; /**< size computed in vertex shader */
 373     unsigned multisample:1;         /* XXX maybe more ms state in future */
 374     unsigned line_smooth:1;
 375     unsigned line_stipple_enable:1;
 376     unsigned line_stipple_factor:8;  /**< [1..256] actually */
 377     unsigned line_stipple_pattern:16;
 378     unsigned line_last_pixel:1;
 379     unsigned bypass_clipping:1;
 380     unsigned bypass_vs:1; /**< Skip the vertex shader.  Note that the shader is
 381     still needed though, to indicate inputs/outputs */
 382     unsigned origin_lower_left:1;  /**< Is (0,0) the lower-left corner? */
 383     unsigned flatshade_first:1;   /**< take color attribute from the first vertex of a primitive */
 384     unsigned gl_rasterization_rules:1; /**< enable tweaks for GL rasterization?  */
 385
 386     float line_width;
 387     float point_size;           /**< used when no per-vertex size */
 388     float point_size_min;        /* XXX - temporary, will go away */
 389     float point_size_max;        /* XXX - temporary, will go away */
 390     ubyte sprite_coord_mode[PIPE_MAX_SHADER_OUTPUTS]; /**< PIPE_SPRITE_COORD_ */
 391 };
 392 #endif
 393 /* Create a new rasterizer state based on the CSO rasterizer state.
 394  *
 395  * This is a very large chunk of state, and covers most of the graphics
 396  * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
 397  *
 398  * In a not entirely unironic sidenote, this state has nearly nothing to do
 399  * with the actual block on the Radeon called the rasterizer (RS). */
 400 static void* r300_create_rs_state(struct pipe_context* pipe,
 401                                   const struct pipe_rasterizer_state* state)
 402 {
 403     struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
 404
 405     /* Radeons don't think in "CW/CCW", they think in "front/back". */
 406     if (state->front_winding == PIPE_WINDING_CW) {
 407         rs->cull_mode = R300_FRONT_FACE_CW;
 408
 409         if (state->offset_cw) {
 410             rs->polygon_offset_enable |= R300_FRONT_ENABLE;
 411         }
 412         if (state->offset_ccw) {
 413             rs->polygon_offset_enable |= R300_BACK_ENABLE;
 414         }
 415     } else {
 416         rs->cull_mode = R300_FRONT_FACE_CCW;
 417
 418         if (state->offset_ccw) {
 419             rs->polygon_offset_enable |= R300_FRONT_ENABLE;
 420         }
 421         if (state->offset_cw) {
 422             rs->polygon_offset_enable |= R300_BACK_ENABLE;
 423         }
 424     }
 425     if (state->front_winding & state->cull_mode) {
 426         rs->cull_mode |= R300_CULL_FRONT;
 427     }
 428     if (~(state->front_winding) & state->cull_mode) {
 429         rs->cull_mode |= R300_CULL_BACK;
 430     }
 431
 432     if (rs->polygon_offset_enable) {
 433         rs->depth_offset_front = rs->depth_offset_back =
 434                 pack_float_32(state->offset_units);
 435         rs->depth_scale_front = rs->depth_scale_back =
 436                 pack_float_32(state->offset_scale);
 437     }
 438
 439     /* XXX this is part of HW TCL */
 440     /* XXX endian control */
 441     rs->vap_control_status = R300_VAP_TCL_BYPASS;
 442
 443     return (void*)rs;
 444 }
 445
 446 /* Bind rasterizer state. */
 447 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
 448 {
 449     struct r300_context* r300 = r300_context(pipe);
 450
 451     r300->rs_state = (struct r300_rs_state*)state;
 452     r300->dirty_state |= R300_NEW_RS;
 453 }
 454
 455 /* Free rasterizer state. */
 456 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
 457 {
 458     FREE(state);
 459 }
 460
 461 static uint32_t translate_wrap(int wrap) {
 462     switch (wrap) {
 463         case PIPE_TEX_WRAP_REPEAT:
 464             return R300_TX_REPEAT;
 465         case PIPE_TEX_WRAP_CLAMP:
 466             return R300_TX_CLAMP;
 467         case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
 468             return R300_TX_CLAMP_TO_EDGE;
 469         case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
 470             return R300_TX_CLAMP_TO_BORDER;
 471         case PIPE_TEX_WRAP_MIRROR_REPEAT:
 472             return R300_TX_REPEAT | R300_TX_MIRRORED;
 473         case PIPE_TEX_WRAP_MIRROR_CLAMP:
 474             return R300_TX_CLAMP | R300_TX_MIRRORED;
 475         case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
 476             return R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED;
 477         case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
 478             return R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED;
 479         default:
 480             /* XXX handle this? */
 481             return 0;
 482     }
 483 }
 484
 485 static uint32_t translate_tex_filters(int min, int mag, int mip) {
 486     uint32_t retval = 0;
 487     switch (min) {
 488         case PIPE_TEX_FILTER_NEAREST:
 489             retval |= R300_TX_MIN_FILTER_NEAREST;
 490         case PIPE_TEX_FILTER_LINEAR:
 491             retval |= R300_TX_MIN_FILTER_LINEAR;
 492         case PIPE_TEX_FILTER_ANISO:
 493             retval |= R300_TX_MIN_FILTER_ANISO;
 494         default:
 495             /* XXX WTF?! */
 496             break;
 497     }
 498     switch (mag) {
 499         case PIPE_TEX_FILTER_NEAREST:
 500             retval |= R300_TX_MAG_FILTER_NEAREST;
 501         case PIPE_TEX_FILTER_LINEAR:
 502             retval |= R300_TX_MAG_FILTER_LINEAR;
 503         case PIPE_TEX_FILTER_ANISO:
 504             retval |= R300_TX_MAG_FILTER_ANISO;
 505         default:
 506             /* XXX WTF?! */
 507             break;
 508     }
 509     switch (mip) {
 510         case PIPE_TEX_MIPFILTER_NONE:
 511             retval |= R300_TX_MIN_FILTER_MIP_NONE;
 512         case PIPE_TEX_MIPFILTER_NEAREST:
 513             retval |= R300_TX_MIN_FILTER_MIP_NEAREST;
 514         case PIPE_TEX_MIPFILTER_LINEAR:
 515             retval |= R300_TX_MIN_FILTER_MIP_LINEAR;
 516         default:
 517             /* XXX WTF?! */
 518             break;
 519     }
 520
 521     return retval;
 522 }
 523
 524 static uint32_t anisotropy(float max_aniso) {
 525     if (max_aniso >= 16.0f) {
 526         return R300_TX_MAX_ANISO_16_TO_1;
 527     } else if (max_aniso >= 8.0f) {
 528         return R300_TX_MAX_ANISO_8_TO_1;
 529     } else if (max_aniso >= 4.0f) {
 530         return R300_TX_MAX_ANISO_4_TO_1;
 531     } else if (max_aniso >= 2.0f) {
 532         return R300_TX_MAX_ANISO_2_TO_1;
 533     } else {
 534         return R300_TX_MAX_ANISO_1_TO_1;
 535     }
 536 }
 537
 538 static void*
 539         r300_create_sampler_state(struct pipe_context* pipe,
 540                                   const struct pipe_sampler_state* state)
 541 {
 542     struct r300_context* r300 = r300_context(pipe);
 543     struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
 544     int lod_bias;
 545
 546     sampler->filter0 |=
 547         (translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
 548         (translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
 549         (translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
 550
 551     sampler->filter0 |= translate_tex_filters(state->min_img_filter,
 552                                               state->mag_img_filter,
 553                                               state->min_mip_filter);
 554
 555     lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
 556
 557     sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
 558
 559     sampler->filter1 |= anisotropy(state->max_anisotropy);
 560
 561     util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM,
 562                     &sampler->border_color);
 563
 564     /* R500-specific fixups and optimizations */
 565     if (r300_screen(r300->context.screen)->caps->is_r500) {
 566         sampler->filter1 |= R500_BORDER_FIX;
 567     }
 568
 569     return (void*)sampler;
 570 }
 571
 572 static void r300_bind_sampler_states(struct pipe_context* pipe,
 573                                      unsigned count,
 574                                      void** states)
 575 {
 576     struct r300_context* r300 = r300_context(pipe);
 577     int i;
 578
 579     if (count > 8) {
 580         return;
 581     }
 582
 583     for (i = 0; i < count; i++) {
 584         if (r300->sampler_states[i] != states[i]) {
 585             r300->sampler_states[i] = (struct r300_sampler_state*)states[i];
 586             r300->dirty_state |= (R300_NEW_SAMPLER << i);
 587         }
 588     }
 589
 590     r300->sampler_count = count;
 591 }
 592
 593 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
 594 {
 595     FREE(state);
 596 }
 597
 598 static void r300_set_scissor_state(struct pipe_context* pipe,
 599                                    const struct pipe_scissor_state* state)
 600 {
 601     struct r300_context* r300 = r300_context(pipe);
 602     draw_flush(r300->draw);
 603
 604     uint32_t left, top, right, bottom;
 605
 606     /* So, a bit of info. The scissors are offset by R300_SCISSORS_OFFSET in
 607      * both directions for all values, and can only be 13 bits wide. Why?
 608      * We may never know. */
 609     left = (state->minx + R300_SCISSORS_OFFSET) & 0x1fff;
 610     top = (state->miny + R300_SCISSORS_OFFSET) & 0x1fff;
 611     right = (state->maxx + R300_SCISSORS_OFFSET) & 0x1fff;
 612     bottom = (state->maxy + R300_SCISSORS_OFFSET) & 0x1fff;
 613
 614     r300->scissor_state->scissor_top_left = (left << R300_SCISSORS_X_SHIFT) |
 615             (top << R300_SCISSORS_Y_SHIFT);
 616     r300->scissor_state->scissor_bottom_right =
 617         (right << R300_SCISSORS_X_SHIFT) | (bottom << R300_SCISSORS_Y_SHIFT);
 618
 619     r300->dirty_state |= R300_NEW_SCISSOR;
 620 }
 621
 622 static void* r300_create_vs_state(struct pipe_context* pipe,
 623                                   const struct pipe_shader_state* state)
 624 {
 625     struct r300_context* context = r300_context(pipe);
 626     /* XXX handing this off to Draw for now */
 627     return draw_create_vertex_shader(context->draw, state);
 628 }
 629
 630 static void r300_bind_vs_state(struct pipe_context* pipe, void* state) {
 631     struct r300_context* context = r300_context(pipe);
 632     /* XXX handing this off to Draw for now */
 633     draw_bind_vertex_shader(context->draw, (struct draw_vertex_shader*)state);
 634 }
 635
 636 static void r300_delete_vs_state(struct pipe_context* pipe, void* state)
 637 {
 638     struct r300_context* context = r300_context(pipe);
 639     /* XXX handing this off to Draw for now */
 640     draw_delete_vertex_shader(context->draw, (struct draw_vertex_shader*)state);
 641 }
 642
 643 void r300_init_state_functions(struct r300_context* r300) {
 644
 645     r300->context.create_blend_state = r300_create_blend_state;
 646     r300->context.bind_blend_state = r300_bind_blend_state;
 647     r300->context.delete_blend_state = r300_delete_blend_state;
 648
 649     r300->context.set_blend_color = r300_set_blend_color;
 650
 651     r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
 652     r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
 653     r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
 654
 655     r300->context.create_rasterizer_state = r300_create_rs_state;
 656     r300->context.bind_rasterizer_state = r300_bind_rs_state;
 657     r300->context.delete_rasterizer_state = r300_delete_rs_state;
 658
 659     r300->context.create_sampler_state = r300_create_sampler_state;
 660     r300->context.bind_sampler_states = r300_bind_sampler_states;
 661     r300->context.delete_sampler_state = r300_delete_sampler_state;
 662
 663     r300->context.set_scissor_state = r300_set_scissor_state;
 664
 665     r300->context.create_vs_state = r300_create_vs_state;
 666     r300->context.bind_vs_state = r300_bind_vs_state;
 667     r300->context.delete_vs_state = r300_delete_vs_state;
 668 }