2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
28 #include "util/u_pack_color.h"
30 #include "tgsi/tgsi_parse.h"
32 #include "pipe/p_config.h"
35 #include "r300_context.h"
36 #include "r300_emit.h"
38 #include "r300_screen.h"
39 #include "r300_screen_buffer.h"
40 #include "r300_state_inlines.h"
42 #include "r300_texture.h"
44 #include "r300_winsys.h"
46 /* r300_state: Functions used to intialize state context by translating
47 * Gallium state objects into semi-native r300 state objects. */
49 #define UPDATE_STATE(cso, atom) \
50 if (cso != atom.state) { \
55 static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA,
56 unsigned dstRGB, unsigned dstA)
58 /* If the blend equation is ADD or REVERSE_SUBTRACT,
59 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
60 * will not be changed.
61 * Notice that the dst factors are the src factors inverted. */
62 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
63 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
64 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
65 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
66 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
67 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
68 srcA == PIPE_BLENDFACTOR_ZERO) &&
69 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
70 dstRGB == PIPE_BLENDFACTOR_ONE) &&
71 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
72 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
73 dstA == PIPE_BLENDFACTOR_ONE);
76 static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA,
77 unsigned dstRGB, unsigned dstA)
79 /* If the blend equation is ADD or REVERSE_SUBTRACT,
80 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
81 * will not be changed.
82 * Notice that the dst factors are the src factors inverted. */
83 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
84 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
85 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
86 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
87 srcA == PIPE_BLENDFACTOR_ZERO) &&
88 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
89 dstRGB == PIPE_BLENDFACTOR_ONE) &&
90 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
91 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
92 dstA == PIPE_BLENDFACTOR_ONE);
95 static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA,
96 unsigned dstRGB, unsigned dstA)
98 /* If the blend equation is ADD or REVERSE_SUBTRACT,
99 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
100 * will not be changed.
101 * Notice that the dst factors are the src factors inverted. */
102 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
103 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
104 (srcA == PIPE_BLENDFACTOR_ZERO) &&
105 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
106 dstRGB == PIPE_BLENDFACTOR_ONE) &&
107 (dstA == PIPE_BLENDFACTOR_ONE);
110 static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA,
111 unsigned dstRGB, unsigned dstA)
113 /* If the blend equation is ADD or REVERSE_SUBTRACT,
114 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
115 * will not be changed.
116 * Notice that the dst factors are the src factors inverted. */
117 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
118 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
119 (srcA == PIPE_BLENDFACTOR_ZERO) &&
120 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
121 dstRGB == PIPE_BLENDFACTOR_ONE) &&
122 (dstA == PIPE_BLENDFACTOR_ONE);
125 static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA,
126 unsigned dstRGB, unsigned dstA)
128 /* If the blend equation is ADD or REVERSE_SUBTRACT,
129 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
130 * the colorbuffer will not be changed.
131 * Notice that the dst factors are the src factors inverted. */
132 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
133 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
134 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
135 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
136 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
137 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
138 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
139 srcA == PIPE_BLENDFACTOR_ZERO) &&
140 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
141 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
142 dstRGB == PIPE_BLENDFACTOR_ONE) &&
143 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
144 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
145 dstA == PIPE_BLENDFACTOR_ONE);
148 static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA,
149 unsigned dstRGB, unsigned dstA)
151 /* If the blend equation is ADD or REVERSE_SUBTRACT,
152 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
153 * the colorbuffer will not be changed.
154 * Notice that the dst factors are the src factors inverted. */
155 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
156 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
157 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
158 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
159 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
160 srcA == PIPE_BLENDFACTOR_ZERO) &&
161 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
162 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
163 dstRGB == PIPE_BLENDFACTOR_ONE) &&
164 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
165 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
166 dstA == PIPE_BLENDFACTOR_ONE);
169 static unsigned bgra_cmask(unsigned mask)
171 /* Gallium uses RGBA color ordering while R300 expects BGRA. */
173 return ((mask & PIPE_MASK_R) << 2) |
174 ((mask & PIPE_MASK_B) >> 2) |
175 (mask & (PIPE_MASK_G | PIPE_MASK_A));
178 /* Create a new blend state based on the CSO blend state.
180 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
181 static void* r300_create_blend_state(struct pipe_context* pipe,
182 const struct pipe_blend_state* state)
184 struct r300_screen* r300screen = r300_screen(pipe->screen);
185 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
186 uint32_t blend_control = 0; /* R300_RB3D_CBLEND: 0x4e04 */
187 uint32_t alpha_blend_control = 0; /* R300_RB3D_ABLEND: 0x4e08 */
188 uint32_t color_channel_mask = 0; /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
189 uint32_t rop = 0; /* R300_RB3D_ROPCNTL: 0x4e18 */
190 uint32_t dither = 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */
193 if (state->rt[0].blend_enable)
195 unsigned eqRGB = state->rt[0].rgb_func;
196 unsigned srcRGB = state->rt[0].rgb_src_factor;
197 unsigned dstRGB = state->rt[0].rgb_dst_factor;
199 unsigned eqA = state->rt[0].alpha_func;
200 unsigned srcA = state->rt[0].alpha_src_factor;
201 unsigned dstA = state->rt[0].alpha_dst_factor;
203 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
204 * this is just the crappy D3D naming */
205 blend_control = R300_ALPHA_BLEND_ENABLE |
206 r300_translate_blend_function(eqRGB) |
207 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
208 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
210 /* Optimization: some operations do not require the destination color.
212 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
213 * otherwise blending gives incorrect results. It seems to be
215 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
216 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
217 dstRGB != PIPE_BLENDFACTOR_ZERO ||
218 dstA != PIPE_BLENDFACTOR_ZERO ||
219 srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
220 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
221 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
222 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
223 srcA == PIPE_BLENDFACTOR_DST_COLOR ||
224 srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
225 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
226 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
227 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) {
228 /* Enable reading from the colorbuffer. */
229 blend_control |= R300_READ_ENABLE;
231 if (r300screen->caps.is_r500) {
232 /* Optimization: Depending on incoming pixels, we can
233 * conditionally disable the reading in hardware... */
234 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN &&
235 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) {
236 /* Disable reading if SRC_ALPHA == 0. */
237 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
238 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
239 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
240 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
241 dstA == PIPE_BLENDFACTOR_ZERO)) {
242 blend_control |= R500_SRC_ALPHA_0_NO_READ;
245 /* Disable reading if SRC_ALPHA == 1. */
246 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
247 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
248 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
249 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
250 dstA == PIPE_BLENDFACTOR_ZERO)) {
251 blend_control |= R500_SRC_ALPHA_1_NO_READ;
257 /* Optimization: discard pixels which don't change the colorbuffer.
259 * The code below is non-trivial and some math is involved.
261 * Discarding pixels must be disabled when FP16 AA is enabled.
262 * This is a hardware bug. Also, this implementation wouldn't work
263 * with FP blending enabled and equation clamping disabled.
265 * Equations other than ADD are rarely used and therefore won't be
267 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) &&
268 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) {
270 * REVERSE_SUBTRACT: Y-X
273 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
274 * then CB will not be changed.
276 * Given the srcFactor and dstFactor variables, we can derive
277 * what src and dst should be equal to and discard appropriate
280 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) {
281 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
282 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA,
284 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1;
285 } else if (blend_discard_if_src_color_0(srcRGB, srcA,
287 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0;
288 } else if (blend_discard_if_src_color_1(srcRGB, srcA,
290 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1;
291 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA,
294 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0;
295 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA,
298 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1;
303 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
304 blend_control |= R300_SEPARATE_ALPHA_ENABLE;
305 alpha_blend_control =
306 r300_translate_blend_function(eqA) |
307 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
308 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
312 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
313 if (state->logicop_enable) {
314 rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
315 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
318 /* Color channel masks for all MRTs. */
319 color_channel_mask = bgra_cmask(state->rt[0].colormask);
320 if (r300screen->caps.is_r500 && state->independent_blend_enable) {
321 if (state->rt[1].blend_enable) {
322 color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4;
324 if (state->rt[2].blend_enable) {
325 color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8;
327 if (state->rt[3].blend_enable) {
328 color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12;
332 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
333 * state. Since it's an optional implementation detail, we can leave it
334 * out and never dither.
336 * This could be revisited if we ever get quality or conformance hints.
339 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
340 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
344 /* Build a command buffer. */
345 BEGIN_CB(blend->cb, 8);
346 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
347 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
348 OUT_CB(blend_control);
349 OUT_CB(alpha_blend_control);
350 OUT_CB(color_channel_mask);
351 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
354 /* The same as above, but with no colorbuffer reads and writes. */
355 BEGIN_CB(blend->cb_no_readwrite, 8);
356 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
357 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
361 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
367 /* Bind blend state. */
368 static void r300_bind_blend_state(struct pipe_context* pipe,
371 struct r300_context* r300 = r300_context(pipe);
373 UPDATE_STATE(state, r300->blend_state);
376 /* Free blend state. */
377 static void r300_delete_blend_state(struct pipe_context* pipe,
383 /* Convert float to 10bit integer */
384 static unsigned float_to_fixed10(float f)
386 return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
390 * Setup both R300 and R500 registers, figure out later which one to write. */
391 static void r300_set_blend_color(struct pipe_context* pipe,
392 const struct pipe_blend_color* color)
394 struct r300_context* r300 = r300_context(pipe);
395 struct r300_blend_color_state* state =
396 (struct r300_blend_color_state*)r300->blend_color_state.state;
399 if (r300->screen->caps.is_r500) {
400 /* XXX if FP16 blending is enabled, we should use the FP16 format */
401 BEGIN_CB(state->cb, 3);
402 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
403 OUT_CB(float_to_fixed10(color->color[0]) |
404 (float_to_fixed10(color->color[3]) << 16));
405 OUT_CB(float_to_fixed10(color->color[2]) |
406 (float_to_fixed10(color->color[1]) << 16));
410 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
412 BEGIN_CB(state->cb, 2);
413 OUT_CB_REG(R300_RB3D_BLEND_COLOR, uc.ui);
417 r300->blend_color_state.dirty = TRUE;
420 static void r300_set_clip_state(struct pipe_context* pipe,
421 const struct pipe_clip_state* state)
423 struct r300_context* r300 = r300_context(pipe);
424 struct r300_clip_state *clip =
425 (struct r300_clip_state*)r300->clip_state.state;
430 if (r300->screen->caps.has_tcl) {
431 BEGIN_CB(clip->cb, 29);
432 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG,
433 (r300->screen->caps.is_r500 ?
434 R500_PVS_UCP_START : R300_PVS_UCP_START));
435 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4);
436 OUT_CB_TABLE(state->ucp, 6 * 4);
437 OUT_CB_REG(R300_VAP_CLIP_CNTL, ((1 << state->nr) - 1) |
438 R300_PS_UCP_MODE_CLIP_AS_TRIFAN);
441 r300->clip_state.dirty = TRUE;
443 draw_flush(r300->draw);
444 draw_set_clip_state(r300->draw, state);
449 r300_set_sample_mask(struct pipe_context *pipe,
450 unsigned sample_mask)
455 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
457 * This contains the depth buffer, stencil buffer, alpha test, and such.
458 * On the Radeon, depth and stencil buffer setup are intertwined, which is
459 * the reason for some of the strange-looking assignments across registers. */
461 r300_create_dsa_state(struct pipe_context* pipe,
462 const struct pipe_depth_stencil_alpha_state* state)
464 struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps;
465 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
470 /* Depth test setup. */
471 if (state->depth.enabled) {
472 dsa->z_buffer_control |= R300_Z_ENABLE;
474 if (state->depth.writemask) {
475 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
478 dsa->z_stencil_control |=
479 (r300_translate_depth_stencil_function(state->depth.func) <<
483 /* Stencil buffer setup. */
484 if (state->stencil[0].enabled) {
485 dsa->z_buffer_control |= R300_STENCIL_ENABLE;
486 dsa->z_stencil_control |=
487 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
488 R300_S_FRONT_FUNC_SHIFT) |
489 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
490 R300_S_FRONT_SFAIL_OP_SHIFT) |
491 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
492 R300_S_FRONT_ZPASS_OP_SHIFT) |
493 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
494 R300_S_FRONT_ZFAIL_OP_SHIFT);
496 dsa->stencil_ref_mask =
497 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
498 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
500 if (state->stencil[1].enabled) {
501 dsa->two_sided = TRUE;
503 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
504 dsa->z_stencil_control |=
505 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
506 R300_S_BACK_FUNC_SHIFT) |
507 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
508 R300_S_BACK_SFAIL_OP_SHIFT) |
509 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
510 R300_S_BACK_ZPASS_OP_SHIFT) |
511 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
512 R300_S_BACK_ZFAIL_OP_SHIFT);
514 dsa->stencil_ref_bf =
515 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
516 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
519 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
521 dsa->two_sided_stencil_ref =
522 (state->stencil[0].valuemask != state->stencil[1].valuemask ||
523 state->stencil[0].writemask != state->stencil[1].writemask);
528 /* Alpha test setup. */
529 if (state->alpha.enabled) {
530 dsa->alpha_function =
531 r300_translate_alpha_function(state->alpha.func) |
532 R300_FG_ALPHA_FUNC_ENABLE;
534 /* We could use 10bit alpha ref but who needs that? */
535 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
538 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
541 BEGIN_CB(&dsa->cb_begin, 8);
542 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
543 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
544 OUT_CB(dsa->z_buffer_control);
545 OUT_CB(dsa->z_stencil_control);
546 OUT_CB(dsa->stencil_ref_mask);
547 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf);
550 BEGIN_CB(dsa->cb_no_readwrite, 8);
551 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
552 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
556 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
562 static void r300_dsa_inject_stencilref(struct r300_context *r300)
564 struct r300_dsa_state *dsa =
565 (struct r300_dsa_state*)r300->dsa_state.state;
570 dsa->stencil_ref_mask =
571 (dsa->stencil_ref_mask & ~R300_STENCILREF_MASK) |
572 r300->stencil_ref.ref_value[0];
573 dsa->stencil_ref_bf =
574 (dsa->stencil_ref_bf & ~R300_STENCILREF_MASK) |
575 r300->stencil_ref.ref_value[1];
578 /* Bind DSA state. */
579 static void r300_bind_dsa_state(struct pipe_context* pipe,
582 struct r300_context* r300 = r300_context(pipe);
588 UPDATE_STATE(state, r300->dsa_state);
590 r300_dsa_inject_stencilref(r300);
593 /* Free DSA state. */
594 static void r300_delete_dsa_state(struct pipe_context* pipe,
600 static void r300_set_stencil_ref(struct pipe_context* pipe,
601 const struct pipe_stencil_ref* sr)
603 struct r300_context* r300 = r300_context(pipe);
605 r300->stencil_ref = *sr;
607 r300_dsa_inject_stencilref(r300);
608 r300->dsa_state.dirty = TRUE;
611 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
612 static void r300_fb_set_tiling_flags(struct r300_context *r300,
613 const struct pipe_framebuffer_state *old_state,
614 const struct pipe_framebuffer_state *new_state)
616 struct r300_texture *tex;
619 /* Set tiling flags for new surfaces. */
620 for (i = 0; i < new_state->nr_cbufs; i++) {
621 tex = r300_texture(new_state->cbufs[i]->texture);
622 level = new_state->cbufs[i]->level;
624 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
625 tex->pitch[0] * util_format_get_blocksize(tex->b.b.format),
627 tex->mip_macrotile[level]);
629 if (new_state->zsbuf) {
630 tex = r300_texture(new_state->zsbuf->texture);
631 level = new_state->zsbuf->level;
633 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
634 tex->pitch[0] * util_format_get_blocksize(tex->b.b.format),
636 tex->mip_macrotile[level]);
640 static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index,
643 struct pipe_resource *tex = surf->texture;
644 struct r300_texture *rtex = r300_texture(tex);
647 "r300: %s[%i] Dim: %ix%i, Offset: %i, ZSlice: %i, "
648 "Face: %i, Level: %i, Format: %s\n"
650 "r300: TEX: Macro: %s, Micro: %s, Pitch: %i, "
651 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
653 binding, index, surf->width, surf->height, surf->offset,
654 surf->zslice, surf->face, surf->level,
655 util_format_short_name(surf->format),
657 rtex->macrotile ? "YES" : " NO", rtex->microtile ? "YES" : " NO",
658 rtex->hwpitch[0], tex->width0, tex->height0, tex->depth0,
659 tex->last_level, util_format_short_name(tex->format));
663 r300_set_framebuffer_state(struct pipe_context* pipe,
664 const struct pipe_framebuffer_state* state)
666 struct r300_context* r300 = r300_context(pipe);
667 struct pipe_framebuffer_state *old_state = r300->fb_state.state;
668 unsigned max_width, max_height, i;
669 uint32_t zbuffer_bpp = 0;
671 if (state->nr_cbufs > 4) {
672 fprintf(stderr, "r300: Implementation error: Too many MRTs in %s, "
673 "refusing to bind framebuffer state!\n", __FUNCTION__);
677 if (r300->screen->caps.is_r500) {
678 max_width = max_height = 4096;
679 } else if (r300->screen->caps.is_r400) {
680 max_width = max_height = 4021;
682 max_width = max_height = 2560;
685 if (state->width > max_width || state->height > max_height) {
686 fprintf(stderr, "r300: Implementation error: Render targets are too "
687 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__);
692 draw_flush(r300->draw);
695 r300->fb_state.dirty = TRUE;
697 /* If nr_cbufs is changed from zero to non-zero or vice versa... */
698 if (!!old_state->nr_cbufs != !!state->nr_cbufs) {
699 r300->blend_state.dirty = TRUE;
701 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
702 if (!!old_state->zsbuf != !!state->zsbuf) {
703 r300->dsa_state.dirty = TRUE;
706 /* The tiling flags are dependent on the surface miplevel, unfortunately. */
707 r300_fb_set_tiling_flags(r300, r300->fb_state.state, state);
709 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state));
711 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) +
712 (state->zsbuf ? 10 : 0) + 9;
714 /* Polygon offset depends on the zbuffer bit depth. */
715 if (state->zsbuf && r300->polygon_offset_enabled) {
716 switch (util_format_get_blocksize(state->zsbuf->texture->format)) {
725 if (r300->zbuffer_bpp != zbuffer_bpp) {
726 r300->zbuffer_bpp = zbuffer_bpp;
727 r300->rs_state.dirty = TRUE;
731 if (DBG_ON(r300, DBG_FB)) {
732 fprintf(stderr, "r300: set_framebuffer_state:\n");
733 for (i = 0; i < state->nr_cbufs; i++) {
734 r300_print_fb_surf_info(state->cbufs[i], i, "CB");
737 r300_print_fb_surf_info(state->zsbuf, 0, "ZB");
742 /* Create fragment shader state. */
743 static void* r300_create_fs_state(struct pipe_context* pipe,
744 const struct pipe_shader_state* shader)
746 struct r300_fragment_shader* fs = NULL;
748 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
750 /* Copy state directly into shader. */
752 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
757 void r300_mark_fs_code_dirty(struct r300_context *r300)
759 struct r300_fragment_shader* fs = r300_fs(r300);
761 r300->fs.dirty = TRUE;
762 r300->fs_rc_constant_state.dirty = TRUE;
763 r300->fs_constants.dirty = TRUE;
764 r300->fs.size = fs->shader->cb_code_size;
766 if (r300->screen->caps.is_r500) {
767 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7;
768 r300->fs_constants.size = fs->shader->externals_count * 4 + 3;
770 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5;
771 r300->fs_constants.size = fs->shader->externals_count * 4 + 1;
775 /* Bind fragment shader state. */
776 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
778 struct r300_context* r300 = r300_context(pipe);
779 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
782 r300->fs.state = NULL;
787 r300_pick_fragment_shader(r300);
788 r300_mark_fs_code_dirty(r300);
790 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
793 /* Delete fragment shader state. */
794 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
796 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
797 struct r300_fragment_shader_code *tmp, *ptr = fs->first;
802 rc_constants_destroy(&tmp->code.constants);
806 FREE((void*)fs->state.tokens);
810 static void r300_set_polygon_stipple(struct pipe_context* pipe,
811 const struct pipe_poly_stipple* state)
813 /* XXX no idea how to set this up, but not terribly important */
816 /* Create a new rasterizer state based on the CSO rasterizer state.
818 * This is a very large chunk of state, and covers most of the graphics
819 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
821 * In a not entirely unironic sidenote, this state has nearly nothing to do
822 * with the actual block on the Radeon called the rasterizer (RS). */
823 static void* r300_create_rs_state(struct pipe_context* pipe,
824 const struct pipe_rasterizer_state* state)
826 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
830 /* Copy rasterizer state. */
832 rs->rs_draw = *state;
834 /* Override some states for Draw. */
835 rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */
837 #ifdef PIPE_ARCH_LITTLE_ENDIAN
838 rs->vap_control_status = R300_VC_NO_SWAP;
840 rs->vap_control_status = R300_VC_32BIT_SWAP;
843 /* If no TCL engine is present, turn off the HW TCL. */
844 if (!r300_screen(pipe->screen)->caps.has_tcl) {
845 rs->vap_control_status |= R300_VAP_TCL_BYPASS;
848 /* Point size width and height. */
850 pack_float_16_6x(state->point_size) |
851 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
853 /* Point size clamping. */
854 if (state->point_size_per_vertex) {
855 /* Per-vertex point size.
856 * Clamp to [0, max FB size] */
857 psiz = pipe->screen->get_paramf(pipe->screen,
858 PIPE_CAP_MAX_POINT_WIDTH);
860 pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT;
862 /* We cannot disable the point-size vertex output,
864 psiz = state->point_size;
866 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) |
867 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT);
871 rs->line_control = pack_float_16_6x(state->line_width) |
872 R300_GA_LINE_CNTL_END_TYPE_COMP;
874 /* Enable polygon mode */
875 if (state->fill_front != PIPE_POLYGON_MODE_FILL ||
876 state->fill_back != PIPE_POLYGON_MODE_FILL) {
877 rs->polygon_mode = R300_GA_POLY_MODE_DUAL;
881 if (state->front_ccw)
882 rs->cull_mode = R300_FRONT_FACE_CCW;
884 rs->cull_mode = R300_FRONT_FACE_CW;
887 if (util_get_offset(state, state->fill_front)) {
888 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
890 if (util_get_offset(state, state->fill_back)) {
891 rs->polygon_offset_enable |= R300_BACK_ENABLE;
895 if (rs->polygon_mode) {
897 r300_translate_polygon_mode_front(state->fill_front);
899 r300_translate_polygon_mode_back(state->fill_back);
902 if (state->cull_face & PIPE_FACE_FRONT) {
903 rs->cull_mode |= R300_CULL_FRONT;
905 if (state->cull_face & PIPE_FACE_BACK) {
906 rs->cull_mode |= R300_CULL_BACK;
909 if (rs->polygon_offset_enable) {
910 rs->depth_offset = state->offset_units;
911 rs->depth_scale = state->offset_scale;
914 if (state->line_stipple_enable) {
915 rs->line_stipple_config =
916 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
917 (fui((float)state->line_stipple_factor) &
918 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
919 /* XXX this might need to be scaled up */
920 rs->line_stipple_value = state->line_stipple_pattern;
923 if (state->flatshade) {
924 rs->color_control = R300_SHADE_MODEL_FLAT;
926 rs->color_control = R300_SHADE_MODEL_SMOOTH;
929 rs->clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
932 if (state->sprite_coord_enable) {
933 rs->stuffing_enable = R300_GB_POINT_STUFF_ENABLE;
934 for (i = 0; i < 8; i++) {
935 if (state->sprite_coord_enable & (1 << i))
936 rs->stuffing_enable |=
937 R300_GB_TEX_STR << (R300_GB_TEX0_SOURCE_SHIFT + (i*2));
940 rs->point_texcoord_left = 0.0f;
941 rs->point_texcoord_right = 1.0f;
943 switch (state->sprite_coord_mode) {
944 case PIPE_SPRITE_COORD_UPPER_LEFT:
945 rs->point_texcoord_top = 0.0f;
946 rs->point_texcoord_bottom = 1.0f;
948 case PIPE_SPRITE_COORD_LOWER_LEFT:
949 rs->point_texcoord_top = 1.0f;
950 rs->point_texcoord_bottom = 0.0f;
955 if (state->gl_rasterization_rules) {
956 rs->multisample_position_0 = 0x66666666;
957 rs->multisample_position_1 = 0x6666666;
963 /* Bind rasterizer state. */
964 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
966 struct r300_context* r300 = r300_context(pipe);
967 struct r300_rs_state* rs = (struct r300_rs_state*)state;
968 int last_sprite_coord_enable = r300->sprite_coord_enable;
969 boolean last_two_sided_color = r300->two_sided_color;
971 if (r300->draw && rs) {
972 draw_flush(r300->draw);
973 draw_set_rasterizer_state(r300->draw, &rs->rs_draw, state);
977 r300->polygon_offset_enabled = (rs->rs.offset_point ||
978 rs->rs.offset_line ||
980 r300->sprite_coord_enable = rs->rs.sprite_coord_enable;
981 r300->two_sided_color = rs->rs.light_twoside;
983 r300->polygon_offset_enabled = FALSE;
984 r300->sprite_coord_enable = 0;
985 r300->two_sided_color = FALSE;
988 UPDATE_STATE(state, r300->rs_state);
989 r300->rs_state.size = 25 + (r300->polygon_offset_enabled ? 5 : 0) +
990 (r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0) ? 5 : 0);
992 if (last_sprite_coord_enable != r300->sprite_coord_enable ||
993 last_two_sided_color != r300->two_sided_color) {
994 r300->rs_block_state.dirty = TRUE;
998 /* Free rasterizer state. */
999 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
1005 r300_create_sampler_state(struct pipe_context* pipe,
1006 const struct pipe_sampler_state* state)
1008 struct r300_context* r300 = r300_context(pipe);
1009 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
1010 boolean is_r500 = r300->screen->caps.is_r500;
1012 union util_color uc;
1014 sampler->state = *state;
1016 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
1017 * or MIN filter is NEAREST. Since texwrap produces same results
1018 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
1019 if (sampler->state.min_img_filter == PIPE_TEX_FILTER_NEAREST ||
1020 sampler->state.mag_img_filter == PIPE_TEX_FILTER_NEAREST) {
1022 if (sampler->state.wrap_s == PIPE_TEX_WRAP_CLAMP)
1023 sampler->state.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1024 else if (sampler->state.wrap_s == PIPE_TEX_WRAP_MIRROR_CLAMP)
1025 sampler->state.wrap_s = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1028 if (sampler->state.wrap_t == PIPE_TEX_WRAP_CLAMP)
1029 sampler->state.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1030 else if (sampler->state.wrap_t == PIPE_TEX_WRAP_MIRROR_CLAMP)
1031 sampler->state.wrap_t = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1034 if (sampler->state.wrap_r == PIPE_TEX_WRAP_CLAMP)
1035 sampler->state.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1036 else if (sampler->state.wrap_r == PIPE_TEX_WRAP_MIRROR_CLAMP)
1037 sampler->state.wrap_r = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1041 (r300_translate_wrap(sampler->state.wrap_s) << R300_TX_WRAP_S_SHIFT) |
1042 (r300_translate_wrap(sampler->state.wrap_t) << R300_TX_WRAP_T_SHIFT) |
1043 (r300_translate_wrap(sampler->state.wrap_r) << R300_TX_WRAP_R_SHIFT);
1045 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
1046 state->mag_img_filter,
1047 state->min_mip_filter,
1048 state->max_anisotropy > 0);
1050 sampler->filter0 |= r300_anisotropy(state->max_anisotropy);
1052 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
1053 /* We must pass these to the merge function to clamp them properly. */
1054 sampler->min_lod = MAX2((unsigned)state->min_lod, 0);
1055 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0);
1057 lod_bias = CLAMP((int)(state->lod_bias * 32 + 1), -(1 << 9), (1 << 9) - 1);
1059 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
1061 /* This is very high quality anisotropic filtering for R5xx.
1062 * It's good for benchmarking the performance of texturing but
1063 * in practice we don't want to slow down the driver because it's
1064 * a pretty good performance killer. Feel free to play with it. */
1065 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) {
1066 sampler->filter1 |= r500_anisotropy(state->max_anisotropy);
1069 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
1070 sampler->border_color = uc.ui;
1072 /* R500-specific fixups and optimizations */
1073 if (r300->screen->caps.is_r500) {
1074 sampler->filter1 |= R500_BORDER_FIX;
1077 return (void*)sampler;
1080 static void r300_bind_sampler_states(struct pipe_context* pipe,
1084 struct r300_context* r300 = r300_context(pipe);
1085 struct r300_textures_state* state =
1086 (struct r300_textures_state*)r300->textures_state.state;
1087 unsigned tex_units = r300->screen->caps.num_tex_units;
1089 if (count > tex_units) {
1093 memcpy(state->sampler_states, states, sizeof(void*) * count);
1094 state->sampler_state_count = count;
1096 r300->textures_state.dirty = TRUE;
1099 static void r300_lacks_vertex_textures(struct pipe_context* pipe,
1105 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
1110 static void r300_set_fragment_sampler_views(struct pipe_context* pipe,
1112 struct pipe_sampler_view** views)
1114 struct r300_context* r300 = r300_context(pipe);
1115 struct r300_textures_state* state =
1116 (struct r300_textures_state*)r300->textures_state.state;
1117 struct r300_texture *texture;
1119 unsigned tex_units = r300->screen->caps.num_tex_units;
1120 boolean dirty_tex = FALSE;
1122 if (count > tex_units) {
1126 for (i = 0; i < count; i++) {
1127 if (&state->sampler_views[i]->base != views[i]) {
1128 pipe_sampler_view_reference(
1129 (struct pipe_sampler_view**)&state->sampler_views[i],
1136 /* A new sampler view (= texture)... */
1139 /* Set the texrect factor in the fragment shader.
1140 * Needed for RECT and NPOT fallback. */
1141 texture = r300_texture(views[i]->texture);
1142 if (texture->uses_pitch) {
1143 r300->fs_rc_constant_state.dirty = TRUE;
1148 for (i = count; i < tex_units; i++) {
1149 if (state->sampler_views[i]) {
1150 pipe_sampler_view_reference(
1151 (struct pipe_sampler_view**)&state->sampler_views[i],
1156 state->sampler_view_count = count;
1158 r300->textures_state.dirty = TRUE;
1161 r300->texture_cache_inval.dirty = TRUE;
1165 static struct pipe_sampler_view *
1166 r300_create_sampler_view(struct pipe_context *pipe,
1167 struct pipe_resource *texture,
1168 const struct pipe_sampler_view *templ)
1170 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view);
1171 struct r300_texture *tex = r300_texture(texture);
1174 view->base = *templ;
1175 view->base.reference.count = 1;
1176 view->base.context = pipe;
1177 view->base.texture = NULL;
1178 pipe_resource_reference(&view->base.texture, texture);
1180 view->swizzle[0] = templ->swizzle_r;
1181 view->swizzle[1] = templ->swizzle_g;
1182 view->swizzle[2] = templ->swizzle_b;
1183 view->swizzle[3] = templ->swizzle_a;
1185 view->format = tex->tx_format;
1186 view->format.format1 |= r300_translate_texformat(templ->format,
1188 if (r300_screen(pipe->screen)->caps.is_r500) {
1189 view->format.format2 |= r500_tx_format_msb_bit(templ->format);
1193 return (struct pipe_sampler_view*)view;
1197 r300_sampler_view_destroy(struct pipe_context *pipe,
1198 struct pipe_sampler_view *view)
1200 pipe_resource_reference(&view->texture, NULL);
1204 static void r300_set_scissor_state(struct pipe_context* pipe,
1205 const struct pipe_scissor_state* state)
1207 struct r300_context* r300 = r300_context(pipe);
1209 memcpy(r300->scissor_state.state, state,
1210 sizeof(struct pipe_scissor_state));
1212 r300->scissor_state.dirty = TRUE;
1215 static void r300_set_viewport_state(struct pipe_context* pipe,
1216 const struct pipe_viewport_state* state)
1218 struct r300_context* r300 = r300_context(pipe);
1219 struct r300_viewport_state* viewport =
1220 (struct r300_viewport_state*)r300->viewport_state.state;
1222 r300->viewport = *state;
1225 draw_flush(r300->draw);
1226 draw_set_viewport_state(r300->draw, state);
1227 viewport->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT;
1231 /* Do the transform in HW. */
1232 viewport->vte_control = R300_VTX_W0_FMT;
1234 if (state->scale[0] != 1.0f) {
1235 viewport->xscale = state->scale[0];
1236 viewport->vte_control |= R300_VPORT_X_SCALE_ENA;
1238 if (state->scale[1] != 1.0f) {
1239 viewport->yscale = state->scale[1];
1240 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA;
1242 if (state->scale[2] != 1.0f) {
1243 viewport->zscale = state->scale[2];
1244 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA;
1246 if (state->translate[0] != 0.0f) {
1247 viewport->xoffset = state->translate[0];
1248 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA;
1250 if (state->translate[1] != 0.0f) {
1251 viewport->yoffset = state->translate[1];
1252 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA;
1254 if (state->translate[2] != 0.0f) {
1255 viewport->zoffset = state->translate[2];
1256 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA;
1259 r300->viewport_state.dirty = TRUE;
1260 if (r300->fs.state && r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) {
1261 r300->fs_rc_constant_state.dirty = TRUE;
1265 static void r300_set_vertex_buffers(struct pipe_context* pipe,
1267 const struct pipe_vertex_buffer* buffers)
1269 struct r300_context* r300 = r300_context(pipe);
1270 struct pipe_vertex_buffer *vbo;
1271 unsigned i, max_index = (1 << 24) - 1;
1272 boolean any_user_buffer = FALSE;
1274 if (count == r300->vertex_buffer_count &&
1275 memcmp(r300->vertex_buffer, buffers,
1276 sizeof(struct pipe_vertex_buffer) * count) == 0) {
1280 if (r300->screen->caps.has_tcl) {
1282 r300->incompatible_vb_layout = FALSE;
1284 /* Check if the strides and offsets are aligned to the size of DWORD. */
1285 for (i = 0; i < count; i++) {
1286 if (buffers[i].buffer) {
1287 if (buffers[i].stride % 4 != 0 ||
1288 buffers[i].buffer_offset % 4 != 0) {
1289 r300->incompatible_vb_layout = TRUE;
1295 for (i = 0; i < count; i++) {
1296 /* Why, yes, I AM casting away constness. How did you know? */
1297 vbo = (struct pipe_vertex_buffer*)&buffers[i];
1299 /* Skip NULL buffers */
1300 if (!buffers[i].buffer) {
1304 if (r300_buffer_is_user_buffer(vbo->buffer)) {
1305 any_user_buffer = TRUE;
1308 if (vbo->max_index == ~0) {
1309 /* if no VBO stride then only one vertex value so max index is 1 */
1310 /* should think about converting to VS constants like svga does */
1315 (vbo->buffer->width0 - vbo->buffer_offset) / vbo->stride;
1318 max_index = MIN2(vbo->max_index, max_index);
1321 r300->any_user_vbs = any_user_buffer;
1322 r300->vertex_buffer_max_index = max_index;
1326 draw_flush(r300->draw);
1327 draw_set_vertex_buffers(r300->draw, count, buffers);
1331 for (i = 0; i < count; i++) {
1332 /* Reference our buffer. */
1333 pipe_resource_reference(&r300->vertex_buffer[i].buffer, buffers[i].buffer);
1335 for (; i < r300->vertex_buffer_count; i++) {
1336 /* Dereference any old buffers. */
1337 pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL);
1340 memcpy(r300->vertex_buffer, buffers,
1341 sizeof(struct pipe_vertex_buffer) * count);
1342 r300->vertex_buffer_count = count;
1345 /* Initialize the PSC tables. */
1346 static void r300_vertex_psc(struct r300_vertex_element_state *velems)
1348 struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
1349 uint16_t type, swizzle;
1350 enum pipe_format format;
1353 if (velems->count > 16) {
1354 fprintf(stderr, "r300: More than 16 vertex elements are not supported,"
1355 " requested %i, using 16.\n", velems->count);
1359 /* Vertex shaders have no semantics on their inputs,
1360 * so PSC should just route stuff based on the vertex elements,
1361 * and not on attrib information. */
1362 for (i = 0; i < velems->count; i++) {
1363 format = velems->hw_format[i];
1365 type = r300_translate_vertex_data_type(format);
1366 if (type == R300_INVALID_FORMAT) {
1367 fprintf(stderr, "r300: Bad vertex format %s.\n",
1368 util_format_short_name(format));
1373 type |= i << R300_DST_VEC_LOC_SHIFT;
1374 swizzle = r300_translate_vertex_data_swizzle(format);
1377 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
1378 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
1380 vstream->vap_prog_stream_cntl[i >> 1] |= type;
1381 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
1385 /* Set the last vector in the PSC. */
1389 vstream->vap_prog_stream_cntl[i >> 1] |=
1390 (R300_LAST_VEC << (i & 1 ? 16 : 0));
1392 vstream->count = (i >> 1) + 1;
1395 #define FORMAT_REPLACE(what, withwhat) \
1396 case PIPE_FORMAT_##what: *format = PIPE_FORMAT_##withwhat; break
1398 static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
1400 const struct pipe_vertex_element* attribs)
1402 struct r300_vertex_element_state *velems;
1404 enum pipe_format *format;
1406 assert(count <= PIPE_MAX_ATTRIBS);
1407 velems = CALLOC_STRUCT(r300_vertex_element_state);
1408 if (velems != NULL) {
1409 velems->count = count;
1410 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count);
1412 if (r300_screen(pipe->screen)->caps.has_tcl) {
1413 /* Set the best hw format in case the original format is not
1414 * supported by hw. */
1415 for (i = 0; i < count; i++) {
1416 velems->hw_format[i] = velems->velem[i].src_format;
1417 format = &velems->hw_format[i];
1419 /* This is basically the list of unsupported formats.
1420 * For now we don't care about the alignment, that's going to
1421 * be sorted out after the PSC setup. */
1423 FORMAT_REPLACE(R64_FLOAT, R32_FLOAT);
1424 FORMAT_REPLACE(R64G64_FLOAT, R32G32_FLOAT);
1425 FORMAT_REPLACE(R64G64B64_FLOAT, R32G32B32_FLOAT);
1426 FORMAT_REPLACE(R64G64B64A64_FLOAT, R32G32B32A32_FLOAT);
1428 FORMAT_REPLACE(R32_UNORM, R32_FLOAT);
1429 FORMAT_REPLACE(R32G32_UNORM, R32G32_FLOAT);
1430 FORMAT_REPLACE(R32G32B32_UNORM, R32G32B32_FLOAT);
1431 FORMAT_REPLACE(R32G32B32A32_UNORM, R32G32B32A32_FLOAT);
1433 FORMAT_REPLACE(R32_USCALED, R32_FLOAT);
1434 FORMAT_REPLACE(R32G32_USCALED, R32G32_FLOAT);
1435 FORMAT_REPLACE(R32G32B32_USCALED, R32G32B32_FLOAT);
1436 FORMAT_REPLACE(R32G32B32A32_USCALED,R32G32B32A32_FLOAT);
1438 FORMAT_REPLACE(R32_SNORM, R32_FLOAT);
1439 FORMAT_REPLACE(R32G32_SNORM, R32G32_FLOAT);
1440 FORMAT_REPLACE(R32G32B32_SNORM, R32G32B32_FLOAT);
1441 FORMAT_REPLACE(R32G32B32A32_SNORM, R32G32B32A32_FLOAT);
1443 FORMAT_REPLACE(R32_SSCALED, R32_FLOAT);
1444 FORMAT_REPLACE(R32G32_SSCALED, R32G32_FLOAT);
1445 FORMAT_REPLACE(R32G32B32_SSCALED, R32G32B32_FLOAT);
1446 FORMAT_REPLACE(R32G32B32A32_SSCALED,R32G32B32A32_FLOAT);
1448 FORMAT_REPLACE(R32_FIXED, R32_FLOAT);
1449 FORMAT_REPLACE(R32G32_FIXED, R32G32_FLOAT);
1450 FORMAT_REPLACE(R32G32B32_FIXED, R32G32B32_FLOAT);
1451 FORMAT_REPLACE(R32G32B32A32_FIXED, R32G32B32A32_FLOAT);
1456 velems->incompatible_layout =
1457 velems->incompatible_layout ||
1458 velems->velem[i].src_format != velems->hw_format[i] ||
1459 velems->velem[i].src_offset % 4 != 0;
1463 * The unused components will be replaced by (..., 0, 1). */
1464 r300_vertex_psc(velems);
1466 /* Align the formats to the size of DWORD.
1467 * We only care about the blocksizes of the formats since
1468 * swizzles are already set up. */
1469 for (i = 0; i < count; i++) {
1470 /* This is OK because we check for aligned strides too. */
1471 velems->hw_format_size[i] =
1472 align(util_format_get_blocksize(velems->hw_format[i]), 4);
1479 static void r300_bind_vertex_elements_state(struct pipe_context *pipe,
1482 struct r300_context *r300 = r300_context(pipe);
1483 struct r300_vertex_element_state *velems = state;
1485 if (velems == NULL) {
1489 r300->velems = velems;
1492 draw_flush(r300->draw);
1493 draw_set_vertex_elements(r300->draw, velems->count, velems->velem);
1497 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state);
1498 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2;
1501 static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state)
1506 static void* r300_create_vs_state(struct pipe_context* pipe,
1507 const struct pipe_shader_state* shader)
1509 struct r300_context* r300 = r300_context(pipe);
1511 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
1513 /* Copy state directly into shader. */
1514 vs->state = *shader;
1515 vs->state.tokens = tgsi_dup_tokens(shader->tokens);
1517 if (r300->screen->caps.has_tcl) {
1518 r300_init_vs_outputs(vs);
1519 r300_translate_vertex_shader(r300, vs);
1521 r300_draw_init_vertex_shader(r300->draw, vs);
1527 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
1529 struct r300_context* r300 = r300_context(pipe);
1530 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1533 r300->vs_state.state = NULL;
1536 if (vs == r300->vs_state.state) {
1539 r300->vs_state.state = vs;
1541 /* The majority of the RS block bits is dependent on the vertex shader. */
1542 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
1544 if (r300->screen->caps.has_tcl) {
1545 r300->vs_state.dirty = TRUE;
1546 r300->vs_state.size =
1547 vs->code.length + 9 +
1548 (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0);
1550 if (vs->externals_count) {
1551 r300->vs_constants.dirty = TRUE;
1552 r300->vs_constants.size = vs->externals_count * 4 + 3;
1554 r300->vs_constants.size = 0;
1557 r300->pvs_flush.dirty = TRUE;
1559 draw_flush(r300->draw);
1560 draw_bind_vertex_shader(r300->draw,
1561 (struct draw_vertex_shader*)vs->draw_vs);
1565 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
1567 struct r300_context* r300 = r300_context(pipe);
1568 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1570 if (r300->screen->caps.has_tcl) {
1571 rc_constants_destroy(&vs->code.constants);
1573 draw_delete_vertex_shader(r300->draw,
1574 (struct draw_vertex_shader*)vs->draw_vs);
1577 FREE((void*)vs->state.tokens);
1581 static void r300_set_constant_buffer(struct pipe_context *pipe,
1582 uint shader, uint index,
1583 struct pipe_resource *buf)
1585 struct r300_context* r300 = r300_context(pipe);
1586 struct r300_constant_buffer *cbuf;
1587 struct pipe_transfer *tr;
1589 int max_size = 0, max_size_bytes = 0, clamped_size = 0;
1592 case PIPE_SHADER_VERTEX:
1593 cbuf = (struct r300_constant_buffer*)r300->vs_constants.state;
1596 case PIPE_SHADER_FRAGMENT:
1597 cbuf = (struct r300_constant_buffer*)r300->fs_constants.state;
1598 if (r300->screen->caps.is_r500) {
1608 max_size_bytes = max_size * 4 * sizeof(float);
1610 if (buf == NULL || buf->width0 == 0 ||
1611 (mapped = pipe_buffer_map(pipe, buf, PIPE_TRANSFER_READ, &tr)) == NULL)
1617 if (shader == PIPE_SHADER_FRAGMENT ||
1618 (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) {
1619 assert((buf->width0 % (4 * sizeof(float))) == 0);
1621 /* Check the size of the constant buffer. */
1622 /* XXX Subtract immediates and RC_STATE_* variables. */
1623 if (buf->width0 > max_size_bytes) {
1624 fprintf(stderr, "r300: Max size of the constant buffer is "
1625 "%i*4 floats.\n", max_size);
1628 clamped_size = MIN2(buf->width0, max_size_bytes);
1629 cbuf->count = clamped_size / (4 * sizeof(float));
1631 if (shader == PIPE_SHADER_FRAGMENT && !r300->screen->caps.is_r500) {
1634 /* Convert constants to float24. */
1635 for (i = 0; i < cbuf->count; i++)
1636 for (j = 0; j < 4; j++)
1637 cbuf->constants[i][j] = pack_float24(mapped[i*4+j]);
1639 memcpy(cbuf->constants, mapped, clamped_size);
1643 if (shader == PIPE_SHADER_VERTEX) {
1644 if (r300->screen->caps.has_tcl) {
1645 if (r300->vs_constants.size) {
1646 r300->vs_constants.dirty = TRUE;
1648 r300->pvs_flush.dirty = TRUE;
1649 } else if (r300->draw) {
1650 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX,
1651 0, mapped, buf->width0);
1653 } else if (shader == PIPE_SHADER_FRAGMENT) {
1654 r300->fs_constants.dirty = TRUE;
1657 pipe_buffer_unmap(pipe, buf, tr);
1660 void r300_init_state_functions(struct r300_context* r300)
1662 r300->context.create_blend_state = r300_create_blend_state;
1663 r300->context.bind_blend_state = r300_bind_blend_state;
1664 r300->context.delete_blend_state = r300_delete_blend_state;
1666 r300->context.set_blend_color = r300_set_blend_color;
1668 r300->context.set_clip_state = r300_set_clip_state;
1669 r300->context.set_sample_mask = r300_set_sample_mask;
1671 r300->context.set_constant_buffer = r300_set_constant_buffer;
1673 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
1674 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
1675 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
1677 r300->context.set_stencil_ref = r300_set_stencil_ref;
1679 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
1681 r300->context.create_fs_state = r300_create_fs_state;
1682 r300->context.bind_fs_state = r300_bind_fs_state;
1683 r300->context.delete_fs_state = r300_delete_fs_state;
1685 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
1687 r300->context.create_rasterizer_state = r300_create_rs_state;
1688 r300->context.bind_rasterizer_state = r300_bind_rs_state;
1689 r300->context.delete_rasterizer_state = r300_delete_rs_state;
1691 r300->context.create_sampler_state = r300_create_sampler_state;
1692 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states;
1693 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures;
1694 r300->context.delete_sampler_state = r300_delete_sampler_state;
1696 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views;
1697 r300->context.create_sampler_view = r300_create_sampler_view;
1698 r300->context.sampler_view_destroy = r300_sampler_view_destroy;
1700 r300->context.set_scissor_state = r300_set_scissor_state;
1702 r300->context.set_viewport_state = r300_set_viewport_state;
1704 r300->context.set_vertex_buffers = r300_set_vertex_buffers;
1706 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state;
1707 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state;
1708 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state;
1710 r300->context.create_vs_state = r300_create_vs_state;
1711 r300->context.bind_vs_state = r300_bind_vs_state;
1712 r300->context.delete_vs_state = r300_delete_vs_state;