3345bae0990466ccf1b4d6324ce8fbc25dcacef6
[profile/ivi/mesa.git] / src / gallium / drivers / r300 / r300_state.c
1 /*
2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3  * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * on the rights to use, copy, modify, merge, publish, distribute, sub
9  * license, and/or sell copies of the Software, and to permit persons to whom
10  * the Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_framebuffer.h"
27 #include "util/u_half.h"
28 #include "util/u_math.h"
29 #include "util/u_mm.h"
30 #include "util/u_memory.h"
31 #include "util/u_pack_color.h"
32 #include "util/u_transfer.h"
33
34 #include "tgsi/tgsi_parse.h"
35
36 #include "pipe/p_config.h"
37
38 #include "r300_cb.h"
39 #include "r300_context.h"
40 #include "r300_emit.h"
41 #include "r300_reg.h"
42 #include "r300_screen.h"
43 #include "r300_screen_buffer.h"
44 #include "r300_state_inlines.h"
45 #include "r300_fs.h"
46 #include "r300_texture.h"
47 #include "r300_vs.h"
48
49 /* r300_state: Functions used to intialize state context by translating
50  * Gallium state objects into semi-native r300 state objects. */
51
52 #define UPDATE_STATE(cso, atom) \
53     if (cso != atom.state) { \
54         atom.state = cso;    \
55         r300_mark_atom_dirty(r300, &(atom));   \
56     }
57
58 static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA,
59                                             unsigned dstRGB, unsigned dstA)
60 {
61     /* If the blend equation is ADD or REVERSE_SUBTRACT,
62      * SRC_ALPHA == 0, and the following state is set, the colorbuffer
63      * will not be changed.
64      * Notice that the dst factors are the src factors inverted. */
65     return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
66             srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
67             srcRGB == PIPE_BLENDFACTOR_ZERO) &&
68            (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
69             srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
70             srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
71             srcA == PIPE_BLENDFACTOR_ZERO) &&
72            (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
73             dstRGB == PIPE_BLENDFACTOR_ONE) &&
74            (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
75             dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
76             dstA == PIPE_BLENDFACTOR_ONE);
77 }
78
79 static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA,
80                                             unsigned dstRGB, unsigned dstA)
81 {
82     /* If the blend equation is ADD or REVERSE_SUBTRACT,
83      * SRC_ALPHA == 1, and the following state is set, the colorbuffer
84      * will not be changed.
85      * Notice that the dst factors are the src factors inverted. */
86     return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
87             srcRGB == PIPE_BLENDFACTOR_ZERO) &&
88            (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
89             srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
90             srcA == PIPE_BLENDFACTOR_ZERO) &&
91            (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
92             dstRGB == PIPE_BLENDFACTOR_ONE) &&
93            (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
94             dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
95             dstA == PIPE_BLENDFACTOR_ONE);
96 }
97
98 static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA,
99                                             unsigned dstRGB, unsigned dstA)
100 {
101     /* If the blend equation is ADD or REVERSE_SUBTRACT,
102      * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
103      * will not be changed.
104      * Notice that the dst factors are the src factors inverted. */
105     return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
106             srcRGB == PIPE_BLENDFACTOR_ZERO) &&
107            (srcA == PIPE_BLENDFACTOR_ZERO) &&
108            (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
109             dstRGB == PIPE_BLENDFACTOR_ONE) &&
110            (dstA == PIPE_BLENDFACTOR_ONE);
111 }
112
113 static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA,
114                                             unsigned dstRGB, unsigned dstA)
115 {
116     /* If the blend equation is ADD or REVERSE_SUBTRACT,
117      * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
118      * will not be changed.
119      * Notice that the dst factors are the src factors inverted. */
120     return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
121             srcRGB == PIPE_BLENDFACTOR_ZERO) &&
122            (srcA == PIPE_BLENDFACTOR_ZERO) &&
123            (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
124             dstRGB == PIPE_BLENDFACTOR_ONE) &&
125            (dstA == PIPE_BLENDFACTOR_ONE);
126 }
127
128 static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA,
129                                                   unsigned dstRGB, unsigned dstA)
130 {
131     /* If the blend equation is ADD or REVERSE_SUBTRACT,
132      * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
133      * the colorbuffer will not be changed.
134      * Notice that the dst factors are the src factors inverted. */
135     return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
136             srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
137             srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
138             srcRGB == PIPE_BLENDFACTOR_ZERO) &&
139            (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
140             srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
141             srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
142             srcA == PIPE_BLENDFACTOR_ZERO) &&
143            (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
144             dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
145             dstRGB == PIPE_BLENDFACTOR_ONE) &&
146            (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
147             dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
148             dstA == PIPE_BLENDFACTOR_ONE);
149 }
150
151 static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA,
152                                                   unsigned dstRGB, unsigned dstA)
153 {
154     /* If the blend equation is ADD or REVERSE_SUBTRACT,
155      * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
156      * the colorbuffer will not be changed.
157      * Notice that the dst factors are the src factors inverted. */
158     return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
159             srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
160             srcRGB == PIPE_BLENDFACTOR_ZERO) &&
161            (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
162             srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
163             srcA == PIPE_BLENDFACTOR_ZERO) &&
164            (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
165             dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
166             dstRGB == PIPE_BLENDFACTOR_ONE) &&
167            (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
168             dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
169             dstA == PIPE_BLENDFACTOR_ONE);
170 }
171
172 static unsigned bgra_cmask(unsigned mask)
173 {
174     /* Gallium uses RGBA color ordering while R300 expects BGRA. */
175
176     return ((mask & PIPE_MASK_R) << 2) |
177            ((mask & PIPE_MASK_B) >> 2) |
178            (mask & (PIPE_MASK_G | PIPE_MASK_A));
179 }
180
181 /* Create a new blend state based on the CSO blend state.
182  *
183  * This encompasses alpha blending, logic/raster ops, and blend dithering. */
184 static void* r300_create_blend_state(struct pipe_context* pipe,
185                                      const struct pipe_blend_state* state)
186 {
187     struct r300_screen* r300screen = r300_screen(pipe->screen);
188     struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
189     uint32_t blend_control = 0;       /* R300_RB3D_CBLEND: 0x4e04 */
190     uint32_t blend_control_noclamp = 0;    /* R300_RB3D_CBLEND: 0x4e04 */
191     uint32_t alpha_blend_control = 0; /* R300_RB3D_ABLEND: 0x4e08 */
192     uint32_t alpha_blend_control_noclamp = 0; /* R300_RB3D_ABLEND: 0x4e08 */
193     uint32_t color_channel_mask = 0;  /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */
194     uint32_t rop = 0;                 /* R300_RB3D_ROPCNTL: 0x4e18 */
195     uint32_t dither = 0;              /* R300_RB3D_DITHER_CTL: 0x4e50 */
196     CB_LOCALS;
197
198     blend->state = *state;
199
200     if (state->rt[0].blend_enable)
201     {
202         unsigned eqRGB = state->rt[0].rgb_func;
203         unsigned srcRGB = state->rt[0].rgb_src_factor;
204         unsigned dstRGB = state->rt[0].rgb_dst_factor;
205
206         unsigned eqA = state->rt[0].alpha_func;
207         unsigned srcA = state->rt[0].alpha_src_factor;
208         unsigned dstA = state->rt[0].alpha_dst_factor;
209
210         /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
211          * this is just the crappy D3D naming */
212         blend_control = blend_control_noclamp =
213             R300_ALPHA_BLEND_ENABLE |
214             ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
215             ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
216         blend_control |=
217             r300_translate_blend_function(eqRGB, TRUE);
218         blend_control_noclamp |=
219             r300_translate_blend_function(eqRGB, FALSE);
220
221         /* Optimization: some operations do not require the destination color.
222          *
223          * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
224          * otherwise blending gives incorrect results. It seems to be
225          * a hardware bug. */
226         if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
227             eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
228             dstRGB != PIPE_BLENDFACTOR_ZERO ||
229             dstA != PIPE_BLENDFACTOR_ZERO ||
230             srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
231             srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
232             srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
233             srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
234             srcA == PIPE_BLENDFACTOR_DST_COLOR ||
235             srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
236             srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
237             srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
238             srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) {
239             /* Enable reading from the colorbuffer. */
240             blend_control |= R300_READ_ENABLE;
241             blend_control_noclamp |= R300_READ_ENABLE;
242
243             if (r300screen->caps.is_r500) {
244                 /* Optimization: Depending on incoming pixels, we can
245                  * conditionally disable the reading in hardware... */
246                 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN &&
247                     eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) {
248                     /* Disable reading if SRC_ALPHA == 0. */
249                     if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
250                          dstRGB == PIPE_BLENDFACTOR_ZERO) &&
251                         (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
252                          dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
253                          dstA == PIPE_BLENDFACTOR_ZERO)) {
254                          blend_control |= R500_SRC_ALPHA_0_NO_READ;
255                     }
256
257                     /* Disable reading if SRC_ALPHA == 1. */
258                     if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
259                          dstRGB == PIPE_BLENDFACTOR_ZERO) &&
260                         (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
261                          dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
262                          dstA == PIPE_BLENDFACTOR_ZERO)) {
263                          blend_control |= R500_SRC_ALPHA_1_NO_READ;
264                     }
265                 }
266             }
267         }
268
269         /* Optimization: discard pixels which don't change the colorbuffer.
270          *
271          * The code below is non-trivial and some math is involved.
272          *
273          * Discarding pixels must be disabled when FP16 AA is enabled.
274          * This is a hardware bug. Also, this implementation wouldn't work
275          * with FP blending enabled and equation clamping disabled.
276          *
277          * Equations other than ADD are rarely used and therefore won't be
278          * optimized. */
279         if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) &&
280             (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) {
281             /* ADD: X+Y
282              * REVERSE_SUBTRACT: Y-X
283              *
284              * The idea is:
285              * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
286              * then CB will not be changed.
287              *
288              * Given the srcFactor and dstFactor variables, we can derive
289              * what src and dst should be equal to and discard appropriate
290              * pixels.
291              */
292             if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) {
293                 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
294             } else if (blend_discard_if_src_alpha_1(srcRGB, srcA,
295                                                     dstRGB, dstA)) {
296                 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1;
297             } else if (blend_discard_if_src_color_0(srcRGB, srcA,
298                                                     dstRGB, dstA)) {
299                 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0;
300             } else if (blend_discard_if_src_color_1(srcRGB, srcA,
301                                                     dstRGB, dstA)) {
302                 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1;
303             } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA,
304                                                           dstRGB, dstA)) {
305                 blend_control |=
306                     R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0;
307             } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA,
308                                                           dstRGB, dstA)) {
309                 blend_control |=
310                     R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1;
311             }
312         }
313
314         /* separate alpha */
315         if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
316             blend_control |= R300_SEPARATE_ALPHA_ENABLE;
317             blend_control_noclamp |= R300_SEPARATE_ALPHA_ENABLE;
318             alpha_blend_control = alpha_blend_control_noclamp =
319                 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
320                 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
321             alpha_blend_control |=
322                 r300_translate_blend_function(eqA, TRUE);
323             alpha_blend_control_noclamp |=
324                 r300_translate_blend_function(eqA, FALSE);
325         }
326     }
327
328     /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
329     if (state->logicop_enable) {
330         rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
331                 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
332     }
333
334     /* Color channel masks for all MRTs. */
335     color_channel_mask = bgra_cmask(state->rt[0].colormask);
336     if (r300screen->caps.is_r500 && state->independent_blend_enable) {
337         if (state->rt[1].blend_enable) {
338             color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4;
339         }
340         if (state->rt[2].blend_enable) {
341             color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8;
342         }
343         if (state->rt[3].blend_enable) {
344             color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12;
345         }
346     }
347
348     /* Neither fglrx nor classic r300 ever set this, regardless of dithering
349      * state. Since it's an optional implementation detail, we can leave it
350      * out and never dither.
351      *
352      * This could be revisited if we ever get quality or conformance hints.
353      *
354     if (state->dither) {
355         dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
356                         R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
357     }
358     */
359
360     /* Build a command buffer. */
361     BEGIN_CB(blend->cb_clamp, 8);
362     OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
363     OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
364     OUT_CB(blend_control);
365     OUT_CB(alpha_blend_control);
366     OUT_CB(color_channel_mask);
367     OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
368     END_CB;
369
370     /* Build a command buffer. */
371     BEGIN_CB(blend->cb_noclamp, 8);
372     OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
373     OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
374     OUT_CB(blend_control_noclamp);
375     OUT_CB(alpha_blend_control_noclamp);
376     OUT_CB(color_channel_mask);
377     OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
378     END_CB;
379
380     /* The same as above, but with no colorbuffer reads and writes. */
381     BEGIN_CB(blend->cb_no_readwrite, 8);
382     OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
383     OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
384     OUT_CB(0);
385     OUT_CB(0);
386     OUT_CB(0);
387     OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
388     END_CB;
389
390     return (void*)blend;
391 }
392
393 /* Bind blend state. */
394 static void r300_bind_blend_state(struct pipe_context* pipe,
395                                   void* state)
396 {
397     struct r300_context* r300 = r300_context(pipe);
398
399     UPDATE_STATE(state, r300->blend_state);
400 }
401
402 /* Free blend state. */
403 static void r300_delete_blend_state(struct pipe_context* pipe,
404                                     void* state)
405 {
406     FREE(state);
407 }
408
409 /* Convert float to 10bit integer */
410 static unsigned float_to_fixed10(float f)
411 {
412     return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
413 }
414
415 /* Set blend color.
416  * Setup both R300 and R500 registers, figure out later which one to write. */
417 static void r300_set_blend_color(struct pipe_context* pipe,
418                                  const struct pipe_blend_color* color)
419 {
420     struct r300_context* r300 = r300_context(pipe);
421     struct pipe_framebuffer_state *fb = r300->fb_state.state;
422     struct r300_blend_color_state *state =
423         (struct r300_blend_color_state*)r300->blend_color_state.state;
424     struct pipe_blend_color c;
425     enum pipe_format format = fb->nr_cbufs ? fb->cbufs[0]->format : 0;
426     CB_LOCALS;
427
428     state->state = *color; /* Save it, so that we can reuse it in set_fb_state */
429     c = *color;
430
431     /* The blend color is dependent on the colorbuffer format. */
432     if (fb->nr_cbufs) {
433         switch (format) {
434         case PIPE_FORMAT_R8_UNORM:
435         case PIPE_FORMAT_L8_UNORM:
436         case PIPE_FORMAT_I8_UNORM:
437             c.color[1] = c.color[0];
438             break;
439
440         case PIPE_FORMAT_A8_UNORM:
441             c.color[1] = c.color[3];
442             break;
443
444         case PIPE_FORMAT_R8G8_UNORM:
445             c.color[2] = c.color[1];
446             break;
447
448         case PIPE_FORMAT_L8A8_UNORM:
449             c.color[2] = c.color[3];
450             break;
451
452         default:;
453         }
454     }
455
456     if (r300->screen->caps.is_r500) {
457         BEGIN_CB(state->cb, 3);
458         OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
459
460         switch (format) {
461         case PIPE_FORMAT_R16G16B16A16_FLOAT:
462             OUT_CB(util_float_to_half(c.color[2]) |
463                    (util_float_to_half(c.color[3]) << 16));
464             OUT_CB(util_float_to_half(c.color[0]) |
465                    (util_float_to_half(c.color[1]) << 16));
466             break;
467
468         default:
469             OUT_CB(float_to_fixed10(c.color[0]) |
470                    (float_to_fixed10(c.color[3]) << 16));
471             OUT_CB(float_to_fixed10(c.color[2]) |
472                    (float_to_fixed10(c.color[1]) << 16));
473         }
474
475         END_CB;
476     } else {
477         union util_color uc;
478         util_pack_color(c.color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
479
480         BEGIN_CB(state->cb, 2);
481         OUT_CB_REG(R300_RB3D_BLEND_COLOR, uc.ui);
482         END_CB;
483     }
484
485     r300_mark_atom_dirty(r300, &r300->blend_color_state);
486 }
487
488 static void r300_set_clip_state(struct pipe_context* pipe,
489                                 const struct pipe_clip_state* state)
490 {
491     struct r300_context* r300 = r300_context(pipe);
492     struct r300_clip_state *clip =
493             (struct r300_clip_state*)r300->clip_state.state;
494     CB_LOCALS;
495
496     if (r300->screen->caps.has_tcl) {
497         BEGIN_CB(clip->cb, r300->clip_state.size);
498         OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG,
499                    (r300->screen->caps.is_r500 ?
500                     R500_PVS_UCP_START : R300_PVS_UCP_START));
501         OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4);
502         OUT_CB_TABLE(state->ucp, 6 * 4);
503         END_CB;
504
505         r300_mark_atom_dirty(r300, &r300->clip_state);
506     } else {
507         draw_set_clip_state(r300->draw, state);
508     }
509 }
510
511 static void
512 r300_set_sample_mask(struct pipe_context *pipe,
513                      unsigned sample_mask)
514 {
515 }
516
517
518 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
519  *
520  * This contains the depth buffer, stencil buffer, alpha test, and such.
521  * On the Radeon, depth and stencil buffer setup are intertwined, which is
522  * the reason for some of the strange-looking assignments across registers. */
523 static void*
524         r300_create_dsa_state(struct pipe_context* pipe,
525                               const struct pipe_depth_stencil_alpha_state* state)
526 {
527     struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps;
528     struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
529     CB_LOCALS;
530
531     dsa->dsa = *state;
532
533     /* Depth test setup. - separate write mask depth for decomp flush */
534     if (state->depth.writemask) {
535         dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
536     }
537
538     if (state->depth.enabled) {
539         dsa->z_buffer_control |= R300_Z_ENABLE;
540
541         dsa->z_stencil_control |=
542             (r300_translate_depth_stencil_function(state->depth.func) <<
543                 R300_Z_FUNC_SHIFT);
544     } else {
545         /* We must enable depth test, otherwise occlusion queries won't work. */
546         dsa->z_buffer_control |= R300_Z_ENABLE;
547         dsa->z_stencil_control |= R300_ZS_ALWAYS;
548     }
549
550     /* Stencil buffer setup. */
551     if (state->stencil[0].enabled) {
552         dsa->z_buffer_control |= R300_STENCIL_ENABLE;
553         dsa->z_stencil_control |=
554             (r300_translate_depth_stencil_function(state->stencil[0].func) <<
555                 R300_S_FRONT_FUNC_SHIFT) |
556             (r300_translate_stencil_op(state->stencil[0].fail_op) <<
557                 R300_S_FRONT_SFAIL_OP_SHIFT) |
558             (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
559                 R300_S_FRONT_ZPASS_OP_SHIFT) |
560             (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
561                 R300_S_FRONT_ZFAIL_OP_SHIFT);
562
563         dsa->stencil_ref_mask =
564                 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
565                 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
566
567         if (state->stencil[1].enabled) {
568             dsa->two_sided = TRUE;
569
570             dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
571             dsa->z_stencil_control |=
572             (r300_translate_depth_stencil_function(state->stencil[1].func) <<
573                 R300_S_BACK_FUNC_SHIFT) |
574             (r300_translate_stencil_op(state->stencil[1].fail_op) <<
575                 R300_S_BACK_SFAIL_OP_SHIFT) |
576             (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
577                 R300_S_BACK_ZPASS_OP_SHIFT) |
578             (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
579                 R300_S_BACK_ZFAIL_OP_SHIFT);
580
581             dsa->stencil_ref_bf =
582                 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
583                 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
584
585             if (caps->is_r500) {
586                 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
587             } else {
588                 dsa->two_sided_stencil_ref =
589                   (state->stencil[0].valuemask != state->stencil[1].valuemask ||
590                    state->stencil[0].writemask != state->stencil[1].writemask);
591             }
592         }
593     }
594
595     /* Alpha test setup. */
596     if (state->alpha.enabled) {
597         dsa->alpha_function =
598             r300_translate_alpha_function(state->alpha.func) |
599             R300_FG_ALPHA_FUNC_ENABLE;
600
601         dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
602         dsa->alpha_value = util_float_to_half(state->alpha.ref_value);
603
604         if (caps->is_r500) {
605             dsa->alpha_function_fp16 = dsa->alpha_function |
606                                        R500_FG_ALPHA_FUNC_FP16_ENABLE;
607             dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
608         }
609     }
610
611     BEGIN_CB(&dsa->cb_begin, 10);
612     OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
613     OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
614     OUT_CB(dsa->z_buffer_control);
615     OUT_CB(dsa->z_stencil_control);
616     OUT_CB(dsa->stencil_ref_mask);
617     OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf);
618     OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
619     END_CB;
620
621     BEGIN_CB(&dsa->cb_begin_fp16, 10);
622     OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function_fp16);
623     OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
624     OUT_CB(dsa->z_buffer_control);
625     OUT_CB(dsa->z_stencil_control);
626     OUT_CB(dsa->stencil_ref_mask);
627     OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf);
628     OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
629     END_CB;
630
631     /* We must enable depth test, otherwise occlusion queries won't work.
632      * We setup a dummy zbuffer to silent the CS checker, see emit_fb_state. */
633     BEGIN_CB(dsa->cb_zb_no_readwrite, 10);
634     OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function);
635     OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
636     OUT_CB(R300_Z_ENABLE);
637     OUT_CB(R300_ZS_ALWAYS);
638     OUT_CB(0);
639     OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
640     OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
641     END_CB;
642
643     BEGIN_CB(dsa->cb_fp16_zb_no_readwrite, 10);
644     OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function_fp16);
645     OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
646     OUT_CB(R300_Z_ENABLE);
647     OUT_CB(R300_ZS_ALWAYS);
648     OUT_CB(0);
649     OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
650     OUT_CB_REG(R500_FG_ALPHA_VALUE, dsa->alpha_value);
651     END_CB;
652
653     return (void*)dsa;
654 }
655
656 static void r300_dsa_inject_stencilref(struct r300_context *r300)
657 {
658     struct r300_dsa_state *dsa =
659             (struct r300_dsa_state*)r300->dsa_state.state;
660
661     if (!dsa)
662         return;
663
664     dsa->stencil_ref_mask =
665         (dsa->stencil_ref_mask & ~R300_STENCILREF_MASK) |
666         r300->stencil_ref.ref_value[0];
667     dsa->stencil_ref_bf =
668         (dsa->stencil_ref_bf & ~R300_STENCILREF_MASK) |
669         r300->stencil_ref.ref_value[1];
670 }
671
672 /* Bind DSA state. */
673 static void r300_bind_dsa_state(struct pipe_context* pipe,
674                                 void* state)
675 {
676     struct r300_context* r300 = r300_context(pipe);
677
678     if (!state) {
679         return;
680     }
681
682     UPDATE_STATE(state, r300->dsa_state);
683
684     r300_mark_atom_dirty(r300, &r300->hyperz_state); /* Will be updated before the emission. */
685     r300_dsa_inject_stencilref(r300);
686 }
687
688 /* Free DSA state. */
689 static void r300_delete_dsa_state(struct pipe_context* pipe,
690                                   void* state)
691 {
692     FREE(state);
693 }
694
695 static void r300_set_stencil_ref(struct pipe_context* pipe,
696                                  const struct pipe_stencil_ref* sr)
697 {
698     struct r300_context* r300 = r300_context(pipe);
699
700     r300->stencil_ref = *sr;
701
702     r300_dsa_inject_stencilref(r300);
703     r300_mark_atom_dirty(r300, &r300->dsa_state);
704 }
705
706 static void r300_tex_set_tiling_flags(struct r300_context *r300,
707                                       struct r300_resource *tex,
708                                       unsigned level)
709 {
710     /* Check if the macrotile flag needs to be changed.
711      * Skip changing the flags otherwise. */
712     if (tex->tex.macrotile[tex->surface_level] !=
713         tex->tex.macrotile[level]) {
714         r300->rws->buffer_set_tiling(tex->buf, r300->cs,
715                 tex->tex.microtile, tex->tex.macrotile[level],
716                 tex->tex.stride_in_bytes[0]);
717
718         tex->surface_level = level;
719     }
720 }
721
722 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
723 static void r300_fb_set_tiling_flags(struct r300_context *r300,
724                                const struct pipe_framebuffer_state *state)
725 {
726     unsigned i;
727
728     /* Set tiling flags for new surfaces. */
729     for (i = 0; i < state->nr_cbufs; i++) {
730         r300_tex_set_tiling_flags(r300,
731                                   r300_resource(state->cbufs[i]->texture),
732                                   state->cbufs[i]->u.tex.level);
733     }
734     if (state->zsbuf) {
735         r300_tex_set_tiling_flags(r300,
736                                   r300_resource(state->zsbuf->texture),
737                                   state->zsbuf->u.tex.level);
738     }
739 }
740
741 static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index,
742                                     const char *binding)
743 {
744     struct pipe_resource *tex = surf->texture;
745     struct r300_resource *rtex = r300_resource(tex);
746
747     fprintf(stderr,
748             "r300:   %s[%i] Dim: %ix%i, Firstlayer: %i, "
749             "Lastlayer: %i, Level: %i, Format: %s\n"
750
751             "r300:     TEX: Macro: %s, Micro: %s, "
752             "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
753
754             binding, index, surf->width, surf->height,
755             surf->u.tex.first_layer, surf->u.tex.last_layer, surf->u.tex.level,
756             util_format_short_name(surf->format),
757
758             rtex->tex.macrotile[0] ? "YES" : " NO",
759             rtex->tex.microtile ? "YES" : " NO",
760             tex->width0, tex->height0, tex->depth0,
761             tex->last_level, util_format_short_name(surf->format));
762 }
763
764 void r300_mark_fb_state_dirty(struct r300_context *r300,
765                               enum r300_fb_state_change change)
766 {
767     struct pipe_framebuffer_state *state = r300->fb_state.state;
768
769     r300_mark_atom_dirty(r300, &r300->gpu_flush);
770     r300_mark_atom_dirty(r300, &r300->fb_state);
771
772     /* What is marked as dirty depends on the enum r300_fb_state_change. */
773     if (change == R300_CHANGED_FB_STATE) {
774         r300_mark_atom_dirty(r300, &r300->aa_state);
775         r300_mark_atom_dirty(r300, &r300->dsa_state); /* for AlphaRef */
776         r300_set_blend_color(&r300->context, r300->blend_color_state.state);
777     }
778
779     if (change == R300_CHANGED_FB_STATE ||
780         change == R300_CHANGED_HYPERZ_FLAG) {
781         r300_mark_atom_dirty(r300, &r300->hyperz_state);
782     }
783
784     if (change == R300_CHANGED_FB_STATE ||
785         change == R300_CHANGED_MULTIWRITE) {
786         r300_mark_atom_dirty(r300, &r300->fb_state_pipelined);
787     }
788
789     /* Now compute the fb_state atom size. */
790     r300->fb_state.size = 2 + (8 * state->nr_cbufs);
791
792     if (r300->cbzb_clear) {
793         r300->fb_state.size += 10;
794     } else if (state->zsbuf) {
795         r300->fb_state.size += 10;
796         if (r300->hyperz_enabled)
797             r300->fb_state.size += 8;
798     } else if (state->nr_cbufs) {
799         r300->fb_state.size += 10;
800     }
801
802     /* The size of the rest of atoms stays the same. */
803 }
804
805 static void
806 r300_set_framebuffer_state(struct pipe_context* pipe,
807                            const struct pipe_framebuffer_state* state)
808 {
809     struct r300_context* r300 = r300_context(pipe);
810     struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
811     struct pipe_framebuffer_state *old_state = r300->fb_state.state;
812     unsigned max_width, max_height, i;
813     uint32_t zbuffer_bpp = 0;
814     boolean unlock_zbuffer = FALSE;
815
816     if (r300->screen->caps.is_r500) {
817         max_width = max_height = 4096;
818     } else if (r300->screen->caps.is_r400) {
819         max_width = max_height = 4021;
820     } else {
821         max_width = max_height = 2560;
822     }
823
824     if (state->width > max_width || state->height > max_height) {
825         fprintf(stderr, "r300: Implementation error: Render targets are too "
826         "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__);
827         return;
828     }
829
830     if (old_state->zsbuf && r300->zmask_in_use && !r300->locked_zbuffer) {
831         /* There is a zmask in use, what are we gonna do? */
832         if (state->zsbuf) {
833             if (!pipe_surface_equal(old_state->zsbuf, state->zsbuf)) {
834                 /* Decompress the currently bound zbuffer before we bind another one. */
835                 r300_decompress_zmask(r300);
836                 r300->hiz_in_use = FALSE;
837             }
838         } else {
839             /* We don't bind another zbuffer, so lock the current one. */
840             pipe_surface_reference(&r300->locked_zbuffer, old_state->zsbuf);
841         }
842     } else if (r300->locked_zbuffer) {
843         /* We have a locked zbuffer now, what are we gonna do? */
844         if (state->zsbuf) {
845             if (!pipe_surface_equal(r300->locked_zbuffer, state->zsbuf)) {
846                 /* We are binding some other zbuffer, so decompress the locked one,
847                  * it gets unlocked automatically. */
848                 r300_decompress_zmask_locked_unsafe(r300);
849                 r300->hiz_in_use = FALSE;
850             } else {
851                 /* We are binding the locked zbuffer again, so unlock it. */
852                 unlock_zbuffer = TRUE;
853             }
854         }
855     }
856     assert(state->zsbuf || (r300->locked_zbuffer && !unlock_zbuffer) || !r300->zmask_in_use);
857
858     /* Need to reset clamping or colormask. */
859     r300_mark_atom_dirty(r300, &r300->blend_state);
860
861     /* If zsbuf is set from NULL to non-NULL or vice versa.. */
862     if (!!old_state->zsbuf != !!state->zsbuf) {
863         r300_mark_atom_dirty(r300, &r300->dsa_state);
864     }
865
866     if (r300->screen->info.drm_minor < 12) {
867        /* The tiling flags are dependent on the surface miplevel, unfortunately.
868         * This workarounds a bad design decision in old kernels which were
869         * rewriting tile fields in registers. */
870         r300_fb_set_tiling_flags(r300, state);
871     }
872
873     util_copy_framebuffer_state(r300->fb_state.state, state);
874
875     if (unlock_zbuffer) {
876         pipe_surface_reference(&r300->locked_zbuffer, NULL);
877     }
878
879     r300_mark_fb_state_dirty(r300, R300_CHANGED_FB_STATE);
880
881     if (state->zsbuf) {
882         switch (util_format_get_blocksize(state->zsbuf->format)) {
883         case 2:
884             zbuffer_bpp = 16;
885             break;
886         case 4:
887             zbuffer_bpp = 24;
888             break;
889         }
890
891         /* Polygon offset depends on the zbuffer bit depth. */
892         if (r300->zbuffer_bpp != zbuffer_bpp) {
893             r300->zbuffer_bpp = zbuffer_bpp;
894
895             if (r300->polygon_offset_enabled)
896                 r300_mark_atom_dirty(r300, &r300->rs_state);
897         }
898     }
899
900     /* Set up AA config. */
901     if (state->nr_cbufs && state->cbufs[0]->texture->nr_samples > 1) {
902         aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE;
903
904         switch (state->cbufs[0]->texture->nr_samples) {
905         case 2:
906             aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2;
907             break;
908         case 3:
909             aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3;
910             break;
911         case 4:
912             aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4;
913             break;
914         case 6:
915             aa->aa_config |= R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6;
916             break;
917         }
918     } else {
919         aa->aa_config = 0;
920     }
921
922     if (DBG_ON(r300, DBG_FB)) {
923         fprintf(stderr, "r300: set_framebuffer_state:\n");
924         for (i = 0; i < state->nr_cbufs; i++) {
925             r300_print_fb_surf_info(state->cbufs[i], i, "CB");
926         }
927         if (state->zsbuf) {
928             r300_print_fb_surf_info(state->zsbuf, 0, "ZB");
929         }
930     }
931 }
932
933 /* Create fragment shader state. */
934 static void* r300_create_fs_state(struct pipe_context* pipe,
935                                   const struct pipe_shader_state* shader)
936 {
937     struct r300_fragment_shader* fs = NULL;
938
939     fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
940
941     /* Copy state directly into shader. */
942     fs->state = *shader;
943     fs->state.tokens = tgsi_dup_tokens(shader->tokens);
944
945     return (void*)fs;
946 }
947
948 void r300_mark_fs_code_dirty(struct r300_context *r300)
949 {
950     struct r300_fragment_shader* fs = r300_fs(r300);
951
952     r300_mark_atom_dirty(r300, &r300->fs);
953     r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
954     r300_mark_atom_dirty(r300, &r300->fs_constants);
955     r300->fs.size = fs->shader->cb_code_size;
956
957     if (r300->screen->caps.is_r500) {
958         r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7;
959         r300->fs_constants.size = fs->shader->externals_count * 4 + 3;
960     } else {
961         r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5;
962         r300->fs_constants.size = fs->shader->externals_count * 4 + 1;
963     }
964
965     ((struct r300_constant_buffer*)r300->fs_constants.state)->remap_table =
966             fs->shader->code.constants_remap_table;
967 }
968
969 /* Bind fragment shader state. */
970 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
971 {
972     struct r300_context* r300 = r300_context(pipe);
973     struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
974
975     if (fs == NULL) {
976         r300->fs.state = NULL;
977         return;
978     }
979
980     r300->fs.state = fs;
981     r300->fs_status = FRAGMENT_SHADER_DIRTY;
982
983     r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */
984 }
985
986 /* Delete fragment shader state. */
987 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
988 {
989     struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
990     struct r300_fragment_shader_code *tmp, *ptr = fs->first;
991
992     while (ptr) {
993         tmp = ptr;
994         ptr = ptr->next;
995         rc_constants_destroy(&tmp->code.constants);
996         FREE(tmp->cb_code);
997         FREE(tmp);
998     }
999     FREE((void*)fs->state.tokens);
1000     FREE(shader);
1001 }
1002
1003 static void r300_set_polygon_stipple(struct pipe_context* pipe,
1004                                      const struct pipe_poly_stipple* state)
1005 {
1006     /* XXX no idea how to set this up, but not terribly important */
1007 }
1008
1009 /* Create a new rasterizer state based on the CSO rasterizer state.
1010  *
1011  * This is a very large chunk of state, and covers most of the graphics
1012  * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
1013  *
1014  * In a not entirely unironic sidenote, this state has nearly nothing to do
1015  * with the actual block on the Radeon called the rasterizer (RS). */
1016 static void* r300_create_rs_state(struct pipe_context* pipe,
1017                                   const struct pipe_rasterizer_state* state)
1018 {
1019     struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
1020     uint32_t vap_control_status;    /* R300_VAP_CNTL_STATUS: 0x2140 */
1021     uint32_t vap_clip_cntl;         /* R300_VAP_CLIP_CNTL: 0x221C */
1022     uint32_t point_size;            /* R300_GA_POINT_SIZE: 0x421c */
1023     uint32_t point_minmax;          /* R300_GA_POINT_MINMAX: 0x4230 */
1024     uint32_t line_control;          /* R300_GA_LINE_CNTL: 0x4234 */
1025     uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
1026     uint32_t cull_mode;             /* R300_SU_CULL_MODE: 0x42b8 */
1027     uint32_t line_stipple_config;   /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
1028     uint32_t line_stipple_value;    /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
1029     uint32_t polygon_mode;          /* R300_GA_POLY_MODE: 0x4288 */
1030     uint32_t clip_rule;             /* R300_SC_CLIP_RULE: 0x43D0 */
1031     uint32_t round_mode;            /* R300_GA_ROUND_MODE: 0x428c */
1032
1033     /* Point sprites texture coordinates, 0: lower left, 1: upper right */
1034     float point_texcoord_left = 0;  /* R300_GA_POINT_S0: 0x4200 */
1035     float point_texcoord_bottom = 0;/* R300_GA_POINT_T0: 0x4204 */
1036     float point_texcoord_right = 1; /* R300_GA_POINT_S1: 0x4208 */
1037     float point_texcoord_top = 0;   /* R300_GA_POINT_T1: 0x420c */
1038     boolean vclamp = state->clamp_vertex_color ||
1039                      !r300_context(pipe)->screen->caps.is_r500;
1040     CB_LOCALS;
1041
1042     /* Copy rasterizer state. */
1043     rs->rs = *state;
1044     rs->rs_draw = *state;
1045
1046     rs->rs.sprite_coord_enable = state->point_quad_rasterization *
1047                                  state->sprite_coord_enable;
1048
1049     /* Override some states for Draw. */
1050     rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */
1051     rs->rs_draw.offset_point = 0;
1052     rs->rs_draw.offset_line = 0;
1053     rs->rs_draw.offset_tri = 0;
1054     rs->rs_draw.offset_clamp = 0;
1055
1056 #ifdef PIPE_ARCH_LITTLE_ENDIAN
1057     vap_control_status = R300_VC_NO_SWAP;
1058 #else
1059     vap_control_status = R300_VC_32BIT_SWAP;
1060 #endif
1061
1062     /* If no TCL engine is present, turn off the HW TCL. */
1063     if (!r300_screen(pipe->screen)->caps.has_tcl) {
1064         vap_control_status |= R300_VAP_TCL_BYPASS;
1065     }
1066
1067     /* Point size width and height. */
1068     point_size =
1069         pack_float_16_6x(state->point_size) |
1070         (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
1071
1072     /* Point size clamping. */
1073     if (state->point_size_per_vertex) {
1074         /* Per-vertex point size.
1075          * Clamp to [0, max FB size] */
1076         float min_psiz = util_get_min_point_size(state);
1077         float max_psiz = pipe->screen->get_paramf(pipe->screen,
1078                                         PIPE_CAPF_MAX_POINT_WIDTH);
1079         point_minmax =
1080             (pack_float_16_6x(min_psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) |
1081             (pack_float_16_6x(max_psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT);
1082     } else {
1083         /* We cannot disable the point-size vertex output,
1084          * so clamp it. */
1085         float psiz = state->point_size;
1086         point_minmax =
1087             (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) |
1088             (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT);
1089     }
1090
1091     /* Line control. */
1092     line_control = pack_float_16_6x(state->line_width) |
1093         R300_GA_LINE_CNTL_END_TYPE_COMP;
1094
1095     /* Enable polygon mode */
1096     polygon_mode = 0;
1097     if (state->fill_front != PIPE_POLYGON_MODE_FILL ||
1098         state->fill_back != PIPE_POLYGON_MODE_FILL) {
1099         polygon_mode = R300_GA_POLY_MODE_DUAL;
1100     }
1101
1102     /* Front face */
1103     if (state->front_ccw) 
1104         cull_mode = R300_FRONT_FACE_CCW;
1105     else
1106         cull_mode = R300_FRONT_FACE_CW;
1107
1108     /* Polygon offset */
1109     polygon_offset_enable = 0;
1110     if (util_get_offset(state, state->fill_front)) {
1111        polygon_offset_enable |= R300_FRONT_ENABLE;
1112     }
1113     if (util_get_offset(state, state->fill_back)) {
1114        polygon_offset_enable |= R300_BACK_ENABLE;
1115     }
1116
1117     rs->polygon_offset_enable = polygon_offset_enable != 0;
1118
1119     /* Polygon mode */
1120     if (polygon_mode) {
1121        polygon_mode |=
1122           r300_translate_polygon_mode_front(state->fill_front);
1123        polygon_mode |=
1124           r300_translate_polygon_mode_back(state->fill_back);
1125     }
1126
1127     if (state->cull_face & PIPE_FACE_FRONT) {
1128         cull_mode |= R300_CULL_FRONT;
1129     }
1130     if (state->cull_face & PIPE_FACE_BACK) {
1131         cull_mode |= R300_CULL_BACK;
1132     }
1133
1134     if (state->line_stipple_enable) {
1135         line_stipple_config =
1136             R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
1137             (fui((float)state->line_stipple_factor) &
1138                 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
1139         /* XXX this might need to be scaled up */
1140         line_stipple_value = state->line_stipple_pattern;
1141     } else {
1142         line_stipple_config = 0;
1143         line_stipple_value = 0;
1144     }
1145
1146     if (state->flatshade) {
1147         rs->color_control = R300_SHADE_MODEL_FLAT;
1148     } else {
1149         rs->color_control = R300_SHADE_MODEL_SMOOTH;
1150     }
1151
1152     clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
1153
1154     /* Point sprites coord mode */
1155     if (rs->rs.sprite_coord_enable) {
1156         switch (state->sprite_coord_mode) {
1157             case PIPE_SPRITE_COORD_UPPER_LEFT:
1158                 point_texcoord_top = 0.0f;
1159                 point_texcoord_bottom = 1.0f;
1160                 break;
1161             case PIPE_SPRITE_COORD_LOWER_LEFT:
1162                 point_texcoord_top = 1.0f;
1163                 point_texcoord_bottom = 0.0f;
1164                 break;
1165         }
1166     }
1167
1168     if (r300_screen(pipe->screen)->caps.has_tcl) {
1169        vap_clip_cntl = (state->clip_plane_enable & 63) |
1170                        R300_PS_UCP_MODE_CLIP_AS_TRIFAN;
1171     } else {
1172        vap_clip_cntl = R300_CLIP_DISABLE;
1173     }
1174
1175     /* Vertex color clamping. FP20 means no clamping. */
1176     round_mode =
1177       R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST |
1178       (!vclamp ? (R300_GA_ROUND_MODE_RGB_CLAMP_FP20 |
1179                   R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20) : 0);
1180
1181     /* Build the main command buffer. */
1182     BEGIN_CB(rs->cb_main, RS_STATE_MAIN_SIZE);
1183     OUT_CB_REG(R300_VAP_CNTL_STATUS, vap_control_status);
1184     OUT_CB_REG(R300_VAP_CLIP_CNTL, vap_clip_cntl);
1185     OUT_CB_REG(R300_GA_POINT_SIZE, point_size);
1186     OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX, 2);
1187     OUT_CB(point_minmax);
1188     OUT_CB(line_control);
1189     OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE, 2);
1190     OUT_CB(polygon_offset_enable);
1191     rs->cull_mode_index = 11;
1192     OUT_CB(cull_mode);
1193     OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG, line_stipple_config);
1194     OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE, line_stipple_value);
1195     OUT_CB_REG(R300_GA_POLY_MODE, polygon_mode);
1196     OUT_CB_REG(R300_GA_ROUND_MODE, round_mode);
1197     OUT_CB_REG(R300_SC_CLIP_RULE, clip_rule);
1198     OUT_CB_REG_SEQ(R300_GA_POINT_S0, 4);
1199     OUT_CB_32F(point_texcoord_left);
1200     OUT_CB_32F(point_texcoord_bottom);
1201     OUT_CB_32F(point_texcoord_right);
1202     OUT_CB_32F(point_texcoord_top);
1203     END_CB;
1204
1205     /* Build the two command buffers for polygon offset setup. */
1206     if (polygon_offset_enable) {
1207         float scale = state->offset_scale * 12;
1208         float offset = state->offset_units * 4;
1209
1210         BEGIN_CB(rs->cb_poly_offset_zb16, 5);
1211         OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
1212         OUT_CB_32F(scale);
1213         OUT_CB_32F(offset);
1214         OUT_CB_32F(scale);
1215         OUT_CB_32F(offset);
1216         END_CB;
1217
1218         offset = state->offset_units * 2;
1219
1220         BEGIN_CB(rs->cb_poly_offset_zb24, 5);
1221         OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
1222         OUT_CB_32F(scale);
1223         OUT_CB_32F(offset);
1224         OUT_CB_32F(scale);
1225         OUT_CB_32F(offset);
1226         END_CB;
1227     }
1228
1229     return (void*)rs;
1230 }
1231
1232 /* Bind rasterizer state. */
1233 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
1234 {
1235     struct r300_context* r300 = r300_context(pipe);
1236     struct r300_rs_state* rs = (struct r300_rs_state*)state;
1237     int last_sprite_coord_enable = r300->sprite_coord_enable;
1238     boolean last_two_sided_color = r300->two_sided_color;
1239
1240     if (r300->draw && rs) {
1241         draw_set_rasterizer_state(r300->draw, &rs->rs_draw, state);
1242     }
1243
1244     if (rs) {
1245         r300->polygon_offset_enabled = rs->polygon_offset_enable;
1246         r300->sprite_coord_enable = rs->rs.sprite_coord_enable;
1247         r300->two_sided_color = rs->rs.light_twoside;
1248     } else {
1249         r300->polygon_offset_enabled = FALSE;
1250         r300->sprite_coord_enable = 0;
1251         r300->two_sided_color = FALSE;
1252     }
1253
1254     UPDATE_STATE(state, r300->rs_state);
1255     r300->rs_state.size = RS_STATE_MAIN_SIZE + (r300->polygon_offset_enabled ? 5 : 0);
1256
1257     if (last_sprite_coord_enable != r300->sprite_coord_enable ||
1258         last_two_sided_color != r300->two_sided_color) {
1259         r300_mark_atom_dirty(r300, &r300->rs_block_state);
1260     }
1261 }
1262
1263 /* Free rasterizer state. */
1264 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
1265 {
1266     FREE(state);
1267 }
1268
1269 static void*
1270         r300_create_sampler_state(struct pipe_context* pipe,
1271                                   const struct pipe_sampler_state* state)
1272 {
1273     struct r300_context* r300 = r300_context(pipe);
1274     struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
1275     boolean is_r500 = r300->screen->caps.is_r500;
1276     int lod_bias;
1277
1278     sampler->state = *state;
1279
1280     /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
1281      * or MIN filter is NEAREST. Since texwrap produces same results
1282      * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
1283     if (sampler->state.min_img_filter == PIPE_TEX_FILTER_NEAREST ||
1284         sampler->state.mag_img_filter == PIPE_TEX_FILTER_NEAREST) {
1285         /* Wrap S. */
1286         if (sampler->state.wrap_s == PIPE_TEX_WRAP_CLAMP)
1287             sampler->state.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1288         else if (sampler->state.wrap_s == PIPE_TEX_WRAP_MIRROR_CLAMP)
1289             sampler->state.wrap_s = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1290
1291         /* Wrap T. */
1292         if (sampler->state.wrap_t == PIPE_TEX_WRAP_CLAMP)
1293             sampler->state.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1294         else if (sampler->state.wrap_t == PIPE_TEX_WRAP_MIRROR_CLAMP)
1295             sampler->state.wrap_t = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1296
1297         /* Wrap R. */
1298         if (sampler->state.wrap_r == PIPE_TEX_WRAP_CLAMP)
1299             sampler->state.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1300         else if (sampler->state.wrap_r == PIPE_TEX_WRAP_MIRROR_CLAMP)
1301             sampler->state.wrap_r = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1302     }
1303
1304     sampler->filter0 |=
1305         (r300_translate_wrap(sampler->state.wrap_s) << R300_TX_WRAP_S_SHIFT) |
1306         (r300_translate_wrap(sampler->state.wrap_t) << R300_TX_WRAP_T_SHIFT) |
1307         (r300_translate_wrap(sampler->state.wrap_r) << R300_TX_WRAP_R_SHIFT);
1308
1309     sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
1310                                                    state->mag_img_filter,
1311                                                    state->min_mip_filter,
1312                                                    state->max_anisotropy > 1);
1313
1314     sampler->filter0 |= r300_anisotropy(state->max_anisotropy);
1315
1316     /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
1317     /* We must pass these to the merge function to clamp them properly. */
1318     sampler->min_lod = (unsigned)MAX2(state->min_lod, 0);
1319     sampler->max_lod = (unsigned)MAX2(ceilf(state->max_lod), 0);
1320
1321     lod_bias = CLAMP((int)(state->lod_bias * 32 + 1), -(1 << 9), (1 << 9) - 1);
1322
1323     sampler->filter1 |= (lod_bias << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK;
1324
1325     /* This is very high quality anisotropic filtering for R5xx.
1326      * It's good for benchmarking the performance of texturing but
1327      * in practice we don't want to slow down the driver because it's
1328      * a pretty good performance killer. Feel free to play with it. */
1329     if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) {
1330         sampler->filter1 |= r500_anisotropy(state->max_anisotropy);
1331     }
1332
1333     /* R500-specific fixups and optimizations */
1334     if (r300->screen->caps.is_r500) {
1335         sampler->filter1 |= R500_BORDER_FIX;
1336     }
1337
1338     return (void*)sampler;
1339 }
1340
1341 static void r300_bind_sampler_states(struct pipe_context* pipe,
1342                                      unsigned count,
1343                                      void** states)
1344 {
1345     struct r300_context* r300 = r300_context(pipe);
1346     struct r300_textures_state* state =
1347         (struct r300_textures_state*)r300->textures_state.state;
1348     unsigned tex_units = r300->screen->caps.num_tex_units;
1349
1350     if (count > tex_units) {
1351         return;
1352     }
1353
1354     memcpy(state->sampler_states, states, sizeof(void*) * count);
1355     state->sampler_state_count = count;
1356
1357     r300_mark_atom_dirty(r300, &r300->textures_state);
1358 }
1359
1360 static void r300_lacks_vertex_textures(struct pipe_context* pipe,
1361                                        unsigned count,
1362                                        void** states)
1363 {
1364 }
1365
1366 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
1367 {
1368     FREE(state);
1369 }
1370
1371 static uint32_t r300_assign_texture_cache_region(unsigned index, unsigned num)
1372 {
1373     /* This looks like a hack, but I believe it's suppose to work like
1374      * that. To illustrate how this works, let's assume you have 5 textures.
1375      * From docs, 5 and the successive numbers are:
1376      *
1377      * FOURTH_1     = 5
1378      * FOURTH_2     = 6
1379      * FOURTH_3     = 7
1380      * EIGHTH_0     = 8
1381      * EIGHTH_1     = 9
1382      *
1383      * First 3 textures will get 3/4 of size of the cache, divived evenly
1384      * between them. The last 1/4 of the cache must be divided between
1385      * the last 2 textures, each will therefore get 1/8 of the cache.
1386      * Why not just to use "5 + texture_index" ?
1387      *
1388      * This simple trick works for all "num" <= 16.
1389      */
1390     if (num <= 1)
1391         return R300_TX_CACHE(R300_TX_CACHE_WHOLE);
1392     else
1393         return R300_TX_CACHE(num + index);
1394 }
1395
1396 static void r300_set_fragment_sampler_views(struct pipe_context* pipe,
1397                                             unsigned count,
1398                                             struct pipe_sampler_view** views)
1399 {
1400     struct r300_context* r300 = r300_context(pipe);
1401     struct r300_textures_state* state =
1402         (struct r300_textures_state*)r300->textures_state.state;
1403     struct r300_resource *texture;
1404     unsigned i, real_num_views = 0, view_index = 0;
1405     unsigned tex_units = r300->screen->caps.num_tex_units;
1406     boolean dirty_tex = FALSE;
1407
1408     if (count > tex_units) {
1409         return;
1410     }
1411
1412     /* Calculate the real number of views. */
1413     for (i = 0; i < count; i++) {
1414         if (views[i])
1415             real_num_views++;
1416     }
1417
1418     for (i = 0; i < count; i++) {
1419         pipe_sampler_view_reference(
1420                 (struct pipe_sampler_view**)&state->sampler_views[i],
1421                 views[i]);
1422
1423         if (!views[i]) {
1424             continue;
1425         }
1426
1427         /* A new sampler view (= texture)... */
1428         dirty_tex = TRUE;
1429
1430         /* Set the texrect factor in the fragment shader.
1431              * Needed for RECT and NPOT fallback. */
1432         texture = r300_resource(views[i]->texture);
1433         if (texture->tex.is_npot) {
1434             r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
1435         }
1436
1437         state->sampler_views[i]->texcache_region =
1438                 r300_assign_texture_cache_region(view_index, real_num_views);
1439         view_index++;
1440     }
1441
1442     for (i = count; i < tex_units; i++) {
1443         if (state->sampler_views[i]) {
1444             pipe_sampler_view_reference(
1445                     (struct pipe_sampler_view**)&state->sampler_views[i],
1446                     NULL);
1447         }
1448     }
1449
1450     state->sampler_view_count = count;
1451
1452     r300_mark_atom_dirty(r300, &r300->textures_state);
1453
1454     if (dirty_tex) {
1455         r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
1456     }
1457 }
1458
1459 struct pipe_sampler_view *
1460 r300_create_sampler_view_custom(struct pipe_context *pipe,
1461                          struct pipe_resource *texture,
1462                          const struct pipe_sampler_view *templ,
1463                          unsigned width0_override,
1464                          unsigned height0_override)
1465 {
1466     struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view);
1467     struct r300_resource *tex = r300_resource(texture);
1468     boolean is_r500 = r300_screen(pipe->screen)->caps.is_r500;
1469     boolean dxtc_swizzle = r300_screen(pipe->screen)->caps.dxtc_swizzle;
1470
1471     if (view) {
1472         unsigned hwformat;
1473
1474         view->base = *templ;
1475         view->base.reference.count = 1;
1476         view->base.context = pipe;
1477         view->base.texture = NULL;
1478         pipe_resource_reference(&view->base.texture, texture);
1479
1480         view->width0_override = width0_override;
1481         view->height0_override = height0_override;
1482         view->swizzle[0] = templ->swizzle_r;
1483         view->swizzle[1] = templ->swizzle_g;
1484         view->swizzle[2] = templ->swizzle_b;
1485         view->swizzle[3] = templ->swizzle_a;
1486
1487         hwformat = r300_translate_texformat(templ->format,
1488                                             view->swizzle,
1489                                             is_r500,
1490                                             dxtc_swizzle);
1491
1492         if (hwformat == ~0) {
1493             fprintf(stderr, "r300: Ooops. Got unsupported format %s in %s.\n",
1494                     util_format_short_name(templ->format), __func__);
1495         }
1496         assert(hwformat != ~0);
1497
1498         r300_texture_setup_format_state(r300_screen(pipe->screen), tex,
1499                                         templ->format, 0,
1500                                         width0_override, height0_override,
1501                                         &view->format);
1502         view->format.format1 |= hwformat;
1503         if (is_r500) {
1504             view->format.format2 |= r500_tx_format_msb_bit(templ->format);
1505         }
1506     }
1507
1508     return (struct pipe_sampler_view*)view;
1509 }
1510
1511 static struct pipe_sampler_view *
1512 r300_create_sampler_view(struct pipe_context *pipe,
1513                          struct pipe_resource *texture,
1514                          const struct pipe_sampler_view *templ)
1515 {
1516     return r300_create_sampler_view_custom(pipe, texture, templ,
1517                                            r300_resource(texture)->tex.width0,
1518                                            r300_resource(texture)->tex.height0);
1519 }
1520
1521
1522 static void
1523 r300_sampler_view_destroy(struct pipe_context *pipe,
1524                           struct pipe_sampler_view *view)
1525 {
1526    pipe_resource_reference(&view->texture, NULL);
1527    FREE(view);
1528 }
1529
1530 static void r300_set_scissor_state(struct pipe_context* pipe,
1531                                    const struct pipe_scissor_state* state)
1532 {
1533     struct r300_context* r300 = r300_context(pipe);
1534
1535     memcpy(r300->scissor_state.state, state,
1536         sizeof(struct pipe_scissor_state));
1537
1538     r300_mark_atom_dirty(r300, &r300->scissor_state);
1539 }
1540
1541 static void r300_set_viewport_state(struct pipe_context* pipe,
1542                                     const struct pipe_viewport_state* state)
1543 {
1544     struct r300_context* r300 = r300_context(pipe);
1545     struct r300_viewport_state* viewport =
1546         (struct r300_viewport_state*)r300->viewport_state.state;
1547
1548     r300->viewport = *state;
1549
1550     if (r300->draw) {
1551         draw_set_viewport_state(r300->draw, state);
1552         viewport->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT;
1553         return;
1554     }
1555
1556     /* Do the transform in HW. */
1557     viewport->vte_control = R300_VTX_W0_FMT;
1558
1559     if (state->scale[0] != 1.0f) {
1560         viewport->xscale = state->scale[0];
1561         viewport->vte_control |= R300_VPORT_X_SCALE_ENA;
1562     }
1563     if (state->scale[1] != 1.0f) {
1564         viewport->yscale = state->scale[1];
1565         viewport->vte_control |= R300_VPORT_Y_SCALE_ENA;
1566     }
1567     if (state->scale[2] != 1.0f) {
1568         viewport->zscale = state->scale[2];
1569         viewport->vte_control |= R300_VPORT_Z_SCALE_ENA;
1570     }
1571     if (state->translate[0] != 0.0f) {
1572         viewport->xoffset = state->translate[0];
1573         viewport->vte_control |= R300_VPORT_X_OFFSET_ENA;
1574     }
1575     if (state->translate[1] != 0.0f) {
1576         viewport->yoffset = state->translate[1];
1577         viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA;
1578     }
1579     if (state->translate[2] != 0.0f) {
1580         viewport->zoffset = state->translate[2];
1581         viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA;
1582     }
1583
1584     r300_mark_atom_dirty(r300, &r300->viewport_state);
1585     if (r300->fs.state && r300_fs(r300)->shader &&
1586         r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) {
1587         r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
1588     }
1589 }
1590
1591 static void r300_set_vertex_buffers(struct pipe_context* pipe,
1592                                     unsigned count,
1593                                     const struct pipe_vertex_buffer* buffers)
1594 {
1595     struct r300_context* r300 = r300_context(pipe);
1596
1597     /* There must be at least one vertex buffer set, otherwise it locks up. */
1598     if (!count) {
1599         buffers = &r300->dummy_vb;
1600         count = 1;
1601     }
1602
1603     util_copy_vertex_buffers(r300->vertex_buffer,
1604                              &r300->nr_vertex_buffers,
1605                              buffers, count);
1606
1607     if (r300->screen->caps.has_tcl) {
1608         r300->vertex_arrays_dirty = TRUE;
1609     } else {
1610         draw_set_vertex_buffers(r300->draw, count, buffers);
1611     }
1612 }
1613
1614 static void r300_set_index_buffer(struct pipe_context* pipe,
1615                                   const struct pipe_index_buffer *ib)
1616 {
1617     struct r300_context* r300 = r300_context(pipe);
1618
1619     if (ib) {
1620         pipe_resource_reference(&r300->index_buffer.buffer, ib->buffer);
1621         memcpy(&r300->index_buffer, ib, sizeof(*ib));
1622     } else {
1623         pipe_resource_reference(&r300->index_buffer.buffer, NULL);
1624     }
1625
1626     if (!r300->screen->caps.has_tcl) {
1627         draw_set_index_buffer(r300->draw, ib);
1628     }
1629 }
1630
1631 /* Initialize the PSC tables. */
1632 static void r300_vertex_psc(struct r300_vertex_element_state *velems)
1633 {
1634     struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
1635     uint16_t type, swizzle;
1636     enum pipe_format format;
1637     unsigned i;
1638
1639     /* Vertex shaders have no semantics on their inputs,
1640      * so PSC should just route stuff based on the vertex elements,
1641      * and not on attrib information. */
1642     for (i = 0; i < velems->count; i++) {
1643         format = velems->velem[i].src_format;
1644
1645         type = r300_translate_vertex_data_type(format);
1646         if (type == R300_INVALID_FORMAT) {
1647             fprintf(stderr, "r300: Bad vertex format %s.\n",
1648                     util_format_short_name(format));
1649             assert(0);
1650             abort();
1651         }
1652
1653         type |= i << R300_DST_VEC_LOC_SHIFT;
1654         swizzle = r300_translate_vertex_data_swizzle(format);
1655
1656         if (i & 1) {
1657             vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
1658             vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
1659         } else {
1660             vstream->vap_prog_stream_cntl[i >> 1] |= type;
1661             vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
1662         }
1663     }
1664
1665     /* Set the last vector in the PSC. */
1666     if (i) {
1667         i -= 1;
1668     }
1669     vstream->vap_prog_stream_cntl[i >> 1] |=
1670         (R300_LAST_VEC << (i & 1 ? 16 : 0));
1671
1672     vstream->count = (i >> 1) + 1;
1673 }
1674
1675 static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
1676                                                unsigned count,
1677                                                const struct pipe_vertex_element* attribs)
1678 {
1679     struct r300_context *r300 = r300_context(pipe);
1680     struct r300_vertex_element_state *velems;
1681     unsigned i;
1682     struct pipe_vertex_element dummy_attrib = {0};
1683
1684     /* R300 Programmable Stream Control (PSC) doesn't support 0 vertex elements. */
1685     if (!count) {
1686         dummy_attrib.src_format = PIPE_FORMAT_R8G8B8A8_UNORM;
1687         attribs = &dummy_attrib;
1688         count = 1;
1689     } else if (count > 16) {
1690         fprintf(stderr, "r300: More than 16 vertex elements are not supported,"
1691                 " requested %i, using 16.\n", count);
1692         count = 16;
1693     }
1694
1695     velems = CALLOC_STRUCT(r300_vertex_element_state);
1696     if (!velems)
1697         return NULL;
1698
1699     velems->count = count;
1700
1701     if (r300_screen(pipe->screen)->caps.has_tcl) {
1702         velems->vmgr_elements =
1703             u_vbuf_create_vertex_elements(r300->vbuf_mgr, count, attribs,
1704                                           velems->velem);
1705         /* Setup PSC.
1706          * The unused components will be replaced by (..., 0, 1). */
1707         r300_vertex_psc(velems);
1708
1709         for (i = 0; i < count; i++) {
1710             velems->format_size[i] =
1711                 align(util_format_get_blocksize(velems->velem[i].src_format), 4);
1712             velems->vertex_size_dwords += velems->format_size[i] / 4;
1713         }
1714     } else {
1715         memcpy(velems->velem, attribs, count * sizeof(struct pipe_vertex_element));
1716     }
1717
1718     return velems;
1719 }
1720
1721 static void r300_bind_vertex_elements_state(struct pipe_context *pipe,
1722                                             void *state)
1723 {
1724     struct r300_context *r300 = r300_context(pipe);
1725     struct r300_vertex_element_state *velems = state;
1726
1727     if (velems == NULL) {
1728         return;
1729     }
1730
1731     r300->velems = velems;
1732
1733     if (r300->screen->caps.has_tcl) {
1734         u_vbuf_bind_vertex_elements(r300->vbuf_mgr, state, velems->vmgr_elements);
1735     } else {
1736         draw_set_vertex_elements(r300->draw, velems->count, velems->velem);
1737         return;
1738     }
1739
1740     UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state);
1741     r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2;
1742     r300->vertex_arrays_dirty = TRUE;
1743 }
1744
1745 static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state)
1746 {
1747     struct r300_context *r300 = r300_context(pipe);
1748     struct r300_vertex_element_state *velems = state;
1749
1750     if (r300->screen->caps.has_tcl) {
1751         u_vbuf_destroy_vertex_elements(r300->vbuf_mgr, velems->vmgr_elements);
1752     }
1753     FREE(state);
1754 }
1755
1756 static void* r300_create_vs_state(struct pipe_context* pipe,
1757                                   const struct pipe_shader_state* shader)
1758 {
1759     struct r300_context* r300 = r300_context(pipe);
1760     struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
1761
1762     /* Copy state directly into shader. */
1763     vs->state = *shader;
1764     vs->state.tokens = tgsi_dup_tokens(shader->tokens);
1765
1766     if (r300->screen->caps.has_tcl) {
1767         r300_init_vs_outputs(r300, vs);
1768         r300_translate_vertex_shader(r300, vs);
1769     } else {
1770         r300_draw_init_vertex_shader(r300, vs);
1771     }
1772
1773     return vs;
1774 }
1775
1776 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
1777 {
1778     struct r300_context* r300 = r300_context(pipe);
1779     struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1780
1781     if (vs == NULL) {
1782         r300->vs_state.state = NULL;
1783         return;
1784     }
1785     if (vs == r300->vs_state.state) {
1786         return;
1787     }
1788     r300->vs_state.state = vs;
1789
1790     /* The majority of the RS block bits is dependent on the vertex shader. */
1791     r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */
1792
1793     if (r300->screen->caps.has_tcl) {
1794         unsigned fc_op_dwords = r300->screen->caps.is_r500 ? 3 : 2;
1795         r300_mark_atom_dirty(r300, &r300->vs_state);
1796         r300->vs_state.size = vs->code.length + 9 +
1797                         (R300_VS_MAX_FC_OPS * fc_op_dwords + 4);
1798
1799         r300_mark_atom_dirty(r300, &r300->vs_constants);
1800         r300->vs_constants.size =
1801                 2 +
1802                 (vs->externals_count ? vs->externals_count * 4 + 3 : 0) +
1803                 (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0);
1804
1805         ((struct r300_constant_buffer*)r300->vs_constants.state)->remap_table =
1806                 vs->code.constants_remap_table;
1807
1808         r300_mark_atom_dirty(r300, &r300->pvs_flush);
1809     } else {
1810         draw_bind_vertex_shader(r300->draw,
1811                 (struct draw_vertex_shader*)vs->draw_vs);
1812     }
1813 }
1814
1815 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
1816 {
1817     struct r300_context* r300 = r300_context(pipe);
1818     struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1819
1820     if (r300->screen->caps.has_tcl) {
1821         rc_constants_destroy(&vs->code.constants);
1822         if (vs->code.constants_remap_table)
1823             FREE(vs->code.constants_remap_table);
1824     } else {
1825         draw_delete_vertex_shader(r300->draw,
1826                 (struct draw_vertex_shader*)vs->draw_vs);
1827     }
1828
1829     FREE((void*)vs->state.tokens);
1830     FREE(shader);
1831 }
1832
1833 static void r300_set_constant_buffer(struct pipe_context *pipe,
1834                                      uint shader, uint index,
1835                                      struct pipe_resource *buf)
1836 {
1837     struct r300_context* r300 = r300_context(pipe);
1838     struct r300_constant_buffer *cbuf;
1839     struct r300_resource *rbuf = r300_resource(buf);
1840     uint32_t *mapped;
1841
1842     switch (shader) {
1843         case PIPE_SHADER_VERTEX:
1844             cbuf = (struct r300_constant_buffer*)r300->vs_constants.state;
1845             break;
1846         case PIPE_SHADER_FRAGMENT:
1847             cbuf = (struct r300_constant_buffer*)r300->fs_constants.state;
1848             break;
1849         default:
1850             return;
1851     }
1852
1853     if (buf == NULL || buf->width0 == 0)
1854         return;
1855
1856     if (rbuf->b.user_ptr)
1857         mapped = (uint32_t*)rbuf->b.user_ptr;
1858     else if (rbuf->constant_buffer)
1859         mapped = (uint32_t*)rbuf->constant_buffer;
1860     else
1861         return;
1862
1863     if (shader == PIPE_SHADER_FRAGMENT ||
1864         (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) {
1865         cbuf->ptr = mapped;
1866     }
1867
1868     if (shader == PIPE_SHADER_VERTEX) {
1869         if (r300->screen->caps.has_tcl) {
1870             struct r300_vertex_shader *vs =
1871                     (struct r300_vertex_shader*)r300->vs_state.state;
1872
1873             if (!vs) {
1874                 cbuf->buffer_base = 0;
1875                 return;
1876             }
1877
1878             cbuf->buffer_base = r300->vs_const_base;
1879             r300->vs_const_base += vs->code.constants.Count;
1880             if (r300->vs_const_base > R500_MAX_PVS_CONST_VECS) {
1881                 r300->vs_const_base = vs->code.constants.Count;
1882                 cbuf->buffer_base = 0;
1883                 r300_mark_atom_dirty(r300, &r300->pvs_flush);
1884             }
1885             r300_mark_atom_dirty(r300, &r300->vs_constants);
1886         } else if (r300->draw) {
1887             draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX,
1888                 0, mapped, buf->width0);
1889         }
1890     } else if (shader == PIPE_SHADER_FRAGMENT) {
1891         r300_mark_atom_dirty(r300, &r300->fs_constants);
1892     }
1893 }
1894
1895 static void r300_texture_barrier(struct pipe_context *pipe)
1896 {
1897     struct r300_context *r300 = r300_context(pipe);
1898
1899     r300_mark_atom_dirty(r300, &r300->gpu_flush);
1900     r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
1901 }
1902
1903 void r300_init_state_functions(struct r300_context* r300)
1904 {
1905     r300->context.create_blend_state = r300_create_blend_state;
1906     r300->context.bind_blend_state = r300_bind_blend_state;
1907     r300->context.delete_blend_state = r300_delete_blend_state;
1908
1909     r300->context.set_blend_color = r300_set_blend_color;
1910
1911     r300->context.set_clip_state = r300_set_clip_state;
1912     r300->context.set_sample_mask = r300_set_sample_mask;
1913
1914     r300->context.set_constant_buffer = r300_set_constant_buffer;
1915
1916     r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
1917     r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
1918     r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
1919
1920     r300->context.set_stencil_ref = r300_set_stencil_ref;
1921
1922     r300->context.set_framebuffer_state = r300_set_framebuffer_state;
1923
1924     r300->context.create_fs_state = r300_create_fs_state;
1925     r300->context.bind_fs_state = r300_bind_fs_state;
1926     r300->context.delete_fs_state = r300_delete_fs_state;
1927
1928     r300->context.set_polygon_stipple = r300_set_polygon_stipple;
1929
1930     r300->context.create_rasterizer_state = r300_create_rs_state;
1931     r300->context.bind_rasterizer_state = r300_bind_rs_state;
1932     r300->context.delete_rasterizer_state = r300_delete_rs_state;
1933
1934     r300->context.create_sampler_state = r300_create_sampler_state;
1935     r300->context.bind_fragment_sampler_states = r300_bind_sampler_states;
1936     r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures;
1937     r300->context.delete_sampler_state = r300_delete_sampler_state;
1938
1939     r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views;
1940     r300->context.create_sampler_view = r300_create_sampler_view;
1941     r300->context.sampler_view_destroy = r300_sampler_view_destroy;
1942
1943     r300->context.set_scissor_state = r300_set_scissor_state;
1944
1945     r300->context.set_viewport_state = r300_set_viewport_state;
1946
1947     r300->context.set_vertex_buffers = r300_set_vertex_buffers;
1948     r300->context.set_index_buffer = r300_set_index_buffer;
1949     r300->context.redefine_user_buffer = u_default_redefine_user_buffer;
1950
1951     r300->context.create_vertex_elements_state = r300_create_vertex_elements_state;
1952     r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state;
1953     r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state;
1954
1955     r300->context.create_vs_state = r300_create_vs_state;
1956     r300->context.bind_vs_state = r300_bind_vs_state;
1957     r300->context.delete_vs_state = r300_delete_vs_state;
1958
1959     r300->context.texture_barrier = r300_texture_barrier;
1960 }