Tizen 2.0 Release
[profile/ivi/osmesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * on the rights to use, copy, modify, merge, publish, distribute, sub
9  * license, and/or sell copies of the Software, and to permit persons to whom
10  * the Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28
29 #include "r300_context.h"
30 #include "r300_texture.h"
31 #include "r300_screen_buffer.h"
32 #include "r300_state_inlines.h"
33 #include "r300_public.h"
34
35 #include "draw/draw_context.h"
36
37 /* Return the identifier behind whom the brave coders responsible for this
38  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
39  *
40  * ...I should have just put "Corbin Simpson", but I'm not that cool.
41  *
42  * (Or egotistical. Yet.) */
43 static const char* r300_get_vendor(struct pipe_screen* pscreen)
44 {
45     return "X.Org R300 Project";
46 }
47
48 static const char* chip_families[] = {
49     "ATI R300",
50     "ATI R350",
51     "ATI RV350",
52     "ATI RV370",
53     "ATI RV380",
54     "ATI RS400",
55     "ATI RC410",
56     "ATI RS480",
57     "ATI R420",
58     "ATI R423",
59     "ATI R430",
60     "ATI R480",
61     "ATI R481",
62     "ATI RV410",
63     "ATI RS600",
64     "ATI RS690",
65     "ATI RS740",
66     "ATI RV515",
67     "ATI R520",
68     "ATI RV530",
69     "ATI R580",
70     "ATI RV560",
71     "ATI RV570"
72 };
73
74 static const char* r300_get_name(struct pipe_screen* pscreen)
75 {
76     struct r300_screen* r300screen = r300_screen(pscreen);
77
78     return chip_families[r300screen->caps.family];
79 }
80
81 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
82 {
83     struct r300_screen* r300screen = r300_screen(pscreen);
84     boolean is_r500 = r300screen->caps.is_r500;
85
86     switch (param) {
87         /* Supported features (boolean caps). */
88         case PIPE_CAP_NPOT_TEXTURES:
89         case PIPE_CAP_TWO_SIDED_STENCIL:
90         case PIPE_CAP_GLSL:
91             /* I'll be frank. This is a lie.
92              *
93              * We don't truly support GLSL on any of this driver's chipsets.
94              * To be fair, no chipset supports the full GLSL specification
95              * to the best of our knowledge, but some of the less esoteric
96              * features are still missing here.
97              *
98              * Rather than cripple ourselves intentionally, I'm going to set
99              * this flag, and as Gallium's interface continues to change, I
100              * hope that this single monolithic GLSL enable can slowly get
101              * split down into many different pieces and the state tracker
102              * will handle fallbacks transparently, like it should.
103              *
104              * ~ C.
105              */
106         case PIPE_CAP_ANISOTROPIC_FILTER:
107         case PIPE_CAP_POINT_SPRITE:
108         case PIPE_CAP_OCCLUSION_QUERY:
109         case PIPE_CAP_TEXTURE_SHADOW_MAP:
110         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
111         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
112         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
113         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
114         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
115         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
116             return 1;
117
118         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
119         case PIPE_CAP_TEXTURE_SWIZZLE:
120             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
121
122         /* Supported on r500 only. */
123         case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL:
124         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
125         case PIPE_CAP_SM3:
126             return is_r500 ? 1 : 0;
127
128         /* Unsupported features. */
129         case PIPE_CAP_TIMER_QUERY:
130         case PIPE_CAP_DUAL_SOURCE_BLEND:
131         case PIPE_CAP_INDEP_BLEND_ENABLE:
132         case PIPE_CAP_INDEP_BLEND_FUNC:
133         case PIPE_CAP_DEPTH_CLAMP:
134         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
135         case PIPE_CAP_SHADER_STENCIL_EXPORT:
136         case PIPE_CAP_ARRAY_TEXTURES:
137         case PIPE_CAP_TGSI_INSTANCEID:
138         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
139         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
140         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
141         case PIPE_CAP_SEAMLESS_CUBE_MAP:
142         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
143             return 0;
144
145         /* SWTCL-only features. */
146         case PIPE_CAP_STREAM_OUTPUT:
147         case PIPE_CAP_PRIMITIVE_RESTART:
148             return !r300screen->caps.has_tcl;
149
150         /* Texturing. */
151         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
152         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
153             return r300screen->caps.num_tex_units;
154         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
155         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
156         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
157             /* 13 == 4096, 12 == 2048 */
158             return is_r500 ? 13 : 12;
159
160         /* Render targets. */
161         case PIPE_CAP_MAX_RENDER_TARGETS:
162             return 4;
163
164         default:
165             debug_printf("r300: Warning: Unknown CAP %d in get_param.\n",
166                          param);
167             return 0;
168     }
169 }
170
171 static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param)
172 {
173    struct r300_screen* r300screen = r300_screen(pscreen);
174    boolean is_r400 = r300screen->caps.is_r400;
175    boolean is_r500 = r300screen->caps.is_r500;
176
177    switch (shader)
178     {
179     case PIPE_SHADER_FRAGMENT:
180         switch (param)
181         {
182         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
183             return is_r500 || is_r400 ? 512 : 96;
184         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
185             return is_r500 || is_r400 ? 512 : 64;
186         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
187             return is_r500 || is_r400 ? 512 : 32;
188         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
189             return is_r500 ? 511 : 4;
190         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
191             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
192             /* Fragment shader limits. */
193         case PIPE_SHADER_CAP_MAX_INPUTS:
194             /* 2 colors + 8 texcoords are always supported
195              * (minus fog and wpos).
196              *
197              * R500 has the ability to turn 3rd and 4th color into
198              * additional texcoords but there is no two-sided color
199              * selection then. However the facing bit can be used instead. */
200             return 10;
201         case PIPE_SHADER_CAP_MAX_CONSTS:
202             return is_r500 ? 256 : 32;
203         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
204             return 1;
205         case PIPE_SHADER_CAP_MAX_TEMPS:
206             return is_r500 ? 128 : is_r400 ? 64 : 32;
207         case PIPE_SHADER_CAP_MAX_ADDRS:
208             return 0;
209         case PIPE_SHADER_CAP_MAX_PREDS:
210             return is_r500 ? 1 : 0;
211         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
212             return 0;
213         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
214         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
215         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
216         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
217             return 0;
218         case PIPE_SHADER_CAP_SUBROUTINES:
219             return 0;
220         }
221         break;
222     case PIPE_SHADER_VERTEX:
223         if (!r300screen->caps.has_tcl) {
224             return draw_get_shader_param(shader, param);
225         }
226
227         switch (param)
228         {
229         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
230         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
231             return is_r500 ? 1024 : 256;
232         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
233         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
234             return 0;
235         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
236             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
237         case PIPE_SHADER_CAP_MAX_INPUTS:
238             return 16;
239         case PIPE_SHADER_CAP_MAX_CONSTS:
240             return 256;
241         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
242             return 1;
243         case PIPE_SHADER_CAP_MAX_TEMPS:
244             return 32;
245         case PIPE_SHADER_CAP_MAX_ADDRS:
246             return 1; /* XXX guessed */
247         case PIPE_SHADER_CAP_MAX_PREDS:
248             return is_r500 ? 4 : 0; /* XXX guessed. */
249         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
250             return 0;
251         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
252         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
253         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
254             return 0;
255         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
256             return 1;
257         case PIPE_SHADER_CAP_SUBROUTINES:
258             return 0;
259         default:
260             break;
261         }
262         break;
263     default:
264         break;
265     }
266     return 0;
267 }
268
269 static float r300_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
270 {
271     struct r300_screen* r300screen = r300_screen(pscreen);
272
273     switch (param) {
274         case PIPE_CAP_MAX_LINE_WIDTH:
275         case PIPE_CAP_MAX_LINE_WIDTH_AA:
276         case PIPE_CAP_MAX_POINT_WIDTH:
277         case PIPE_CAP_MAX_POINT_WIDTH_AA:
278             /* The maximum dimensions of the colorbuffer are our practical
279              * rendering limits. 2048 pixels should be enough for anybody. */
280             if (r300screen->caps.is_r500) {
281                 return 4096.0f;
282             } else if (r300screen->caps.is_r400) {
283                 return 4021.0f;
284             } else {
285                 return 2560.0f;
286             }
287         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
288             return 16.0f;
289         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
290             return 16.0f;
291         case PIPE_CAP_GUARD_BAND_LEFT:
292         case PIPE_CAP_GUARD_BAND_TOP:
293         case PIPE_CAP_GUARD_BAND_RIGHT:
294         case PIPE_CAP_GUARD_BAND_BOTTOM:
295             /* XXX I don't know what these should be but the least we can do is
296              * silence the potential error message */
297             return 0.0f;
298         default:
299             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
300                          param);
301             return 0.0f;
302     }
303 }
304
305 static boolean r300_is_format_supported(struct pipe_screen* screen,
306                                         enum pipe_format format,
307                                         enum pipe_texture_target target,
308                                         unsigned sample_count,
309                                         unsigned usage)
310 {
311     struct radeon_winsys *rws = r300_screen(screen)->rws;
312     uint32_t retval = 0;
313     boolean drm_2_8_0 = rws->get_value(rws, RADEON_VID_DRM_2_8_0);
314     boolean is_r500 = r300_screen(screen)->caps.is_r500;
315     boolean is_r400 = r300_screen(screen)->caps.is_r400;
316     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
317                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
318                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
319                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
320     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
321                        format == PIPE_FORMAT_RGTC1_SNORM ||
322                        format == PIPE_FORMAT_LATC1_UNORM ||
323                        format == PIPE_FORMAT_LATC1_SNORM;
324     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
325                        format == PIPE_FORMAT_RGTC2_SNORM ||
326                        format == PIPE_FORMAT_LATC2_UNORM ||
327                        format == PIPE_FORMAT_LATC2_SNORM;
328     boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
329                             format == PIPE_FORMAT_R16G16_FLOAT ||
330                             format == PIPE_FORMAT_A16_FLOAT ||
331                             format == PIPE_FORMAT_L16_FLOAT ||
332                             format == PIPE_FORMAT_L16A16_FLOAT ||
333                             format == PIPE_FORMAT_I16_FLOAT;
334     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
335                             format == PIPE_FORMAT_R16G16_FLOAT ||
336                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
337                             format == PIPE_FORMAT_R16G16B16A16_FLOAT;
338
339     if (!util_format_is_supported(format, usage))
340        return FALSE;
341
342     /* Check multisampling support. */
343     switch (sample_count) {
344         case 0:
345         case 1:
346             break;
347         case 2:
348         case 3:
349         case 4:
350         case 6:
351             return FALSE;
352 #if 0
353             if (usage != PIPE_BIND_RENDER_TARGET ||
354                 !util_format_is_rgba8_variant(
355                     util_format_description(format))) {
356                 return FALSE;
357             }
358 #endif
359             break;
360         default:
361             return FALSE;
362     }
363
364     /* Check sampler format support. */
365     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
366         /* ATI1N is r5xx-only. */
367         (is_r500 || !is_ati1n) &&
368         /* ATI2N is supported on r4xx-r5xx. */
369         (is_r400 || is_r500 || !is_ati2n) &&
370         /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
371         (drm_2_8_0 || !is_x16f_xy16f) &&
372         r300_is_sampler_format_supported(format)) {
373         retval |= PIPE_BIND_SAMPLER_VIEW;
374     }
375
376     /* Check colorbuffer format support. */
377     if ((usage & (PIPE_BIND_RENDER_TARGET |
378                   PIPE_BIND_DISPLAY_TARGET |
379                   PIPE_BIND_SCANOUT |
380                   PIPE_BIND_SHARED)) &&
381         /* 2101010 cannot be rendered to on non-r5xx. */
382         (!is_color2101010 || (is_r500 && drm_2_8_0)) &&
383         r300_is_colorbuffer_format_supported(format)) {
384         retval |= usage &
385             (PIPE_BIND_RENDER_TARGET |
386              PIPE_BIND_DISPLAY_TARGET |
387              PIPE_BIND_SCANOUT |
388              PIPE_BIND_SHARED);
389     }
390
391     /* Check depth-stencil format support. */
392     if (usage & PIPE_BIND_DEPTH_STENCIL &&
393         r300_is_zs_format_supported(format)) {
394         retval |= PIPE_BIND_DEPTH_STENCIL;
395     }
396
397     /* Check vertex buffer format support. */
398     if (usage & PIPE_BIND_VERTEX_BUFFER &&
399         /* Half float is supported on >= RV350. */
400         (is_r400 || is_r500 || !is_half_float) &&
401         r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
402         retval |= PIPE_BIND_VERTEX_BUFFER;
403     }
404
405     /* Transfers are always supported. */
406     if (usage & PIPE_BIND_TRANSFER_READ)
407         retval |= PIPE_BIND_TRANSFER_READ;
408     if (usage & PIPE_BIND_TRANSFER_WRITE)
409         retval |= PIPE_BIND_TRANSFER_WRITE;
410
411     return retval == usage;
412 }
413
414 static void r300_destroy_screen(struct pipe_screen* pscreen)
415 {
416     struct r300_screen* r300screen = r300_screen(pscreen);
417     struct radeon_winsys *rws = radeon_winsys(pscreen);
418
419     util_slab_destroy(&r300screen->pool_buffers);
420     pipe_mutex_destroy(r300screen->num_contexts_mutex);
421
422     if (rws)
423       rws->destroy(rws);
424
425     FREE(r300screen);
426 }
427
428 static void r300_fence_reference(struct pipe_screen *screen,
429                                  struct pipe_fence_handle **ptr,
430                                  struct pipe_fence_handle *fence)
431 {
432     pb_reference((struct pb_buffer**)ptr,
433                              (struct pb_buffer*)fence);
434 }
435
436 static boolean r300_fence_signalled(struct pipe_screen *screen,
437                                     struct pipe_fence_handle *fence)
438 {
439     struct radeon_winsys *rws = r300_screen(screen)->rws;
440     struct pb_buffer *rfence = (struct pb_buffer*)fence;
441
442     return !rws->buffer_is_busy(rfence);
443 }
444
445 static boolean r300_fence_finish(struct pipe_screen *screen,
446                                  struct pipe_fence_handle *fence,
447                                  uint64_t timeout)
448 {
449     struct radeon_winsys *rws = r300_screen(screen)->rws;
450     struct pb_buffer *rfence = (struct pb_buffer*)fence;
451
452     if (timeout != PIPE_TIMEOUT_INFINITE) {
453         int64_t start_time = os_time_get();
454
455         /* Convert to microseconds. */
456         timeout /= 1000;
457
458         /* Wait in a loop. */
459         while (rws->buffer_is_busy(rfence)) {
460             if (os_time_get() - start_time >= timeout) {
461                 return FALSE;
462             }
463             os_time_sleep(10);
464         }
465         return TRUE;
466     }
467
468     rws->buffer_wait(rfence);
469     return TRUE;
470 }
471
472 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
473 {
474     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
475
476     if (!r300screen) {
477         FREE(r300screen);
478         return NULL;
479     }
480
481     r300screen->caps.pci_id = rws->get_value(rws, RADEON_VID_PCI_ID);
482     r300screen->caps.num_frag_pipes = rws->get_value(rws, RADEON_VID_R300_GB_PIPES);
483     r300screen->caps.num_z_pipes = rws->get_value(rws, RADEON_VID_R300_Z_PIPES);
484
485     r300_init_debug(r300screen);
486     r300_parse_chipset(&r300screen->caps);
487
488     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
489         r300screen->caps.zmask_ram = 0;
490     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
491         r300screen->caps.hiz_ram = 0;
492
493     if (!rws->get_value(rws, RADEON_VID_DRM_2_8_0))
494         r300screen->caps.has_us_format = FALSE;
495
496     pipe_mutex_init(r300screen->num_contexts_mutex);
497
498     util_slab_create(&r300screen->pool_buffers,
499                      sizeof(struct r300_resource), 64,
500                      UTIL_SLAB_SINGLETHREADED);
501
502     r300screen->rws = rws;
503     r300screen->screen.winsys = (struct pipe_winsys*)rws;
504     r300screen->screen.destroy = r300_destroy_screen;
505     r300screen->screen.get_name = r300_get_name;
506     r300screen->screen.get_vendor = r300_get_vendor;
507     r300screen->screen.get_param = r300_get_param;
508     r300screen->screen.get_shader_param = r300_get_shader_param;
509     r300screen->screen.get_paramf = r300_get_paramf;
510     r300screen->screen.is_format_supported = r300_is_format_supported;
511     r300screen->screen.context_create = r300_create_context;
512
513     r300screen->screen.fence_reference = r300_fence_reference;
514     r300screen->screen.fence_signalled = r300_fence_signalled;
515     r300screen->screen.fence_finish = r300_fence_finish;
516
517     r300_init_screen_resource_functions(r300screen);
518
519     util_format_s3tc_init();
520
521     return &r300screen->screen;
522 }