09355569fb89f0e5bb08d40d2b254948165713c7
[profile/ivi/mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2  * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * on the rights to use, copy, modify, merge, publish, distribute, sub
8  * license, and/or sell copies of the Software, and to permit persons to whom
9  * the Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 /* r300_render: Vertex and index buffer primitive emission. Contains both
24  * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
25
26 #include "draw/draw_context.h"
27 #include "draw/draw_vbuf.h"
28
29 #include "util/u_inlines.h"
30
31 #include "util/u_format.h"
32 #include "util/u_memory.h"
33 #include "util/u_upload_mgr.h"
34 #include "util/u_prim.h"
35
36 #include "r300_cs.h"
37 #include "r300_context.h"
38 #include "r300_screen_buffer.h"
39 #include "r300_emit.h"
40 #include "r300_reg.h"
41 #include "r300_render.h"
42 #include "r300_state_derived.h"
43
44 /* XXX The DRM rejects VAP_ALT_NUM_VERTICES.. */
45 //#define ENABLE_ALT_NUM_VERTS
46
47 uint32_t r300_translate_primitive(unsigned prim)
48 {
49     switch (prim) {
50         case PIPE_PRIM_POINTS:
51             return R300_VAP_VF_CNTL__PRIM_POINTS;
52         case PIPE_PRIM_LINES:
53             return R300_VAP_VF_CNTL__PRIM_LINES;
54         case PIPE_PRIM_LINE_LOOP:
55             return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
56         case PIPE_PRIM_LINE_STRIP:
57             return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
58         case PIPE_PRIM_TRIANGLES:
59             return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
60         case PIPE_PRIM_TRIANGLE_STRIP:
61             return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
62         case PIPE_PRIM_TRIANGLE_FAN:
63             return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
64         case PIPE_PRIM_QUADS:
65             return R300_VAP_VF_CNTL__PRIM_QUADS;
66         case PIPE_PRIM_QUAD_STRIP:
67             return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
68         case PIPE_PRIM_POLYGON:
69             return R300_VAP_VF_CNTL__PRIM_POLYGON;
70         default:
71             return 0;
72     }
73 }
74
75 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
76                                             unsigned mode)
77 {
78     struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
79     uint32_t color_control = rs->color_control;
80
81     /* By default (see r300_state.c:r300_create_rs_state) color_control is
82      * initialized to provoking the first vertex.
83      *
84      * Triangle fans must be reduced to the second vertex, not the first, in
85      * Gallium flatshade-first mode, as per the GL spec.
86      * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
87      *
88      * Quads never provoke correctly in flatshade-first mode. The first
89      * vertex is never considered as provoking, so only the second, third,
90      * and fourth vertices can be selected, and both "third" and "last" modes
91      * select the fourth vertex. This is probably due to D3D lacking quads.
92      *
93      * Similarly, polygons reduce to the first, not the last, vertex, when in
94      * "last" mode, and all other modes start from the second vertex.
95      *
96      * ~ C.
97      */
98
99     if (rs->rs.flatshade_first) {
100         switch (mode) {
101             case PIPE_PRIM_TRIANGLE_FAN:
102                 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
103                 break;
104             case PIPE_PRIM_QUADS:
105             case PIPE_PRIM_QUAD_STRIP:
106             case PIPE_PRIM_POLYGON:
107                 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
108                 break;
109             default:
110                 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
111                 break;
112         }
113     } else {
114         color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
115     }
116
117     return color_control;
118 }
119
120 /* Check if the requested number of dwords is available in the CS and
121  * if not, flush. Return TRUE if the flush occured. */
122 static boolean r300_reserve_cs_space(struct r300_context *r300,
123                                      unsigned dwords)
124 {
125     if (!r300->rws->check_cs(r300->rws, dwords)) {
126         r300->context.flush(&r300->context, 0, NULL);
127         return TRUE;
128     }
129     return FALSE;
130 }
131
132 static boolean immd_is_good_idea(struct r300_context *r300,
133                                  unsigned count)
134 {
135     struct pipe_vertex_element* velem;
136     struct pipe_vertex_buffer* vbuf;
137     boolean checked[PIPE_MAX_ATTRIBS] = {0};
138     unsigned vertex_element_count = r300->velems->count;
139     unsigned i, vbi;
140
141     if (count > 10) {
142         return FALSE;
143     }
144
145     /* We shouldn't map buffers referenced by CS, busy buffers,
146      * and ones placed in VRAM. */
147     /* XXX Check for VRAM buffers. */
148     for (i = 0; i < vertex_element_count; i++) {
149         velem = &r300->velems->velem[i];
150         vbi = velem->vertex_buffer_index;
151
152         if (!checked[vbi]) {
153             vbuf = &r300->vertex_buffer[vbi];
154
155             if (r300_buffer_is_referenced(r300, vbuf->buffer)) {
156                 /* It's a very bad idea to map it... */
157                 return FALSE;
158             }
159             checked[vbi] = TRUE;
160         }
161     }
162     return TRUE;
163 }
164
165 /*****************************************************************************
166  * The emission of draw packets for r500. Older GPUs may use these functions *
167  * after resolving fallback issues (e.g. stencil ref two-sided).             *
168  ****************************************************************************/
169
170 void r500_emit_draw_arrays_immediate(struct r300_context *r300,
171                                      unsigned mode,
172                                      unsigned start,
173                                      unsigned count)
174 {
175     struct pipe_vertex_element* velem;
176     struct pipe_vertex_buffer* vbuf;
177     unsigned vertex_element_count = r300->velems->count;
178     unsigned i, v, vbi, dw, elem_offset, dwords;
179
180     /* Size of the vertex, in dwords. */
181     unsigned vertex_size = 0;
182
183     /* Offsets of the attribute, in dwords, from the start of the vertex. */
184     unsigned offset[PIPE_MAX_ATTRIBS];
185
186     /* Size of the vertex element, in dwords. */
187     unsigned size[PIPE_MAX_ATTRIBS];
188
189     /* Stride to the same attrib in the next vertex in the vertex buffer,
190      * in dwords. */
191     unsigned stride[PIPE_MAX_ATTRIBS] = {0};
192
193     /* Mapped vertex buffers. */
194     uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
195
196     CS_LOCALS(r300);
197
198     /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
199     for (i = 0; i < vertex_element_count; i++) {
200         velem = &r300->velems->velem[i];
201         offset[i] = velem->src_offset / 4;
202         size[i] = util_format_get_blocksize(velem->src_format) / 4;
203         vertex_size += size[i];
204         vbi = velem->vertex_buffer_index;
205
206         /* Map the buffer. */
207         if (!map[vbi]) {
208             vbuf = &r300->vertex_buffer[vbi];
209             map[vbi] = (uint32_t*)pipe_buffer_map(r300->context.screen,
210                                                   vbuf->buffer,
211                                                   PIPE_BUFFER_USAGE_CPU_READ);
212             map[vbi] += vbuf->buffer_offset / 4;
213             stride[vbi] = vbuf->stride / 4;
214         }
215     }
216
217     dwords = 9 + count * vertex_size;
218
219     r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords);
220     r300_emit_buffer_validate(r300, FALSE, NULL);
221     r300_emit_dirty_state(r300);
222
223     BEGIN_CS(dwords);
224     OUT_CS_REG(R300_GA_COLOR_CONTROL,
225             r300_provoking_vertex_fixes(r300, mode));
226     OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
227     OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
228     OUT_CS(count - 1);
229     OUT_CS(0);
230     OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
231     OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
232             r300_translate_primitive(mode));
233
234     /* Emit vertices. */
235     for (v = 0; v < count; v++) {
236         for (i = 0; i < vertex_element_count; i++) {
237             velem = &r300->velems->velem[i];
238             vbi = velem->vertex_buffer_index;
239             elem_offset = offset[i] + stride[vbi] * (v + start);
240
241             for (dw = 0; dw < size[i]; dw++) {
242                 OUT_CS(map[vbi][elem_offset + dw]);
243             }
244         }
245     }
246     END_CS;
247
248     /* Unmap buffers. */
249     for (i = 0; i < vertex_element_count; i++) {
250         vbi = r300->velems->velem[i].vertex_buffer_index;
251
252         if (map[vbi]) {
253             vbuf = &r300->vertex_buffer[vbi];
254             pipe_buffer_unmap(r300->context.screen, vbuf->buffer);
255             map[vbi] = NULL;
256         }
257     }
258 }
259
260 void r500_emit_draw_arrays(struct r300_context *r300,
261                            unsigned mode,
262                            unsigned count)
263 {
264 #if defined(ENABLE_ALT_NUM_VERTS)
265     boolean alt_num_verts = count > 65535;
266 #else
267     boolean alt_num_verts = FALSE;
268 #endif
269     CS_LOCALS(r300);
270
271     if (alt_num_verts) {
272         assert(count < (1 << 24));
273         BEGIN_CS(9);
274         OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
275     } else {
276         BEGIN_CS(7);
277     }
278     OUT_CS_REG(R300_GA_COLOR_CONTROL,
279             r300_provoking_vertex_fixes(r300, mode));
280     OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
281     OUT_CS(count - 1);
282     OUT_CS(0);
283     OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
284     OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
285            r300_translate_primitive(mode) |
286            (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
287     END_CS;
288 }
289
290 void r500_emit_draw_elements(struct r300_context *r300,
291                              struct pipe_buffer* indexBuffer,
292                              unsigned indexSize,
293                              unsigned minIndex,
294                              unsigned maxIndex,
295                              unsigned mode,
296                              unsigned start,
297                              unsigned count)
298 {
299     uint32_t count_dwords;
300     uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
301 #if defined(ENABLE_ALT_NUM_VERTS)
302     boolean alt_num_verts = count > 65535;
303 #else
304     boolean alt_num_verts = FALSE;
305 #endif
306     CS_LOCALS(r300);
307
308     assert(count < (1 << 24));
309
310     maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index);
311
312     DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
313         count, minIndex, maxIndex);
314
315     if (alt_num_verts) {
316         BEGIN_CS(15);
317         OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
318     } else {
319         BEGIN_CS(13);
320     }
321     OUT_CS_REG(R300_GA_COLOR_CONTROL,
322             r300_provoking_vertex_fixes(r300, mode));
323     OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
324     OUT_CS(maxIndex);
325     OUT_CS(minIndex);
326     OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
327     if (indexSize == 4) {
328         count_dwords = count;
329         OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
330                R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
331                r300_translate_primitive(mode) |
332                (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
333     } else {
334         count_dwords = (count + 1) / 2;
335         OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
336                r300_translate_primitive(mode) |
337                (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
338     }
339
340     /* INDX_BUFFER is a truly special packet3.
341      * Unlike most other packet3, where the offset is after the count,
342      * the order is reversed, so the relocation ends up carrying the
343      * size of the indexbuf instead of the offset.
344      */
345     OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
346     OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
347            (0 << R300_INDX_BUFFER_SKIP_SHIFT));
348     OUT_CS(offset_dwords << 2);
349     OUT_CS_BUF_RELOC(indexBuffer, count_dwords,
350                      RADEON_GEM_DOMAIN_GTT, 0, 0);
351
352     END_CS;
353 }
354
355 /*****************************************************************************
356  * The emission of draw packets for r300 which take care of the two-sided    *
357  * stencil ref fallback and call r500's functions.                           *
358  ****************************************************************************/
359
360 /* Set drawing for front faces. */
361 static void r300_begin_stencil_ref_fallback(struct r300_context *r300)
362 {
363     struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
364     CS_LOCALS(r300);
365
366     BEGIN_CS(2);
367     OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_BACK);
368     END_CS;
369 }
370
371 /* Set drawing for back faces. */
372 static void r300_switch_stencil_ref_side(struct r300_context *r300)
373 {
374     struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
375     struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state;
376     CS_LOCALS(r300);
377
378     BEGIN_CS(4);
379     OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_FRONT);
380     OUT_CS_REG(R300_ZB_STENCILREFMASK,
381                dsa->stencil_ref_bf | r300->stencil_ref.ref_value[1]);
382     END_CS;
383 }
384
385 /* Restore the original state. */
386 static void r300_end_stencil_ref_fallback(struct r300_context *r300)
387 {
388     struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state;
389     struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state;
390     CS_LOCALS(r300);
391
392     BEGIN_CS(4);
393     OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode);
394     OUT_CS_REG(R300_ZB_STENCILREFMASK,
395                dsa->stencil_ref_mask | r300->stencil_ref.ref_value[0]);
396     END_CS;
397 }
398
399 void r300_emit_draw_arrays_immediate(struct r300_context *r300,
400                                      unsigned mode,
401                                      unsigned start,
402                                      unsigned count)
403 {
404     if (!r300->stencil_ref_bf_fallback) {
405         r500_emit_draw_arrays_immediate(r300, mode, start, count);
406     } else {
407         r300_begin_stencil_ref_fallback(r300);
408         r500_emit_draw_arrays_immediate(r300, mode, start, count);
409         r300_switch_stencil_ref_side(r300);
410         r500_emit_draw_arrays_immediate(r300, mode, start, count);
411         r300_end_stencil_ref_fallback(r300);
412     }
413 }
414
415 void r300_emit_draw_arrays(struct r300_context *r300,
416                            unsigned mode,
417                            unsigned count)
418 {
419     if (!r300->stencil_ref_bf_fallback) {
420         r500_emit_draw_arrays(r300, mode, count);
421     } else {
422         r300_begin_stencil_ref_fallback(r300);
423         r500_emit_draw_arrays(r300, mode, count);
424         r300_switch_stencil_ref_side(r300);
425         r500_emit_draw_arrays(r300, mode, count);
426         r300_end_stencil_ref_fallback(r300);
427     }
428 }
429
430 void r300_emit_draw_elements(struct r300_context *r300,
431                              struct pipe_buffer* indexBuffer,
432                              unsigned indexSize,
433                              unsigned minIndex,
434                              unsigned maxIndex,
435                              unsigned mode,
436                              unsigned start,
437                              unsigned count)
438 {
439     if (!r300->stencil_ref_bf_fallback) {
440         r500_emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
441                                 maxIndex, mode, start, count);
442     } else {
443         r300_begin_stencil_ref_fallback(r300);
444         r500_emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
445                                 maxIndex, mode, start, count);
446         r300_switch_stencil_ref_side(r300);
447         r500_emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
448                                 maxIndex, mode, start, count);
449         r300_end_stencil_ref_fallback(r300);
450     }
451 }
452
453 static void r300_shorten_ubyte_elts(struct r300_context* r300,
454                                     struct pipe_buffer** elts,
455                                     unsigned start,
456                                     unsigned count)
457 {
458     struct pipe_screen* screen = r300->context.screen;
459     struct pipe_buffer* new_elts;
460     unsigned char *in_map;
461     unsigned short *out_map;
462     unsigned i;
463
464     new_elts = screen->buffer_create(screen, 32,
465                                      PIPE_BUFFER_USAGE_INDEX |
466                                      PIPE_BUFFER_USAGE_CPU_WRITE |
467                                      PIPE_BUFFER_USAGE_GPU_READ,
468                                      2 * count);
469
470     in_map = pipe_buffer_map(screen, *elts, PIPE_BUFFER_USAGE_CPU_READ);
471     out_map = pipe_buffer_map(screen, new_elts, PIPE_BUFFER_USAGE_CPU_WRITE);
472
473     in_map += start;
474
475     for (i = 0; i < count; i++) {
476         *out_map = (unsigned short)*in_map;
477         in_map++;
478         out_map++;
479     }
480
481     pipe_buffer_unmap(screen, *elts);
482     pipe_buffer_unmap(screen, new_elts);
483
484     *elts = new_elts;
485 }
486
487 static void r300_align_ushort_elts(struct r300_context *r300,
488                                    struct pipe_buffer **elts,
489                                    unsigned start, unsigned count)
490 {
491     struct pipe_screen* screen = r300->context.screen;
492     struct pipe_buffer* new_elts;
493     unsigned short *in_map;
494     unsigned short *out_map;
495
496     new_elts = screen->buffer_create(screen, 32,
497                                      PIPE_BUFFER_USAGE_INDEX |
498                                      PIPE_BUFFER_USAGE_CPU_WRITE |
499                                      PIPE_BUFFER_USAGE_GPU_READ,
500                                      2 * count);
501
502     in_map = pipe_buffer_map(screen, *elts, PIPE_BUFFER_USAGE_CPU_READ);
503     out_map = pipe_buffer_map(screen, new_elts, PIPE_BUFFER_USAGE_CPU_WRITE);
504
505     memcpy(out_map, in_map+start, 2 * count);
506
507     pipe_buffer_unmap(screen, *elts);
508     pipe_buffer_unmap(screen, new_elts);
509
510     *elts = new_elts;
511 }
512
513 /* This is the fast-path drawing & emission for HW TCL. */
514 void r300_draw_range_elements(struct pipe_context* pipe,
515                               struct pipe_buffer* indexBuffer,
516                               unsigned indexSize,
517                               unsigned minIndex,
518                               unsigned maxIndex,
519                               unsigned mode,
520                               unsigned start,
521                               unsigned count)
522 {
523     struct r300_context* r300 = r300_context(pipe);
524     struct pipe_buffer* orgIndexBuffer = indexBuffer;
525 #if defined(ENABLE_ALT_NUM_VERTS)
526     boolean alt_num_verts = r300->screen->caps.is_r500 &&
527                             count > 65536;
528 #else
529     boolean alt_num_verts = FALSE;
530 #endif
531     unsigned short_count;
532
533     if (r300->skip_rendering) {
534         return;
535     }
536
537     if (!u_trim_pipe_prim(mode, &count)) {
538         return;
539     }
540
541     if (indexSize == 1) {
542         r300_shorten_ubyte_elts(r300, &indexBuffer, start, count);
543         indexSize = 2;
544         start = 0;
545     } else if (indexSize == 2 && start % 2 != 0) {
546         r300_align_ushort_elts(r300, &indexBuffer, start, count);
547         start = 0;
548     }
549
550     r300_update_derived_state(r300);
551
552     r300_upload_index_buffer(r300, &indexBuffer, indexSize, start, count);
553
554     /* 128 dwords for emit_aos and emit_draw_elements */
555     r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128);
556     r300_emit_buffer_validate(r300, TRUE, indexBuffer);
557     r300_emit_dirty_state(r300);
558     r300_emit_aos(r300, 0);
559
560     u_upload_flush(r300->upload_vb);
561     u_upload_flush(r300->upload_ib);
562     if (alt_num_verts || count <= 65535) {
563         r300->emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
564                                  maxIndex, mode, start, count);
565     } else {
566         do {
567             short_count = MIN2(count, 65534);
568             r300->emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
569                                       maxIndex, mode, start, short_count);
570
571             start += short_count;
572             count -= short_count;
573
574             /* 16 spare dwords are enough for emit_draw_elements. */
575             if (count && r300_reserve_cs_space(r300, 16)) {
576                 r300_emit_buffer_validate(r300, TRUE, indexBuffer);
577                 r300_emit_dirty_state(r300);
578                 r300_emit_aos(r300, 0);
579             }
580         } while (count);
581     }
582
583     if (indexBuffer != orgIndexBuffer) {
584         pipe_buffer_reference( &indexBuffer, NULL );
585     }
586 }
587
588 /* Simple helpers for context setup. Should probably be moved to util. */
589 void r300_draw_elements(struct pipe_context* pipe,
590                         struct pipe_buffer* indexBuffer,
591                         unsigned indexSize, unsigned mode,
592                         unsigned start, unsigned count)
593 {
594     struct r300_context *r300 = r300_context(pipe);
595
596     pipe->draw_range_elements(pipe, indexBuffer, indexSize, 0,
597                               r300->vertex_buffer_max_index,
598                               mode, start, count);
599 }
600
601 void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
602                       unsigned start, unsigned count)
603 {
604     struct r300_context* r300 = r300_context(pipe);
605 #if defined(ENABLE_ALT_NUM_VERTS)
606     boolean alt_num_verts = r300->screen->caps.is_r500 &&
607                             count > 65536;
608 #else
609     boolean alt_num_verts = FALSE;
610 #endif
611     unsigned short_count;
612
613     if (r300->skip_rendering) {
614         return;
615     }
616
617     if (!u_trim_pipe_prim(mode, &count)) {
618         return;
619     }
620
621     r300_update_derived_state(r300);
622
623     if (immd_is_good_idea(r300, count)) {
624         r300->emit_draw_arrays_immediate(r300, mode, start, count);
625     } else {
626         /* Make sure there are at least 128 spare dwords in the command buffer.
627          * (most of it being consumed by emit_aos) */
628         r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128);
629         r300_emit_buffer_validate(r300, TRUE, NULL);
630         r300_emit_dirty_state(r300);
631
632         if (alt_num_verts || count <= 65535) {
633             r300_emit_aos(r300, start);
634             r300->emit_draw_arrays(r300, mode, count);
635         } else {
636             do {
637                 short_count = MIN2(count, 65535);
638                 r300_emit_aos(r300, start);
639                 r300->emit_draw_arrays(r300, mode, short_count);
640
641                 start += short_count;
642                 count -= short_count;
643
644                 /* Again, we emit both AOS and draw_arrays so there should be
645                  * at least 128 spare dwords. */
646                 if (count && r300_reserve_cs_space(r300, 128)) {
647                     r300_emit_buffer_validate(r300, TRUE, NULL);
648                     r300_emit_dirty_state(r300);
649                 }
650             } while (count);
651         }
652         u_upload_flush(r300->upload_vb);
653     }
654 }
655
656 /****************************************************************************
657  * The rest of this file is for SW TCL rendering only. Please be polite and *
658  * keep these functions separated so that they are easier to locate. ~C.    *
659  ***************************************************************************/
660
661 /* SW TCL arrays, using Draw. */
662 void r300_swtcl_draw_arrays(struct pipe_context* pipe,
663                                unsigned mode,
664                                unsigned start,
665                                unsigned count)
666 {
667     struct r300_context* r300 = r300_context(pipe);
668     int i;
669
670     if (r300->skip_rendering) {
671         return;
672     }
673
674     if (!u_trim_pipe_prim(mode, &count)) {
675         return;
676     }
677
678     for (i = 0; i < r300->vertex_buffer_count; i++) {
679         void* buf = pipe_buffer_map(pipe->screen,
680                                     r300->vertex_buffer[i].buffer,
681                                     PIPE_BUFFER_USAGE_CPU_READ);
682         draw_set_mapped_vertex_buffer(r300->draw, i, buf);
683     }
684
685     draw_set_mapped_element_buffer(r300->draw, 0, NULL);
686
687     draw_arrays(r300->draw, mode, start, count);
688
689     for (i = 0; i < r300->vertex_buffer_count; i++) {
690         pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
691         draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
692     }
693 }
694
695 /* SW TCL elements, using Draw. */
696 void r300_swtcl_draw_range_elements(struct pipe_context* pipe,
697                                        struct pipe_buffer* indexBuffer,
698                                        unsigned indexSize,
699                                        unsigned minIndex,
700                                        unsigned maxIndex,
701                                        unsigned mode,
702                                        unsigned start,
703                                        unsigned count)
704 {
705     struct r300_context* r300 = r300_context(pipe);
706     int i;
707     void* indices;
708
709     if (r300->skip_rendering) {
710         return;
711     }
712
713     if (!u_trim_pipe_prim(mode, &count)) {
714         return;
715     }
716
717     for (i = 0; i < r300->vertex_buffer_count; i++) {
718         void* buf = pipe_buffer_map(pipe->screen,
719                                     r300->vertex_buffer[i].buffer,
720                                     PIPE_BUFFER_USAGE_CPU_READ);
721         draw_set_mapped_vertex_buffer(r300->draw, i, buf);
722     }
723
724     indices = pipe_buffer_map(pipe->screen, indexBuffer,
725                               PIPE_BUFFER_USAGE_CPU_READ);
726     draw_set_mapped_element_buffer_range(r300->draw, indexSize,
727                                          minIndex, maxIndex, indices);
728
729     draw_arrays(r300->draw, mode, start, count);
730
731     for (i = 0; i < r300->vertex_buffer_count; i++) {
732         pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
733         draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
734     }
735
736     pipe_buffer_unmap(pipe->screen, indexBuffer);
737     draw_set_mapped_element_buffer_range(r300->draw, 0, start,
738                                          start + count - 1, NULL);
739 }
740
741 /* Object for rendering using Draw. */
742 struct r300_render {
743     /* Parent class */
744     struct vbuf_render base;
745
746     /* Pipe context */
747     struct r300_context* r300;
748
749     /* Vertex information */
750     size_t vertex_size;
751     unsigned prim;
752     unsigned hwprim;
753
754     /* VBO */
755     struct pipe_buffer* vbo;
756     size_t vbo_size;
757     size_t vbo_offset;
758     size_t vbo_max_used;
759     void * vbo_ptr;
760 };
761
762 static INLINE struct r300_render*
763 r300_render(struct vbuf_render* render)
764 {
765     return (struct r300_render*)render;
766 }
767
768 static const struct vertex_info*
769 r300_render_get_vertex_info(struct vbuf_render* render)
770 {
771     struct r300_render* r300render = r300_render(render);
772     struct r300_context* r300 = r300render->r300;
773
774     r300_update_derived_state(r300);
775
776     return &r300->vertex_info;
777 }
778
779 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
780                                                    ushort vertex_size,
781                                                    ushort count)
782 {
783     struct r300_render* r300render = r300_render(render);
784     struct r300_context* r300 = r300render->r300;
785     struct pipe_screen* screen = r300->context.screen;
786     size_t size = (size_t)vertex_size * (size_t)count;
787
788     if (size + r300render->vbo_offset > r300render->vbo_size)
789     {
790         pipe_buffer_reference(&r300->vbo, NULL);
791         r300render->vbo = pipe_buffer_create(screen,
792                                              64,
793                                              PIPE_BUFFER_USAGE_VERTEX,
794                                              R300_MAX_DRAW_VBO_SIZE);
795         r300render->vbo_offset = 0;
796         r300render->vbo_size = R300_MAX_DRAW_VBO_SIZE;
797     }
798
799     r300render->vertex_size = vertex_size;
800     r300->vbo = r300render->vbo;
801     r300->vbo_offset = r300render->vbo_offset;
802
803     return (r300render->vbo) ? TRUE : FALSE;
804 }
805
806 static void* r300_render_map_vertices(struct vbuf_render* render)
807 {
808     struct r300_render* r300render = r300_render(render);
809     struct pipe_screen* screen = r300render->r300->context.screen;
810
811     r300render->vbo_ptr = pipe_buffer_map(screen, r300render->vbo,
812                                           PIPE_BUFFER_USAGE_CPU_WRITE);
813
814     return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset);
815 }
816
817 static void r300_render_unmap_vertices(struct vbuf_render* render,
818                                              ushort min,
819                                              ushort max)
820 {
821     struct r300_render* r300render = r300_render(render);
822     struct pipe_screen* screen = r300render->r300->context.screen;
823     CS_LOCALS(r300render->r300);
824     BEGIN_CS(2);
825     OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max);
826     END_CS;
827
828     r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
829                                     r300render->vertex_size * (max + 1));
830     pipe_buffer_unmap(screen, r300render->vbo);
831 }
832
833 static void r300_render_release_vertices(struct vbuf_render* render)
834 {
835     struct r300_render* r300render = r300_render(render);
836
837     r300render->vbo_offset += r300render->vbo_max_used;
838     r300render->vbo_max_used = 0;
839 }
840
841 static boolean r300_render_set_primitive(struct vbuf_render* render,
842                                                unsigned prim)
843 {
844     struct r300_render* r300render = r300_render(render);
845
846     r300render->prim = prim;
847     r300render->hwprim = r300_translate_primitive(prim);
848
849     return TRUE;
850 }
851
852 static void r500_render_draw_arrays(struct vbuf_render* render,
853                                     unsigned start,
854                                     unsigned count)
855 {
856     struct r300_render* r300render = r300_render(render);
857     struct r300_context* r300 = r300render->r300;
858
859     CS_LOCALS(r300);
860
861     r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 2);
862     r300_emit_buffer_validate(r300, FALSE, NULL);
863     r300_emit_dirty_state(r300);
864
865     DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count);
866
867     BEGIN_CS(2);
868     OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
869     OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
870            r300render->hwprim);
871     END_CS;
872 }
873
874 static void r500_render_draw(struct vbuf_render* render,
875                              const ushort* indices,
876                              uint count)
877 {
878     struct r300_render* r300render = r300_render(render);
879     struct r300_context* r300 = r300render->r300;
880     int i;
881     unsigned dwords = 2 + (count+1)/2;
882
883     CS_LOCALS(r300);
884
885     r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords);
886     r300_emit_buffer_validate(r300, FALSE, NULL);
887     r300_emit_dirty_state(r300);
888
889     BEGIN_CS(dwords);
890     OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2);
891     OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
892            r300render->hwprim);
893     for (i = 0; i < count-1; i += 2) {
894         OUT_CS(indices[i+1] << 16 | indices[i]);
895     }
896     if (count % 2) {
897         OUT_CS(indices[count-1]);
898     }
899     END_CS;
900 }
901
902 static void r300_render_draw_arrays(struct vbuf_render* render,
903                                     unsigned start,
904                                     unsigned count)
905 {
906     struct r300_context* r300 = r300_render(render)->r300;
907
908     if (!r300->stencil_ref_bf_fallback) {
909         r500_render_draw_arrays(render, start, count);
910     } else {
911         r300_begin_stencil_ref_fallback(r300);
912         r500_render_draw_arrays(render, start, count);
913         r300_switch_stencil_ref_side(r300);
914         r500_render_draw_arrays(render, start, count);
915         r300_end_stencil_ref_fallback(r300);
916     }
917 }
918
919 static void r300_render_draw(struct vbuf_render* render,
920                              const ushort* indices,
921                              uint count)
922 {
923     struct r300_context* r300 = r300_render(render)->r300;
924
925     if (!r300->stencil_ref_bf_fallback) {
926         r500_render_draw(render, indices, count);
927     } else {
928         r300_begin_stencil_ref_fallback(r300);
929         r500_render_draw(render, indices, count);
930         r300_switch_stencil_ref_side(r300);
931         r500_render_draw(render, indices, count);
932         r300_end_stencil_ref_fallback(r300);
933     }
934 }
935
936 static void r300_render_destroy(struct vbuf_render* render)
937 {
938     FREE(render);
939 }
940
941 static struct vbuf_render* r300_render_create(struct r300_context* r300)
942 {
943     struct r300_render* r300render = CALLOC_STRUCT(r300_render);
944
945     r300render->r300 = r300;
946
947     /* XXX find real numbers plz */
948     r300render->base.max_vertex_buffer_bytes = 128 * 1024;
949     r300render->base.max_indices = 16 * 1024;
950
951     r300render->base.get_vertex_info = r300_render_get_vertex_info;
952     r300render->base.allocate_vertices = r300_render_allocate_vertices;
953     r300render->base.map_vertices = r300_render_map_vertices;
954     r300render->base.unmap_vertices = r300_render_unmap_vertices;
955     r300render->base.set_primitive = r300_render_set_primitive;
956     if (r300->screen->caps.is_r500) {
957         r300render->base.draw = r500_render_draw;
958         r300render->base.draw_arrays = r500_render_draw_arrays;
959     } else {
960         r300render->base.draw = r300_render_draw;
961         r300render->base.draw_arrays = r300_render_draw_arrays;
962     }
963     r300render->base.release_vertices = r300_render_release_vertices;
964     r300render->base.destroy = r300_render_destroy;
965
966     r300render->vbo = NULL;
967     r300render->vbo_size = 0;
968     r300render->vbo_offset = 0;
969
970     return &r300render->base;
971 }
972
973 struct draw_stage* r300_draw_stage(struct r300_context* r300)
974 {
975     struct vbuf_render* render;
976     struct draw_stage* stage;
977
978     render = r300_render_create(r300);
979
980     if (!render) {
981         return NULL;
982     }
983
984     stage = draw_vbuf_stage(r300->draw, render);
985
986     if (!stage) {
987         render->destroy(render);
988         return NULL;
989     }
990
991     draw_set_render(r300->draw, render);
992
993     return stage;
994 }