1 #include "pipe/p_context.h"
2 #include "pipe/p_state.h"
3 #include "util/u_inlines.h"
4 #include "util/u_format.h"
6 #include "nvfx_context.h"
7 #include "nvfx_state.h"
9 #include "nouveau/nouveau_channel.h"
10 #include "nouveau/nouveau_pushbuf.h"
11 #include "nouveau/nouveau_util.h"
14 nvfx_force_swtnl(struct nvfx_context *nvfx)
16 static int force_swtnl = -1;
18 force_swtnl = debug_get_bool_option("NOUVEAU_SWTNL", 0);
23 nvfx_vbo_format_to_hw(enum pipe_format pipe, unsigned *fmt, unsigned *ncomp)
26 case PIPE_FORMAT_R32_FLOAT:
27 case PIPE_FORMAT_R32G32_FLOAT:
28 case PIPE_FORMAT_R32G32B32_FLOAT:
29 case PIPE_FORMAT_R32G32B32A32_FLOAT:
30 *fmt = NV34TCL_VTXFMT_TYPE_FLOAT;
32 case PIPE_FORMAT_R8_UNORM:
33 case PIPE_FORMAT_R8G8_UNORM:
34 case PIPE_FORMAT_R8G8B8_UNORM:
35 case PIPE_FORMAT_R8G8B8A8_UNORM:
36 *fmt = NV34TCL_VTXFMT_TYPE_UBYTE;
38 case PIPE_FORMAT_R16_SSCALED:
39 case PIPE_FORMAT_R16G16_SSCALED:
40 case PIPE_FORMAT_R16G16B16_SSCALED:
41 case PIPE_FORMAT_R16G16B16A16_SSCALED:
42 *fmt = NV34TCL_VTXFMT_TYPE_USHORT;
45 NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe));
50 case PIPE_FORMAT_R8_UNORM:
51 case PIPE_FORMAT_R32_FLOAT:
52 case PIPE_FORMAT_R16_SSCALED:
55 case PIPE_FORMAT_R8G8_UNORM:
56 case PIPE_FORMAT_R32G32_FLOAT:
57 case PIPE_FORMAT_R16G16_SSCALED:
60 case PIPE_FORMAT_R8G8B8_UNORM:
61 case PIPE_FORMAT_R32G32B32_FLOAT:
62 case PIPE_FORMAT_R16G16B16_SSCALED:
65 case PIPE_FORMAT_R8G8B8A8_UNORM:
66 case PIPE_FORMAT_R32G32B32A32_FLOAT:
67 case PIPE_FORMAT_R16G16B16A16_SSCALED:
71 NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe));
79 nvfx_vbo_set_idxbuf(struct nvfx_context *nvfx, struct pipe_buffer *ib,
82 struct pipe_screen *pscreen = &nvfx->screen->base.base;
87 nvfx->idxbuf_format = 0xdeadbeef;
91 if (!pscreen->get_param(pscreen, NOUVEAU_CAP_HW_IDXBUF) || ib_size == 1)
96 type = NV34TCL_IDXBUF_FORMAT_TYPE_U16;
99 type = NV34TCL_IDXBUF_FORMAT_TYPE_U32;
105 if (ib != nvfx->idxbuf ||
106 type != nvfx->idxbuf_format) {
107 nvfx->dirty |= NVFX_NEW_ARRAYS;
109 nvfx->idxbuf_format = type;
116 nvfx_vbo_static_attrib(struct nvfx_context *nvfx, struct nouveau_stateobj *so,
117 int attrib, struct pipe_vertex_element *ve,
118 struct pipe_vertex_buffer *vb)
120 struct pipe_screen *pscreen = nvfx->pipe.screen;
121 struct nouveau_grobj *eng3d = nvfx->screen->eng3d;
122 unsigned type, ncomp;
125 if (nvfx_vbo_format_to_hw(ve->src_format, &type, &ncomp))
128 map = pipe_buffer_map(pscreen, vb->buffer, PIPE_BUFFER_USAGE_CPU_READ);
129 map += vb->buffer_offset + ve->src_offset;
132 case NV34TCL_VTXFMT_TYPE_FLOAT:
138 so_method(so, eng3d, NV34TCL_VTX_ATTR_4F_X(attrib), 4);
139 so_data (so, fui(v[0]));
140 so_data (so, fui(v[1]));
141 so_data (so, fui(v[2]));
142 so_data (so, fui(v[3]));
145 so_method(so, eng3d, NV34TCL_VTX_ATTR_3F_X(attrib), 3);
146 so_data (so, fui(v[0]));
147 so_data (so, fui(v[1]));
148 so_data (so, fui(v[2]));
151 so_method(so, eng3d, NV34TCL_VTX_ATTR_2F_X(attrib), 2);
152 so_data (so, fui(v[0]));
153 so_data (so, fui(v[1]));
156 so_method(so, eng3d, NV34TCL_VTX_ATTR_1F(attrib), 1);
157 so_data (so, fui(v[0]));
160 pipe_buffer_unmap(pscreen, vb->buffer);
166 pipe_buffer_unmap(pscreen, vb->buffer);
170 pipe_buffer_unmap(pscreen, vb->buffer);
175 nvfx_draw_arrays(struct pipe_context *pipe,
176 unsigned mode, unsigned start, unsigned count)
178 struct nvfx_context *nvfx = nvfx_context(pipe);
179 struct nvfx_screen *screen = nvfx->screen;
180 struct nouveau_channel *chan = screen->base.channel;
181 struct nouveau_grobj *eng3d = screen->eng3d;
182 unsigned restart = 0;
184 nvfx_vbo_set_idxbuf(nvfx, NULL, 0);
185 if (nvfx_force_swtnl(nvfx) || !nvfx_state_validate(nvfx)) {
186 nvfx_draw_elements_swtnl(pipe, NULL, 0,
194 nvfx_state_emit(nvfx);
196 vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256,
197 mode, start, count, &restart);
203 BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1);
204 OUT_RING (chan, nvgl_primitive(mode));
208 BEGIN_RING(chan, eng3d, NV34TCL_VB_VERTEX_BATCH, 1);
209 OUT_RING (chan, ((nr - 1) << 24) | start);
215 unsigned push = nr > 2047 ? 2047 : nr;
219 BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_VERTEX_BATCH, push);
221 OUT_RING(chan, ((0x100 - 1) << 24) | start);
226 BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1);
233 pipe->flush(pipe, 0, NULL);
237 nvfx_draw_elements_u08(struct nvfx_context *nvfx, void *ib,
238 unsigned mode, unsigned start, unsigned count)
240 struct nvfx_screen *screen = nvfx->screen;
241 struct nouveau_channel *chan = screen->base.channel;
242 struct nouveau_grobj *eng3d = screen->eng3d;
245 uint8_t *elts = (uint8_t *)ib + start;
246 unsigned vc, push, restart = 0;
248 nvfx_state_emit(nvfx);
250 vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2,
251 mode, start, count, &restart);
258 BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1);
259 OUT_RING (chan, nvgl_primitive(mode));
262 BEGIN_RING(chan, eng3d, NV34TCL_VB_ELEMENT_U32, 1);
263 OUT_RING (chan, elts[0]);
270 push = MIN2(vc, 2047 * 2);
272 BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U16, push >> 1);
273 for (i = 0; i < push; i+=2)
274 OUT_RING(chan, (elts[i+1] << 16) | elts[i]);
280 BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1);
288 nvfx_draw_elements_u16(struct nvfx_context *nvfx, void *ib,
289 unsigned mode, unsigned start, unsigned count)
291 struct nvfx_screen *screen = nvfx->screen;
292 struct nouveau_channel *chan = screen->base.channel;
293 struct nouveau_grobj *eng3d = screen->eng3d;
296 uint16_t *elts = (uint16_t *)ib + start;
297 unsigned vc, push, restart = 0;
299 nvfx_state_emit(nvfx);
301 vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2,
302 mode, start, count, &restart);
309 BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1);
310 OUT_RING (chan, nvgl_primitive(mode));
313 BEGIN_RING(chan, eng3d, NV34TCL_VB_ELEMENT_U32, 1);
314 OUT_RING (chan, elts[0]);
321 push = MIN2(vc, 2047 * 2);
323 BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U16, push >> 1);
324 for (i = 0; i < push; i+=2)
325 OUT_RING(chan, (elts[i+1] << 16) | elts[i]);
331 BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1);
339 nvfx_draw_elements_u32(struct nvfx_context *nvfx, void *ib,
340 unsigned mode, unsigned start, unsigned count)
342 struct nvfx_screen *screen = nvfx->screen;
343 struct nouveau_channel *chan = screen->base.channel;
344 struct nouveau_grobj *eng3d = screen->eng3d;
347 uint32_t *elts = (uint32_t *)ib + start;
348 unsigned vc, push, restart = 0;
350 nvfx_state_emit(nvfx);
352 vc = nouveau_vbuf_split(AVAIL_RING(chan), 5, 1,
353 mode, start, count, &restart);
360 BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1);
361 OUT_RING (chan, nvgl_primitive(mode));
364 push = MIN2(vc, 2047);
366 BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_ELEMENT_U32, push);
367 OUT_RINGp (chan, elts, push);
373 BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1);
381 nvfx_draw_elements_inline(struct pipe_context *pipe,
382 struct pipe_buffer *ib, unsigned ib_size,
383 unsigned mode, unsigned start, unsigned count)
385 struct nvfx_context *nvfx = nvfx_context(pipe);
386 struct pipe_screen *pscreen = pipe->screen;
389 map = pipe_buffer_map(pscreen, ib, PIPE_BUFFER_USAGE_CPU_READ);
391 NOUVEAU_ERR("failed mapping ib\n");
397 nvfx_draw_elements_u08(nvfx, map, mode, start, count);
400 nvfx_draw_elements_u16(nvfx, map, mode, start, count);
403 nvfx_draw_elements_u32(nvfx, map, mode, start, count);
406 NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size);
410 pipe_buffer_unmap(pscreen, ib);
414 nvfx_draw_elements_vbo(struct pipe_context *pipe,
415 unsigned mode, unsigned start, unsigned count)
417 struct nvfx_context *nvfx = nvfx_context(pipe);
418 struct nvfx_screen *screen = nvfx->screen;
419 struct nouveau_channel *chan = screen->base.channel;
420 struct nouveau_grobj *eng3d = screen->eng3d;
421 unsigned restart = 0;
426 nvfx_state_emit(nvfx);
428 vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256,
429 mode, start, count, &restart);
435 BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1);
436 OUT_RING (chan, nvgl_primitive(mode));
440 BEGIN_RING(chan, eng3d, NV34TCL_VB_INDEX_BATCH, 1);
441 OUT_RING (chan, ((nr - 1) << 24) | start);
447 unsigned push = nr > 2047 ? 2047 : nr;
451 BEGIN_RING_NI(chan, eng3d, NV34TCL_VB_INDEX_BATCH, push);
453 OUT_RING(chan, ((0x100 - 1) << 24) | start);
458 BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1);
467 nvfx_draw_elements(struct pipe_context *pipe,
468 struct pipe_buffer *indexBuffer, unsigned indexSize,
469 unsigned mode, unsigned start, unsigned count)
471 struct nvfx_context *nvfx = nvfx_context(pipe);
474 idxbuf = nvfx_vbo_set_idxbuf(nvfx, indexBuffer, indexSize);
475 if (nvfx_force_swtnl(nvfx) || !nvfx_state_validate(nvfx)) {
476 nvfx_draw_elements_swtnl(pipe, indexBuffer, indexSize,
482 nvfx_draw_elements_vbo(pipe, mode, start, count);
484 nvfx_draw_elements_inline(pipe, indexBuffer, indexSize,
488 pipe->flush(pipe, 0, NULL);
492 nvfx_vbo_validate(struct nvfx_context *nvfx)
494 struct nouveau_stateobj *vtxbuf, *vtxfmt, *sattr = NULL;
495 struct nouveau_grobj *eng3d = nvfx->screen->eng3d;
496 struct pipe_buffer *ib = nvfx->idxbuf;
497 unsigned ib_format = nvfx->idxbuf_format;
498 unsigned vb_flags = nvfx->screen->vertex_buffer_flags | NOUVEAU_BO_RD;
501 vtxbuf = so_new(3, 17, 18);
502 so_method(vtxbuf, eng3d, NV34TCL_VTXBUF_ADDRESS(0), nvfx->vtxelt->num_elements);
503 vtxfmt = so_new(1, 16, 0);
504 so_method(vtxfmt, eng3d, NV34TCL_VTXFMT(0), nvfx->vtxelt->num_elements);
506 for (hw = 0; hw < nvfx->vtxelt->num_elements; hw++) {
507 struct pipe_vertex_element *ve;
508 struct pipe_vertex_buffer *vb;
509 unsigned type, ncomp;
511 ve = &nvfx->vtxelt->pipe[hw];
512 vb = &nvfx->vtxbuf[ve->vertex_buffer_index];
516 sattr = so_new(16, 16 * 4, 0);
518 if (nvfx_vbo_static_attrib(nvfx, sattr, hw, ve, vb)) {
520 so_data(vtxfmt, NV34TCL_VTXFMT_TYPE_FLOAT);
525 if (nvfx_vbo_format_to_hw(ve->src_format, &type, &ncomp)) {
526 nvfx->fallback_swtnl |= NVFX_NEW_ARRAYS;
527 so_ref(NULL, &vtxbuf);
528 so_ref(NULL, &vtxfmt);
532 so_reloc(vtxbuf, nouveau_bo(vb->buffer),
533 vb->buffer_offset + ve->src_offset,
534 vb_flags | NOUVEAU_BO_LOW | NOUVEAU_BO_OR,
535 0, NV34TCL_VTXBUF_ADDRESS_DMA1);
536 so_data (vtxfmt, ((vb->stride << NV34TCL_VTXFMT_STRIDE_SHIFT) |
537 (ncomp << NV34TCL_VTXFMT_SIZE_SHIFT) | type));
541 struct nouveau_bo *bo = nouveau_bo(ib);
543 so_method(vtxbuf, eng3d, NV34TCL_IDXBUF_ADDRESS, 2);
544 so_reloc (vtxbuf, bo, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0);
545 so_reloc (vtxbuf, bo, ib_format, vb_flags | NOUVEAU_BO_OR,
546 0, NV34TCL_IDXBUF_FORMAT_DMA1);
549 so_method(vtxbuf, eng3d, 0x1710, 1);
552 so_ref(vtxbuf, &nvfx->state.hw[NVFX_STATE_VTXBUF]);
553 so_ref(NULL, &vtxbuf);
554 nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXBUF);
555 so_ref(vtxfmt, &nvfx->state.hw[NVFX_STATE_VTXFMT]);
556 so_ref(NULL, &vtxfmt);
557 nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXFMT);
558 so_ref(sattr, &nvfx->state.hw[NVFX_STATE_VTXATTR]);
559 so_ref(NULL, &sattr);
560 nvfx->state.dirty |= (1ULL << NVFX_STATE_VTXATTR);
564 struct nvfx_state_entry nvfx_state_vbo = {
565 .validate = nvfx_vbo_validate,
567 .pipe = NVFX_NEW_ARRAYS,