src/gallium/drivers/nvfx/nvfx_draw.c

   1 #include "pipe/p_shader_tokens.h"
   2 #include "util/u_inlines.h"
   3 #include "tgsi/tgsi_ureg.h"
   4
   5 #include "util/u_pack_color.h"
   6
   7 #include "draw/draw_context.h"
   8 #include "draw/draw_vertex.h"
   9 #include "draw/draw_pipe.h"
  10
  11 #include "nvfx_context.h"
  12 #include "nv30_vertprog.h"
  13 #include "nv40_vertprog.h"
  14
  15 /* Simple, but crappy, swtnl path, hopefully we wont need to hit this very
  16  * often at all.  Uses "quadro style" vertex submission + a fixed vertex
  17  * layout to avoid the need to generate a vertex program or vtxfmt.
  18  */
  19
  20 struct nvfx_render_stage {
  21         struct draw_stage stage;
  22         struct nvfx_context *nvfx;
  23         unsigned prim;
  24 };
  25
  26 static INLINE struct nvfx_render_stage *
  27 nvfx_render_stage(struct draw_stage *stage)
  28 {
  29         return (struct nvfx_render_stage *)stage;
  30 }
  31
  32 static INLINE void
  33 nvfx_render_vertex(struct nvfx_context *nvfx, const struct vertex_header *v)
  34 {
  35         struct nvfx_screen *screen = nvfx->screen;
  36         struct nouveau_channel *chan = screen->base.channel;
  37         struct nouveau_grobj *eng3d = screen->eng3d;
  38         unsigned i;
  39
  40         for (i = 0; i < nvfx->swtnl.nr_attribs; i++) {
  41                 unsigned idx = nvfx->swtnl.draw[i];
  42                 unsigned hw = nvfx->swtnl.hw[i];
  43
  44                 switch (nvfx->swtnl.emit[i]) {
  45                 case EMIT_OMIT:
  46                         break;
  47                 case EMIT_1F:
  48                         BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_1F(hw), 1);
  49                         OUT_RING  (chan, fui(v->data[idx][0]));
  50                         break;
  51                 case EMIT_2F:
  52                         BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_2F_X(hw), 2);
  53                         OUT_RING  (chan, fui(v->data[idx][0]));
  54                         OUT_RING  (chan, fui(v->data[idx][1]));
  55                         break;
  56                 case EMIT_3F:
  57                         BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_3F_X(hw), 3);
  58                         OUT_RING  (chan, fui(v->data[idx][0]));
  59                         OUT_RING  (chan, fui(v->data[idx][1]));
  60                         OUT_RING  (chan, fui(v->data[idx][2]));
  61                         break;
  62                 case EMIT_4F:
  63                         BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4F_X(hw), 4);
  64                         OUT_RING  (chan, fui(v->data[idx][0]));
  65                         OUT_RING  (chan, fui(v->data[idx][1]));
  66                         OUT_RING  (chan, fui(v->data[idx][2]));
  67                         OUT_RING  (chan, fui(v->data[idx][3]));
  68                         break;
  69                 case 0xff:
  70                         BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4F_X(hw), 4);
  71                         OUT_RING  (chan, fui(v->data[idx][0] / v->data[idx][3]));
  72                         OUT_RING  (chan, fui(v->data[idx][1] / v->data[idx][3]));
  73                         OUT_RING  (chan, fui(v->data[idx][2] / v->data[idx][3]));
  74                         OUT_RING  (chan, fui(1.0f / v->data[idx][3]));
  75                         break;
  76                 case EMIT_4UB:
  77                         BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4UB(hw), 1);
  78                         OUT_RING  (chan, pack_ub4(float_to_ubyte(v->data[idx][0]),
  79                                             float_to_ubyte(v->data[idx][1]),
  80                                             float_to_ubyte(v->data[idx][2]),
  81                                             float_to_ubyte(v->data[idx][3])));
  82                 case EMIT_4UB_BGRA:
  83                         BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4UB(hw), 1);
  84                         OUT_RING  (chan, pack_ub4(float_to_ubyte(v->data[idx][2]),
  85                                             float_to_ubyte(v->data[idx][1]),
  86                                             float_to_ubyte(v->data[idx][0]),
  87                                             float_to_ubyte(v->data[idx][3])));
  88                         break;
  89                 default:
  90                         assert(0);
  91                         break;
  92                 }
  93         }
  94 }
  95
  96 static INLINE void
  97 nvfx_render_prim(struct draw_stage *stage, struct prim_header *prim,
  98                unsigned mode, unsigned count)
  99 {
 100         struct nvfx_render_stage *rs = nvfx_render_stage(stage);
 101         struct nvfx_context *nvfx = rs->nvfx;
 102
 103         struct nvfx_screen *screen = nvfx->screen;
 104         struct nouveau_channel *chan = screen->base.channel;
 105         struct nouveau_grobj *eng3d = screen->eng3d;
 106         unsigned i;
 107
 108         /* Ensure there's room for 4xfloat32 + potentially 3 begin/end */
 109         if (AVAIL_RING(chan) < ((count * 20) + 6)) {
 110                 if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) {
 111                         NOUVEAU_ERR("AIII, missed flush\n");
 112                         assert(0);
 113                 }
 114                 FIRE_RING(chan);
 115                 nvfx_state_emit(nvfx);
 116         }
 117
 118         /* Switch primitive modes if necessary */
 119         if (rs->prim != mode) {
 120                 if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) {
 121                         BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1);
 122                         OUT_RING  (chan, NV34TCL_VERTEX_BEGIN_END_STOP);
 123                 }
 124
 125                 BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1);
 126                 OUT_RING  (chan, mode);
 127                 rs->prim = mode;
 128         }
 129
 130         /* Emit vertex data */
 131         for (i = 0; i < count; i++)
 132                 nvfx_render_vertex(nvfx, prim->v[i]);
 133
 134         /* If it's likely we'll need to empty the push buffer soon, finish
 135          * off the primitive now.
 136          */
 137         if (AVAIL_RING(chan) < ((count * 20) + 6)) {
 138                 BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1);
 139                 OUT_RING  (chan, NV34TCL_VERTEX_BEGIN_END_STOP);
 140                 rs->prim = NV34TCL_VERTEX_BEGIN_END_STOP;
 141         }
 142 }
 143
 144 static void
 145 nvfx_render_point(struct draw_stage *draw, struct prim_header *prim)
 146 {
 147         nvfx_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_POINTS, 1);
 148 }
 149
 150 static void
 151 nvfx_render_line(struct draw_stage *draw, struct prim_header *prim)
 152 {
 153         nvfx_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_LINES, 2);
 154 }
 155
 156 static void
 157 nvfx_render_tri(struct draw_stage *draw, struct prim_header *prim)
 158 {
 159         nvfx_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_TRIANGLES, 3);
 160 }
 161
 162 static void
 163 nvfx_render_flush(struct draw_stage *draw, unsigned flags)
 164 {
 165         struct nvfx_render_stage *rs = nvfx_render_stage(draw);
 166         struct nvfx_context *nvfx = rs->nvfx;
 167         struct nvfx_screen *screen = nvfx->screen;
 168         struct nouveau_channel *chan = screen->base.channel;
 169         struct nouveau_grobj *eng3d = screen->eng3d;
 170
 171         if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) {
 172                 BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1);
 173                 OUT_RING  (chan, NV34TCL_VERTEX_BEGIN_END_STOP);
 174                 rs->prim = NV34TCL_VERTEX_BEGIN_END_STOP;
 175         }
 176 }
 177
 178 static void
 179 nvfx_render_reset_stipple_counter(struct draw_stage *draw)
 180 {
 181 }
 182
 183 static void
 184 nvfx_render_destroy(struct draw_stage *draw)
 185 {
 186         FREE(draw);
 187 }
 188
 189 static struct nvfx_vertex_program *
 190 nvfx_create_drawvp(struct nvfx_context *nvfx)
 191 {
 192         struct ureg_program *ureg;
 193         uint i;
 194
 195         ureg = ureg_create( TGSI_PROCESSOR_VERTEX );
 196         if (ureg == NULL)
 197                 return NULL;
 198
 199         ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0), ureg_DECL_vs_input(ureg, 0));
 200         ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, 0), ureg_DECL_vs_input(ureg, 3));
 201         ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, 1), ureg_DECL_vs_input(ureg, 4));
 202         ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_BCOLOR, 0), ureg_DECL_vs_input(ureg, 3));
 203         ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_BCOLOR, 1), ureg_DECL_vs_input(ureg, 4));
 204         ureg_MOV(ureg,
 205                    ureg_writemask(ureg_DECL_output(ureg, TGSI_SEMANTIC_FOG, 1), TGSI_WRITEMASK_X),
 206                    ureg_DECL_vs_input(ureg, 5));
 207         for (i = 0; i < 8; ++i)
 208                 ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_GENERIC, i), ureg_DECL_vs_input(ureg, 8 + i));
 209
 210         ureg_END( ureg );
 211
 212         return ureg_create_shader_and_destroy( ureg, &nvfx->pipe );
 213 }
 214
 215 struct draw_stage *
 216 nvfx_draw_render_stage(struct nvfx_context *nvfx)
 217 {
 218         struct nvfx_render_stage *render = CALLOC_STRUCT(nvfx_render_stage);
 219
 220         if (!nvfx->swtnl.vertprog)
 221                 nvfx->swtnl.vertprog = nvfx_create_drawvp(nvfx);
 222
 223         render->nvfx = nvfx;
 224         render->stage.draw = nvfx->draw;
 225         render->stage.point = nvfx_render_point;
 226         render->stage.line = nvfx_render_line;
 227         render->stage.tri = nvfx_render_tri;
 228         render->stage.flush = nvfx_render_flush;
 229         render->stage.reset_stipple_counter = nvfx_render_reset_stipple_counter;
 230         render->stage.destroy = nvfx_render_destroy;
 231
 232         return &render->stage;
 233 }
 234
 235 void
 236 nvfx_draw_elements_swtnl(struct pipe_context *pipe,
 237                          struct pipe_buffer *idxbuf, unsigned idxbuf_size,
 238                          unsigned mode, unsigned start, unsigned count)
 239 {
 240         struct nvfx_context *nvfx = nvfx_context(pipe);
 241         struct pipe_screen *pscreen = pipe->screen;
 242         unsigned i;
 243         void *map;
 244
 245         if (!nvfx_state_validate_swtnl(nvfx))
 246                 return;
 247         nvfx->state.dirty &= ~(1ULL << NVFX_STATE_VTXBUF);
 248         nvfx_state_emit(nvfx);
 249
 250         for (i = 0; i < nvfx->vtxbuf_nr; i++) {
 251                 map = pipe_buffer_map(pscreen, nvfx->vtxbuf[i].buffer,
 252                                       PIPE_BUFFER_USAGE_CPU_READ);
 253                 draw_set_mapped_vertex_buffer(nvfx->draw, i, map);
 254         }
 255
 256         if (idxbuf) {
 257                 map = pipe_buffer_map(pscreen, idxbuf,
 258                                       PIPE_BUFFER_USAGE_CPU_READ);
 259                 draw_set_mapped_element_buffer(nvfx->draw, idxbuf_size, map);
 260         } else {
 261                 draw_set_mapped_element_buffer(nvfx->draw, 0, NULL);
 262         }
 263
 264         if (nvfx->constbuf[PIPE_SHADER_VERTEX]) {
 265                 const unsigned nr = nvfx->constbuf_nr[PIPE_SHADER_VERTEX];
 266
 267                 map = pipe_buffer_map(pscreen,
 268                                       nvfx->constbuf[PIPE_SHADER_VERTEX],
 269                                       PIPE_BUFFER_USAGE_CPU_READ);
 270                 draw_set_mapped_constant_buffer(nvfx->draw, PIPE_SHADER_VERTEX, 0,
 271                                                 map, nr);
 272         }
 273
 274         draw_arrays(nvfx->draw, mode, start, count);
 275
 276         for (i = 0; i < nvfx->vtxbuf_nr; i++)
 277                 pipe_buffer_unmap(pscreen, nvfx->vtxbuf[i].buffer);
 278
 279         if (idxbuf)
 280                 pipe_buffer_unmap(pscreen, idxbuf);
 281
 282         if (nvfx->constbuf[PIPE_SHADER_VERTEX])
 283                 pipe_buffer_unmap(pscreen, nvfx->constbuf[PIPE_SHADER_VERTEX]);
 284
 285         draw_flush(nvfx->draw);
 286         pipe->flush(pipe, 0, NULL);
 287 }
 288
 289 static INLINE void
 290 emit_attrib(struct nvfx_context *nvfx, unsigned hw, unsigned emit,
 291             unsigned semantic, unsigned index)
 292 {
 293         unsigned draw_out = draw_find_shader_output(nvfx->draw, semantic, index);
 294         unsigned a = nvfx->swtnl.nr_attribs++;
 295
 296         nvfx->swtnl.hw[a] = hw;
 297         nvfx->swtnl.emit[a] = emit;
 298         nvfx->swtnl.draw[a] = draw_out;
 299 }
 300
 301 static boolean
 302 nvfx_state_vtxfmt_validate(struct nvfx_context *nvfx)
 303 {
 304         struct nvfx_fragment_program *fp = nvfx->fragprog;
 305         unsigned colour = 0, texcoords = 0, fog = 0, i;
 306
 307         /* Determine needed fragprog inputs */
 308         for (i = 0; i < fp->info.num_inputs; i++) {
 309                 switch (fp->info.input_semantic_name[i]) {
 310                 case TGSI_SEMANTIC_POSITION:
 311                         break;
 312                 case TGSI_SEMANTIC_COLOR:
 313                         colour |= (1 << fp->info.input_semantic_index[i]);
 314                         break;
 315                 case TGSI_SEMANTIC_GENERIC:
 316                         texcoords |= (1 << fp->info.input_semantic_index[i]);
 317                         break;
 318                 case TGSI_SEMANTIC_FOG:
 319                         fog = 1;
 320                         break;
 321                 default:
 322                         assert(0);
 323                 }
 324         }
 325
 326         nvfx->swtnl.nr_attribs = 0;
 327
 328         /* Map draw vtxprog output to hw attribute IDs */
 329         for (i = 0; i < 2; i++) {
 330                 if (!(colour & (1 << i)))
 331                         continue;
 332                 emit_attrib(nvfx, 3 + i, EMIT_4F, TGSI_SEMANTIC_COLOR, i);
 333         }
 334
 335         for (i = 0; i < 8; i++) {
 336                 if (!(texcoords & (1 << i)))
 337                         continue;
 338                 emit_attrib(nvfx, 8 + i, EMIT_4F, TGSI_SEMANTIC_GENERIC, i);
 339         }
 340
 341         if (fog) {
 342                 emit_attrib(nvfx, 5, EMIT_1F, TGSI_SEMANTIC_FOG, 0);
 343         }
 344
 345         emit_attrib(nvfx, 0, 0xff, TGSI_SEMANTIC_POSITION, 0);
 346
 347         return FALSE;
 348 }
 349
 350 struct nvfx_state_entry nvfx_state_vtxfmt = {
 351         .validate = nvfx_state_vtxfmt_validate,
 352         .dirty = {
 353                 .pipe = NVFX_NEW_ARRAYS | NVFX_NEW_FRAGPROG,
 354                 .hw = 0
 355         }
 356 };