2 * Copyright 2010 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "util/u_format_s3tc.h"
24 #include "pipe/p_screen.h"
26 #include "nvc0_fence.h"
27 #include "nvc0_context.h"
28 #include "nvc0_screen.h"
30 #include "nouveau/nv_object.xml.h"
31 #include "nvc0_graph_macros.h"
34 nvc0_screen_is_format_supported(struct pipe_screen *pscreen,
35 enum pipe_format format,
36 enum pipe_texture_target target,
37 unsigned sample_count,
38 unsigned bindings, unsigned geom_flags)
43 if (!util_format_s3tc_enabled) {
45 case PIPE_FORMAT_DXT1_RGB:
46 case PIPE_FORMAT_DXT1_RGBA:
47 case PIPE_FORMAT_DXT3_RGBA:
48 case PIPE_FORMAT_DXT5_RGBA:
55 /* transfers & shared are always supported */
56 bindings &= ~(PIPE_BIND_TRANSFER_READ |
57 PIPE_BIND_TRANSFER_WRITE |
60 return (nvc0_format_table[format].usage & bindings) == bindings;
64 nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
67 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
68 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
70 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
72 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
74 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
76 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
78 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
79 case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
80 case PIPE_CAP_TEXTURE_SWIZZLE:
81 case PIPE_CAP_TEXTURE_SHADOW_MAP:
82 case PIPE_CAP_NPOT_TEXTURES:
83 case PIPE_CAP_ANISOTROPIC_FILTER:
85 case PIPE_CAP_TWO_SIDED_STENCIL:
86 case PIPE_CAP_DEPTH_CLAMP:
87 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
88 case PIPE_CAP_POINT_SPRITE:
93 case PIPE_CAP_MAX_RENDER_TARGETS:
95 case PIPE_CAP_OCCLUSION_QUERY:
97 case PIPE_CAP_TIMER_QUERY:
98 case PIPE_CAP_STREAM_OUTPUT:
100 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
101 case PIPE_CAP_INDEP_BLEND_ENABLE:
102 case PIPE_CAP_INDEP_BLEND_FUNC:
104 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
105 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
107 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
108 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
110 case PIPE_CAP_SHADER_STENCIL_EXPORT:
112 case PIPE_CAP_PRIMITIVE_RESTART:
115 NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
121 nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
122 enum pipe_shader_cap param)
125 case PIPE_SHADER_VERTEX:
127 case PIPE_SHADER_TESSELLATION_CONTROL:
128 case PIPE_SHADER_TESSELLATION_EVALUATION:
130 case PIPE_SHADER_GEOMETRY:
131 case PIPE_SHADER_FRAGMENT:
138 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
139 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
140 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
141 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
143 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
145 case PIPE_SHADER_CAP_MAX_INPUTS:
146 if (shader == PIPE_SHADER_VERTEX)
149 case PIPE_SHADER_CAP_MAX_CONSTS:
151 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
153 case PIPE_SHADER_CAP_MAX_ADDRS:
155 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
156 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
157 return shader != PIPE_SHADER_FRAGMENT;
158 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
159 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
161 case PIPE_SHADER_CAP_MAX_PREDS:
163 case PIPE_SHADER_CAP_MAX_TEMPS:
164 return NVC0_CAP_MAX_PROGRAM_TEMPS;
165 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
168 NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param);
174 nvc0_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_cap param)
177 case PIPE_CAP_MAX_LINE_WIDTH:
178 case PIPE_CAP_MAX_LINE_WIDTH_AA:
180 case PIPE_CAP_MAX_POINT_WIDTH:
181 case PIPE_CAP_MAX_POINT_WIDTH_AA:
183 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
185 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
188 NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
194 nvc0_screen_destroy(struct pipe_screen *pscreen)
196 struct nvc0_screen *screen = nvc0_screen(pscreen);
198 nouveau_bo_ref(NULL, &screen->text);
199 nouveau_bo_ref(NULL, &screen->tls);
200 nouveau_bo_ref(NULL, &screen->txc);
201 nouveau_bo_ref(NULL, &screen->fence.bo);
202 nouveau_bo_ref(NULL, &screen->mp_stack_bo);
204 nouveau_resource_destroy(&screen->text_heap);
206 if (screen->tic.entries)
207 FREE(screen->tic.entries);
209 nouveau_grobj_free(&screen->fermi);
210 nouveau_grobj_free(&screen->eng2d);
211 nouveau_grobj_free(&screen->m2mf);
213 nouveau_screen_fini(&screen->base);
219 nvc0_graph_set_macro(struct nvc0_screen *screen, uint32_t m, unsigned pos,
220 unsigned size, const uint32_t *data)
222 struct nouveau_channel *chan = screen->base.channel;
226 BEGIN_RING(chan, RING_3D_(NVC0_GRAPH_MACRO_ID), 2);
227 OUT_RING (chan, (m - 0x3800) / 8);
228 OUT_RING (chan, pos);
229 BEGIN_RING_1I(chan, RING_3D_(NVC0_GRAPH_MACRO_UPLOAD_POS), size + 1);
230 OUT_RING (chan, pos);
231 OUT_RINGp (chan, data, size);
237 nvc0_screen_fence_reference(struct pipe_screen *pscreen,
238 struct pipe_fence_handle **ptr,
239 struct pipe_fence_handle *fence)
241 nvc0_fence_reference((struct nvc0_fence **)ptr, nvc0_fence(fence));
245 nvc0_screen_fence_signalled(struct pipe_screen *pscreen,
246 struct pipe_fence_handle *fence,
249 return !(((struct nvc0_fence *)fence)->state == NVC0_FENCE_STATE_SIGNALLED);
253 nvc0_screen_fence_finish(struct pipe_screen *pscreen,
254 struct pipe_fence_handle *fence,
257 return nvc0_fence_wait((struct nvc0_fence *)fence) != TRUE;
261 nvc0_magic_3d_init(struct nouveau_channel *chan)
263 BEGIN_RING(chan, RING_3D_(0x10cc), 1);
264 OUT_RING (chan, 0xff);
265 BEGIN_RING(chan, RING_3D_(0x10e0), 2);
266 OUT_RING(chan, 0xff);
267 OUT_RING(chan, 0xff);
268 BEGIN_RING(chan, RING_3D_(0x10ec), 2);
269 OUT_RING(chan, 0xff);
270 OUT_RING(chan, 0xff);
271 BEGIN_RING(chan, RING_3D_(0x074c), 1);
272 OUT_RING (chan, 0x3f);
274 BEGIN_RING(chan, RING_3D_(0x10f8), 1);
275 OUT_RING (chan, 0x0101);
277 BEGIN_RING(chan, RING_3D_(0x16a8), 1);
278 OUT_RING (chan, (3 << 16) | 3);
279 BEGIN_RING(chan, RING_3D_(0x1794), 1);
280 OUT_RING (chan, (2 << 16) | 2);
281 BEGIN_RING(chan, RING_3D_(0x0de8), 1);
283 BEGIN_RING(chan, RING_3D_(0x165c), 1);
286 BEGIN_RING(chan, RING_3D_(0x1528), 1); /* MP poke */
289 BEGIN_RING(chan, RING_3D_(0x12ac), 1);
291 BEGIN_RING(chan, RING_3D_(0x0218), 1);
292 OUT_RING (chan, 0x10);
293 BEGIN_RING(chan, RING_3D_(0x10fc), 1);
294 OUT_RING (chan, 0x10);
295 BEGIN_RING(chan, RING_3D_(0x1290), 1);
296 OUT_RING (chan, 0x10);
297 BEGIN_RING(chan, RING_3D_(0x12d8), 2);
298 OUT_RING (chan, 0x10);
299 OUT_RING (chan, 0x10);
300 BEGIN_RING(chan, RING_3D_(0x06d4), 1);
302 BEGIN_RING(chan, RING_3D_(0x1140), 1);
303 OUT_RING (chan, 0x10);
304 BEGIN_RING(chan, RING_3D_(0x1610), 1);
305 OUT_RING (chan, 0xe);
307 BEGIN_RING(chan, RING_3D_(0x164c), 1);
308 OUT_RING (chan, 1 << 12);
309 BEGIN_RING(chan, RING_3D_(0x151c), 1);
311 BEGIN_RING(chan, RING_3D_(0x020c), 1);
313 BEGIN_RING(chan, RING_3D_(0x030c), 1);
315 BEGIN_RING(chan, RING_3D_(0x0300), 1);
317 BEGIN_RING(chan, RING_3D_(0x1280), 1); /* PGRAPH poke */
319 BEGIN_RING(chan, RING_3D_(0x02d0), 1);
320 OUT_RING (chan, 0x1f40);
321 BEGIN_RING(chan, RING_3D_(0x00fdc), 1);
323 BEGIN_RING(chan, RING_3D_(0x19c0), 1);
325 BEGIN_RING(chan, RING_3D_(0x075c), 1);
328 BEGIN_RING(chan, RING_3D_(0x0fac), 1);
330 BEGIN_RING(chan, RING_3D_(0x0f90), 1);
334 #define FAIL_SCREEN_INIT(str, err) \
336 NOUVEAU_ERR(str, err); \
337 nvc0_screen_destroy(pscreen); \
342 nvc0_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
344 struct nvc0_screen *screen;
345 struct nouveau_channel *chan;
346 struct pipe_screen *pscreen;
350 screen = CALLOC_STRUCT(nvc0_screen);
353 pscreen = &screen->base.base;
355 ret = nouveau_screen_init(&screen->base, dev);
357 nvc0_screen_destroy(pscreen);
360 chan = screen->base.channel;
362 pscreen->winsys = ws;
363 pscreen->destroy = nvc0_screen_destroy;
364 pscreen->context_create = nvc0_create;
365 pscreen->is_format_supported = nvc0_screen_is_format_supported;
366 pscreen->get_param = nvc0_screen_get_param;
367 pscreen->get_shader_param = nvc0_screen_get_shader_param;
368 pscreen->get_paramf = nvc0_screen_get_paramf;
369 pscreen->fence_reference = nvc0_screen_fence_reference;
370 pscreen->fence_signalled = nvc0_screen_fence_signalled;
371 pscreen->fence_finish = nvc0_screen_fence_finish;
373 nvc0_screen_init_resource_functions(pscreen);
375 screen->base.vertex_buffer_flags = NOUVEAU_BO_GART;
376 screen->base.index_buffer_flags = 0;
378 ret = nouveau_bo_new(dev, NOUVEAU_BO_GART, 0, 4096, &screen->fence.bo);
381 nouveau_bo_map(screen->fence.bo, NOUVEAU_BO_RDWR);
382 screen->fence.map = screen->fence.bo->map;
383 nouveau_bo_unmap(screen->fence.bo);
385 for (i = 0; i < NVC0_SCRATCH_NR_BUFFERS; ++i) {
386 ret = nouveau_bo_new(dev, NOUVEAU_BO_GART, 0, NVC0_SCRATCH_SIZE,
387 &screen->scratch.bo[i]);
392 for (i = 0; i < 8; ++i) {
393 BEGIN_RING(chan, (i << 13) | (0x0000 >> 2), 1);
394 OUT_RING (chan, 0x0000);
397 ret = nouveau_grobj_alloc(chan, 0xbeef9039, NVC0_M2MF, &screen->m2mf);
399 FAIL_SCREEN_INIT("Error allocating PGRAPH context for M2MF: %d\n", ret);
401 BIND_RING (chan, screen->m2mf, NVC0_SUBCH_MF);
402 BEGIN_RING(chan, RING_MF(NOTIFY_ADDRESS_HIGH), 3);
403 OUT_RELOCh(chan, screen->fence.bo, 16, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
404 OUT_RELOCl(chan, screen->fence.bo, 16, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
407 ret = nouveau_grobj_alloc(chan, 0xbeef902d, NVC0_2D, &screen->eng2d);
409 FAIL_SCREEN_INIT("Error allocating PGRAPH context for 2D: %d\n", ret);
411 BIND_RING (chan, screen->eng2d, NVC0_SUBCH_2D);
412 BEGIN_RING(chan, RING_2D(OPERATION), 1);
413 OUT_RING (chan, NVC0_2D_OPERATION_SRCCOPY);
414 BEGIN_RING(chan, RING_2D(CLIP_ENABLE), 1);
416 BEGIN_RING(chan, RING_2D(COLOR_KEY_ENABLE), 1);
418 BEGIN_RING(chan, RING_2D_(0x0884), 1);
419 OUT_RING (chan, 0x3f);
420 BEGIN_RING(chan, RING_2D_(0x0888), 1);
423 ret = nouveau_grobj_alloc(chan, 0xbeef9097, NVC0_3D, &screen->fermi);
425 FAIL_SCREEN_INIT("Error allocating PGRAPH context for 3D: %d\n", ret);
427 BIND_RING (chan, screen->fermi, NVC0_SUBCH_3D);
428 BEGIN_RING(chan, RING_3D(NOTIFY_ADDRESS_HIGH), 3);
429 OUT_RELOCh(chan, screen->fence.bo, 32, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
430 OUT_RELOCl(chan, screen->fence.bo, 32, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
433 BEGIN_RING(chan, RING_3D(COND_MODE), 1);
434 OUT_RING (chan, NVC0_3D_COND_MODE_ALWAYS);
436 BEGIN_RING(chan, RING_3D(RT_CONTROL), 1);
439 BEGIN_RING(chan, RING_3D(MULTISAMPLE_ZETA_ENABLE), 1);
441 BEGIN_RING(chan, RING_3D(MULTISAMPLE_COLOR_ENABLE), 1);
443 BEGIN_RING(chan, RING_3D(MULTISAMPLE_MODE), 1);
444 OUT_RING (chan, NVC0_3D_MULTISAMPLE_MODE_1X);
445 BEGIN_RING(chan, RING_3D(MULTISAMPLE_CTRL), 1);
448 nvc0_magic_3d_init(chan);
450 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20, &screen->text);
453 /* nouveau_bo_pin(dev, screen->text); */
455 nouveau_resource_init(&screen->text_heap, 0, 1 << 20);
457 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 12, 6 << 16,
462 /* auxiliary constants (6 user clip planes, base instance id) */
463 BEGIN_RING(chan, RING_3D(CB_SIZE), 3);
464 OUT_RING (chan, 256);
465 OUT_RELOCh(chan, screen->uniforms, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
466 OUT_RELOCl(chan, screen->uniforms, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
467 for (i = 0; i < 5; ++i) {
468 BEGIN_RING(chan, RING_3D(CB_BIND(i)), 1);
469 OUT_RING (chan, (15 << 4) | 1);
472 screen->tls_size = 4 * 4 * 32 * 128 * 4;
473 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17,
474 screen->tls_size, &screen->tls);
478 BEGIN_RING(chan, RING_3D(CODE_ADDRESS_HIGH), 2);
479 OUT_RELOCh(chan, screen->text, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
480 OUT_RELOCl(chan, screen->text, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
481 BEGIN_RING(chan, RING_3D(LOCAL_ADDRESS_HIGH), 4);
482 OUT_RELOCh(chan, screen->tls, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
483 OUT_RELOCl(chan, screen->tls, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
484 OUT_RING (chan, screen->tls_size >> 32);
485 OUT_RING (chan, screen->tls_size);
486 BEGIN_RING(chan, RING_3D(LOCAL_BASE), 1);
489 for (i = 0; i < 5; ++i) {
490 BEGIN_RING(chan, RING_3D(TEX_LIMITS(i)), 1);
491 OUT_RING (chan, 0x54);
493 BEGIN_RING(chan, RING_3D(LINKED_TSC), 1);
496 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20,
497 &screen->mp_stack_bo);
500 /* nouveau_bo_pin(dev, screen->mp_stack_bo); */
502 BEGIN_RING(chan, RING_3D_(0x17bc), 3);
503 OUT_RELOCh(chan, screen->mp_stack_bo, 0, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
504 OUT_RELOCl(chan, screen->mp_stack_bo, 0, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
507 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 17, &screen->txc);
510 /* nouveau_bo_pin(dev, screen->txc); */
512 BEGIN_RING(chan, RING_3D(TIC_ADDRESS_HIGH), 3);
513 OUT_RELOCh(chan, screen->txc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
514 OUT_RELOCl(chan, screen->txc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
515 OUT_RING (chan, NVC0_TIC_MAX_ENTRIES - 1);
517 BEGIN_RING(chan, RING_3D(TSC_ADDRESS_HIGH), 3);
518 OUT_RELOCh(chan, screen->txc, 65536, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
519 OUT_RELOCl(chan, screen->txc, 65536, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
520 OUT_RING (chan, NVC0_TSC_MAX_ENTRIES - 1);
522 BEGIN_RING(chan, RING_3D(Y_ORIGIN_BOTTOM), 1);
524 BEGIN_RING(chan, RING_3D(WINDOW_OFFSET_X), 2);
527 BEGIN_RING(chan, RING_3D_(0x1590), 1); /* deactivate ZCULL */
528 OUT_RING (chan, 0x3f);
530 BEGIN_RING(chan, RING_3D(VIEWPORT_CLIP_RECTS_EN), 1);
532 BEGIN_RING(chan, RING_3D(CLIPID_ENABLE), 1);
535 BEGIN_RING(chan, RING_3D(VIEWPORT_TRANSFORM_EN), 1);
537 BEGIN_RING(chan, RING_3D(DEPTH_RANGE_NEAR(0)), 2);
538 OUT_RINGf (chan, 0.0f);
539 OUT_RINGf (chan, 1.0f);
541 /* We use scissors instead of exact view volume clipping,
542 * so they're always enabled.
544 BEGIN_RING(chan, RING_3D(SCISSOR_ENABLE(0)), 3);
546 OUT_RING (chan, 8192 << 16);
547 OUT_RING (chan, 8192 << 16);
549 BEGIN_RING(chan, RING_3D_(0x0fac), 1);
551 BEGIN_RING(chan, RING_3D_(0x3484), 1);
553 BEGIN_RING(chan, RING_3D_(0x0dbc), 1);
554 OUT_RING (chan, 0x00010000);
555 BEGIN_RING(chan, RING_3D_(0x0dd8), 1);
556 OUT_RING (chan, 0xff800006);
557 BEGIN_RING(chan, RING_3D_(0x3488), 1);
560 #define MK_MACRO(m, n) i = nvc0_graph_set_macro(screen, m, i, sizeof(n), n);
563 MK_MACRO(NVC0_3D_BLEND_ENABLES, nvc0_9097_blend_enables);
564 MK_MACRO(NVC0_3D_VERTEX_ARRAY_SELECT, nvc0_9097_vertex_array_select);
565 MK_MACRO(NVC0_3D_TEP_SELECT, nvc0_9097_tep_select);
566 MK_MACRO(NVC0_3D_GP_SELECT, nvc0_9097_gp_select);
567 MK_MACRO(NVC0_3D_POLYGON_MODE_FRONT, nvc0_9097_poly_mode_front);
568 MK_MACRO(NVC0_3D_POLYGON_MODE_BACK, nvc0_9097_poly_mode_back);
569 MK_MACRO(NVC0_3D_COLOR_MASK_BROADCAST, nvc0_9097_color_mask_brdc);
571 BEGIN_RING(chan, RING_3D(RASTERIZE_ENABLE), 1);
573 BEGIN_RING(chan, RING_3D(GP_SELECT), 1);
574 OUT_RING (chan, 0x40);
575 BEGIN_RING(chan, RING_3D(GP_BUILTIN_RESULT_EN), 1);
577 BEGIN_RING(chan, RING_3D(TEP_SELECT), 1);
578 OUT_RING (chan, 0x30);
579 BEGIN_RING(chan, RING_3D(PATCH_VERTICES), 1);
581 BEGIN_RING(chan, RING_3D(SP_SELECT(2)), 1);
582 OUT_RING (chan, 0x20);
583 BEGIN_RING(chan, RING_3D(SP_SELECT(0)), 1);
584 OUT_RING (chan, 0x00);
586 BEGIN_RING(chan, RING_3D(POINT_COORD_REPLACE), 1);
589 BEGIN_RING(chan, RING_3D(FRAG_COLOR_CLAMP_EN), 1);
590 OUT_RING (chan, 0x11111111);
591 BEGIN_RING(chan, RING_3D(EDGEFLAG_ENABLE), 1);
594 BEGIN_RING(chan, RING_3D(VERTEX_RUNOUT_ADDRESS_HIGH), 2);
595 OUT_RING (chan, 0xab);
596 OUT_RING (chan, 0x00000000);
600 screen->tic.entries = CALLOC(4096, sizeof(void *));
601 screen->tsc.entries = screen->tic.entries + 2048;
603 screen->mm_GART = nvc0_mm_create(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
605 screen->mm_VRAM = nvc0_mm_create(dev, NOUVEAU_BO_VRAM, 0x000);
606 screen->mm_VRAM_fe0 = nvc0_mm_create(dev, NOUVEAU_BO_VRAM, 0xfe0);
608 nvc0_screen_fence_new(screen, &screen->fence.current, FALSE);
613 nvc0_screen_destroy(pscreen);
618 nvc0_screen_make_buffers_resident(struct nvc0_screen *screen)
620 struct nouveau_channel *chan = screen->base.channel;
622 const unsigned flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD;
624 nouveau_reloc_emit(chan, NULL, 0, NULL, screen->text, 0, 0, flags, 0, 0);
625 nouveau_reloc_emit(chan, NULL, 0, NULL, screen->txc, 0, 0, flags, 0, 0);
626 nouveau_reloc_emit(chan, NULL, 0, NULL, screen->tls, 0, 0, flags, 0, 0);
630 nvc0_screen_tic_alloc(struct nvc0_screen *screen, void *entry)
632 int i = screen->tic.next;
634 while (screen->tic.lock[i / 32] & (1 << (i % 32)))
635 i = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
637 screen->tic.next = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
639 if (screen->tic.entries[i])
640 nvc0_tic_entry(screen->tic.entries[i])->id = -1;
642 screen->tic.entries[i] = entry;
647 nvc0_screen_tsc_alloc(struct nvc0_screen *screen, void *entry)
649 int i = screen->tsc.next;
651 while (screen->tsc.lock[i / 32] & (1 << (i % 32)))
652 i = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
654 screen->tsc.next = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
656 if (screen->tsc.entries[i])
657 nvc0_tsc_entry(screen->tsc.entries[i])->id = -1;
659 screen->tsc.entries[i] = entry;