2 * Copyright 2010 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "util/u_format.h"
24 #include "util/u_format_s3tc.h"
25 #include "pipe/p_screen.h"
27 #include "nvc0_context.h"
28 #include "nvc0_screen.h"
30 #include "nouveau/nv_object.xml.h"
31 #include "nvc0_graph_macros.h"
34 nvc0_screen_is_format_supported(struct pipe_screen *pscreen,
35 enum pipe_format format,
36 enum pipe_texture_target target,
37 unsigned sample_count,
43 if (!util_format_is_supported(format, bindings))
46 /* transfers & shared are always supported */
47 bindings &= ~(PIPE_BIND_TRANSFER_READ |
48 PIPE_BIND_TRANSFER_WRITE |
51 return (nvc0_format_table[format].usage & bindings) == bindings;
55 nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
58 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
59 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
61 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
63 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
65 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
67 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
69 case PIPE_CAP_ARRAY_TEXTURES:
71 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
72 case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
73 case PIPE_CAP_TEXTURE_SWIZZLE:
74 case PIPE_CAP_TEXTURE_SHADOW_MAP:
75 case PIPE_CAP_NPOT_TEXTURES:
76 case PIPE_CAP_ANISOTROPIC_FILTER:
77 case PIPE_CAP_SEAMLESS_CUBE_MAP:
79 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
81 case PIPE_CAP_TWO_SIDED_STENCIL:
82 case PIPE_CAP_DEPTH_CLAMP:
83 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
84 case PIPE_CAP_POINT_SPRITE:
89 case PIPE_CAP_MAX_RENDER_TARGETS:
91 case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL:
93 case PIPE_CAP_TIMER_QUERY:
94 case PIPE_CAP_OCCLUSION_QUERY:
96 case PIPE_CAP_STREAM_OUTPUT:
98 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
99 case PIPE_CAP_INDEP_BLEND_ENABLE:
100 case PIPE_CAP_INDEP_BLEND_FUNC:
102 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
103 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
105 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
106 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
108 case PIPE_CAP_SHADER_STENCIL_EXPORT:
110 case PIPE_CAP_PRIMITIVE_RESTART:
111 case PIPE_CAP_TGSI_INSTANCEID:
112 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
113 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
116 NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
122 nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
123 enum pipe_shader_cap param)
126 case PIPE_SHADER_VERTEX:
128 case PIPE_SHADER_TESSELLATION_CONTROL:
129 case PIPE_SHADER_TESSELLATION_EVALUATION:
131 case PIPE_SHADER_GEOMETRY:
132 case PIPE_SHADER_FRAGMENT:
139 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
140 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
141 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
142 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
144 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
146 case PIPE_SHADER_CAP_MAX_INPUTS:
147 if (shader == PIPE_SHADER_VERTEX)
150 case PIPE_SHADER_CAP_MAX_CONSTS:
152 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
154 case PIPE_SHADER_CAP_MAX_ADDRS:
156 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
157 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
158 return shader != PIPE_SHADER_FRAGMENT;
159 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
160 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
162 case PIPE_SHADER_CAP_MAX_PREDS:
164 case PIPE_SHADER_CAP_MAX_TEMPS:
165 return NVC0_CAP_MAX_PROGRAM_TEMPS;
166 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
168 case PIPE_SHADER_CAP_SUBROUTINES:
169 return 0; /* please inline, or provide function declarations */
171 NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param);
177 nvc0_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_cap param)
180 case PIPE_CAP_MAX_LINE_WIDTH:
181 case PIPE_CAP_MAX_LINE_WIDTH_AA:
183 case PIPE_CAP_MAX_POINT_WIDTH:
184 case PIPE_CAP_MAX_POINT_WIDTH_AA:
186 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
188 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
191 NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
197 nvc0_screen_destroy(struct pipe_screen *pscreen)
199 struct nvc0_screen *screen = nvc0_screen(pscreen);
201 nouveau_fence_wait(screen->base.fence.current);
202 nouveau_fence_ref(NULL, &screen->base.fence.current);
204 nouveau_bo_ref(NULL, &screen->text);
205 nouveau_bo_ref(NULL, &screen->tls);
206 nouveau_bo_ref(NULL, &screen->txc);
207 nouveau_bo_ref(NULL, &screen->fence.bo);
208 nouveau_bo_ref(NULL, &screen->vfetch_cache);
210 nouveau_resource_destroy(&screen->text_heap);
212 if (screen->tic.entries)
213 FREE(screen->tic.entries);
215 nouveau_mm_destroy(screen->mm_VRAM_fe0);
217 nouveau_grobj_free(&screen->fermi);
218 nouveau_grobj_free(&screen->eng2d);
219 nouveau_grobj_free(&screen->m2mf);
221 nouveau_screen_fini(&screen->base);
227 nvc0_graph_set_macro(struct nvc0_screen *screen, uint32_t m, unsigned pos,
228 unsigned size, const uint32_t *data)
230 struct nouveau_channel *chan = screen->base.channel;
234 BEGIN_RING(chan, RING_3D_(NVC0_GRAPH_MACRO_ID), 2);
235 OUT_RING (chan, (m - 0x3800) / 8);
236 OUT_RING (chan, pos);
237 BEGIN_RING_1I(chan, RING_3D_(NVC0_GRAPH_MACRO_UPLOAD_POS), size + 1);
238 OUT_RING (chan, pos);
239 OUT_RINGp (chan, data, size);
245 nvc0_magic_3d_init(struct nouveau_channel *chan)
247 BEGIN_RING(chan, RING_3D_(0x10cc), 1);
248 OUT_RING (chan, 0xff);
249 BEGIN_RING(chan, RING_3D_(0x10e0), 2);
250 OUT_RING(chan, 0xff);
251 OUT_RING(chan, 0xff);
252 BEGIN_RING(chan, RING_3D_(0x10ec), 2);
253 OUT_RING(chan, 0xff);
254 OUT_RING(chan, 0xff);
255 BEGIN_RING(chan, RING_3D_(0x074c), 1);
256 OUT_RING (chan, 0x3f);
258 BEGIN_RING(chan, RING_3D_(0x16a8), 1);
259 OUT_RING (chan, (3 << 16) | 3);
260 BEGIN_RING(chan, RING_3D_(0x1794), 1);
261 OUT_RING (chan, (2 << 16) | 2);
262 BEGIN_RING(chan, RING_3D_(0x0de8), 1);
265 #if 0 /* software method */
266 BEGIN_RING(chan, RING_3D_(0x1528), 1); /* MP poke */
270 BEGIN_RING(chan, RING_3D_(0x12ac), 1);
272 BEGIN_RING(chan, RING_3D_(0x0218), 1);
273 OUT_RING (chan, 0x10);
274 BEGIN_RING(chan, RING_3D_(0x10fc), 1);
275 OUT_RING (chan, 0x10);
276 BEGIN_RING(chan, RING_3D_(0x1290), 1);
277 OUT_RING (chan, 0x10);
278 BEGIN_RING(chan, RING_3D_(0x12d8), 2);
279 OUT_RING (chan, 0x10);
280 OUT_RING (chan, 0x10);
281 BEGIN_RING(chan, RING_3D_(0x06d4), 1);
283 BEGIN_RING(chan, RING_3D_(0x1140), 1);
284 OUT_RING (chan, 0x10);
285 BEGIN_RING(chan, RING_3D_(0x1610), 1);
286 OUT_RING (chan, 0xe);
288 BEGIN_RING(chan, RING_3D_(0x164c), 1);
289 OUT_RING (chan, 1 << 12);
290 BEGIN_RING(chan, RING_3D_(0x151c), 1);
292 BEGIN_RING(chan, RING_3D_(0x030c), 1);
294 BEGIN_RING(chan, RING_3D_(0x0300), 1);
296 #if 0 /* software method */
297 BEGIN_RING(chan, RING_3D_(0x1280), 1); /* PGRAPH poke */
300 BEGIN_RING(chan, RING_3D_(0x02d0), 1);
301 OUT_RING (chan, 0x1f40);
302 BEGIN_RING(chan, RING_3D_(0x00fdc), 1);
304 BEGIN_RING(chan, RING_3D_(0x19c0), 1);
306 BEGIN_RING(chan, RING_3D_(0x075c), 1);
311 nvc0_screen_fence_emit(struct pipe_screen *pscreen, u32 *sequence)
313 struct nvc0_screen *screen = nvc0_screen(pscreen);
314 struct nouveau_channel *chan = screen->base.channel;
316 MARK_RING (chan, 5, 2);
318 /* we need to do it after possible flush in MARK_RING */
319 *sequence = ++screen->base.fence.sequence;
321 BEGIN_RING(chan, RING_3D(QUERY_ADDRESS_HIGH), 4);
322 OUT_RELOCh(chan, screen->fence.bo, 0, NOUVEAU_BO_WR);
323 OUT_RELOCl(chan, screen->fence.bo, 0, NOUVEAU_BO_WR);
324 OUT_RING (chan, *sequence);
325 OUT_RING (chan, NVC0_3D_QUERY_GET_FENCE | NVC0_3D_QUERY_GET_SHORT |
326 (0xf << NVC0_3D_QUERY_GET_UNIT__SHIFT));
330 nvc0_screen_fence_update(struct pipe_screen *pscreen)
332 struct nvc0_screen *screen = nvc0_screen(pscreen);
333 return screen->fence.map[0];
336 #define FAIL_SCREEN_INIT(str, err) \
338 NOUVEAU_ERR(str, err); \
339 nvc0_screen_destroy(pscreen); \
344 nvc0_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
346 struct nvc0_screen *screen;
347 struct nouveau_channel *chan;
348 struct pipe_screen *pscreen;
352 screen = CALLOC_STRUCT(nvc0_screen);
355 pscreen = &screen->base.base;
357 screen->base.sysmem_bindings = PIPE_BIND_CONSTANT_BUFFER;
359 ret = nouveau_screen_init(&screen->base, dev);
361 nvc0_screen_destroy(pscreen);
364 chan = screen->base.channel;
366 pscreen->winsys = ws;
367 pscreen->destroy = nvc0_screen_destroy;
368 pscreen->context_create = nvc0_create;
369 pscreen->is_format_supported = nvc0_screen_is_format_supported;
370 pscreen->get_param = nvc0_screen_get_param;
371 pscreen->get_shader_param = nvc0_screen_get_shader_param;
372 pscreen->get_paramf = nvc0_screen_get_paramf;
374 nvc0_screen_init_resource_functions(pscreen);
376 ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, 4096,
380 nouveau_bo_map(screen->fence.bo, NOUVEAU_BO_RDWR);
381 screen->fence.map = screen->fence.bo->map;
382 nouveau_bo_unmap(screen->fence.bo);
383 screen->base.fence.emit = nvc0_screen_fence_emit;
384 screen->base.fence.update = nvc0_screen_fence_update;
386 for (i = 0; i < NVC0_SCRATCH_NR_BUFFERS; ++i) {
387 ret = nouveau_bo_new(dev, NOUVEAU_BO_GART, 0, NVC0_SCRATCH_SIZE,
388 &screen->scratch.bo[i]);
393 ret = nouveau_grobj_alloc(chan, 0xbeef9039, NVC0_M2MF, &screen->m2mf);
395 FAIL_SCREEN_INIT("Error allocating PGRAPH context for M2MF: %d\n", ret);
397 BIND_RING (chan, screen->m2mf, NVC0_SUBCH_MF);
398 BEGIN_RING(chan, RING_MF(NOTIFY_ADDRESS_HIGH), 3);
399 OUT_RELOCh(chan, screen->fence.bo, 16, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
400 OUT_RELOCl(chan, screen->fence.bo, 16, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
403 ret = nouveau_grobj_alloc(chan, 0xbeef902d, NVC0_2D, &screen->eng2d);
405 FAIL_SCREEN_INIT("Error allocating PGRAPH context for 2D: %d\n", ret);
407 BIND_RING (chan, screen->eng2d, NVC0_SUBCH_2D);
408 BEGIN_RING(chan, RING_2D(OPERATION), 1);
409 OUT_RING (chan, NVC0_2D_OPERATION_SRCCOPY);
410 BEGIN_RING(chan, RING_2D(CLIP_ENABLE), 1);
412 BEGIN_RING(chan, RING_2D(COLOR_KEY_ENABLE), 1);
414 BEGIN_RING(chan, RING_2D_(0x0884), 1);
415 OUT_RING (chan, 0x3f);
416 BEGIN_RING(chan, RING_2D_(0x0888), 1);
419 ret = nouveau_grobj_alloc(chan, 0xbeef9097, NVC0_3D, &screen->fermi);
421 FAIL_SCREEN_INIT("Error allocating PGRAPH context for 3D: %d\n", ret);
423 BIND_RING (chan, screen->fermi, NVC0_SUBCH_3D);
424 BEGIN_RING(chan, RING_3D(NOTIFY_ADDRESS_HIGH), 3);
425 OUT_RELOCh(chan, screen->fence.bo, 32, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
426 OUT_RELOCl(chan, screen->fence.bo, 32, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
429 BEGIN_RING(chan, RING_3D(COND_MODE), 1);
430 OUT_RING (chan, NVC0_3D_COND_MODE_ALWAYS);
432 BEGIN_RING(chan, RING_3D(RT_CONTROL), 1);
435 BEGIN_RING(chan, RING_3D(CSAA_ENABLE), 1);
437 BEGIN_RING(chan, RING_3D(MULTISAMPLE_ENABLE), 1);
439 BEGIN_RING(chan, RING_3D(MULTISAMPLE_MODE), 1);
440 OUT_RING (chan, NVC0_3D_MULTISAMPLE_MODE_1X);
441 BEGIN_RING(chan, RING_3D(MULTISAMPLE_CTRL), 1);
443 BEGIN_RING(chan, RING_3D(LINE_WIDTH_SEPARATE), 1);
445 BEGIN_RING(chan, RING_3D(LINE_LAST_PIXEL), 1);
447 BEGIN_RING(chan, RING_3D(BLEND_SEPARATE_ALPHA), 1);
449 BEGIN_RING(chan, RING_3D(BLEND_ENABLE_COMMON), 1);
451 BEGIN_RING(chan, RING_3D(TEX_MISC), 1);
452 OUT_RING (chan, NVC0_3D_TEX_MISC_SEAMLESS_CUBE_MAP);
454 nvc0_magic_3d_init(chan);
456 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20, &screen->text);
460 /* XXX: getting a page fault at the end of the code buffer every few
461 * launches, don't use the last 256 bytes to work around them - prefetch ?
463 nouveau_resource_init(&screen->text_heap, 0, (1 << 20) - 0x100);
465 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 12, 6 << 16,
470 /* auxiliary constants (6 user clip planes, base instance id) */
471 BEGIN_RING(chan, RING_3D(CB_SIZE), 3);
472 OUT_RING (chan, 256);
473 OUT_RELOCh(chan, screen->uniforms, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
474 OUT_RELOCl(chan, screen->uniforms, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
475 for (i = 0; i < 5; ++i) {
476 BEGIN_RING(chan, RING_3D(CB_BIND(i)), 1);
477 OUT_RING (chan, (15 << 4) | 1);
480 screen->tls_size = (16 * 32) * (NVC0_CAP_MAX_PROGRAM_TEMPS * 16);
481 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17,
482 screen->tls_size, &screen->tls);
486 BEGIN_RING(chan, RING_3D(CODE_ADDRESS_HIGH), 2);
487 OUT_RELOCh(chan, screen->text, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
488 OUT_RELOCl(chan, screen->text, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
489 BEGIN_RING(chan, RING_3D(LOCAL_ADDRESS_HIGH), 4);
490 OUT_RELOCh(chan, screen->tls, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
491 OUT_RELOCl(chan, screen->tls, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
492 OUT_RING (chan, screen->tls_size >> 32);
493 OUT_RING (chan, screen->tls_size);
494 BEGIN_RING(chan, RING_3D_(0x07a0), 1);
496 BEGIN_RING(chan, RING_3D(LOCAL_BASE), 1);
499 for (i = 0; i < 5; ++i) {
500 BEGIN_RING(chan, RING_3D(TEX_LIMITS(i)), 1);
501 OUT_RING (chan, 0x54);
503 BEGIN_RING(chan, RING_3D(LINKED_TSC), 1);
506 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20,
507 &screen->vfetch_cache);
511 BEGIN_RING(chan, RING_3D(VERTEX_QUARANTINE_ADDRESS_HIGH), 3);
512 OUT_RELOCh(chan, screen->vfetch_cache, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
513 OUT_RELOCl(chan, screen->vfetch_cache, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
516 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 17, &screen->txc);
520 BEGIN_RING(chan, RING_3D(TIC_ADDRESS_HIGH), 3);
521 OUT_RELOCh(chan, screen->txc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
522 OUT_RELOCl(chan, screen->txc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
523 OUT_RING (chan, NVC0_TIC_MAX_ENTRIES - 1);
525 BEGIN_RING(chan, RING_3D(TSC_ADDRESS_HIGH), 3);
526 OUT_RELOCh(chan, screen->txc, 65536, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
527 OUT_RELOCl(chan, screen->txc, 65536, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
528 OUT_RING (chan, NVC0_TSC_MAX_ENTRIES - 1);
530 BEGIN_RING(chan, RING_3D(SCREEN_Y_CONTROL), 1);
532 BEGIN_RING(chan, RING_3D(WINDOW_OFFSET_X), 2);
535 BEGIN_RING(chan, RING_3D_(0x1590), 1); /* deactivate ZCULL */
536 OUT_RING (chan, 0x3f);
538 BEGIN_RING(chan, RING_3D(CLIP_RECTS_MODE), 1);
539 OUT_RING (chan, NVC0_3D_CLIP_RECTS_MODE_INSIDE_ANY);
540 BEGIN_RING(chan, RING_3D(CLIP_RECT_HORIZ(0)), 8 * 2);
541 for (i = 0; i < 8 * 2; ++i)
543 BEGIN_RING(chan, RING_3D(CLIP_RECTS_EN), 1);
545 BEGIN_RING(chan, RING_3D(CLIPID_ENABLE), 1);
548 /* neither scissors, viewport nor stencil mask should affect clears */
549 BEGIN_RING(chan, RING_3D(CLEAR_FLAGS), 1);
552 BEGIN_RING(chan, RING_3D(VIEWPORT_TRANSFORM_EN), 1);
554 BEGIN_RING(chan, RING_3D(DEPTH_RANGE_NEAR(0)), 2);
555 OUT_RINGf (chan, 0.0f);
556 OUT_RINGf (chan, 1.0f);
557 BEGIN_RING(chan, RING_3D(VIEW_VOLUME_CLIP_CTRL), 1);
558 OUT_RING (chan, NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK1);
560 /* We use scissors instead of exact view volume clipping,
561 * so they're always enabled.
563 BEGIN_RING(chan, RING_3D(SCISSOR_ENABLE(0)), 3);
565 OUT_RING (chan, 8192 << 16);
566 OUT_RING (chan, 8192 << 16);
568 #define MK_MACRO(m, n) i = nvc0_graph_set_macro(screen, m, i, sizeof(n), n);
571 MK_MACRO(NVC0_3D_BLEND_ENABLES, nvc0_9097_blend_enables);
572 MK_MACRO(NVC0_3D_VERTEX_ARRAY_SELECT, nvc0_9097_vertex_array_select);
573 MK_MACRO(NVC0_3D_TEP_SELECT, nvc0_9097_tep_select);
574 MK_MACRO(NVC0_3D_GP_SELECT, nvc0_9097_gp_select);
575 MK_MACRO(NVC0_3D_POLYGON_MODE_FRONT, nvc0_9097_poly_mode_front);
576 MK_MACRO(NVC0_3D_POLYGON_MODE_BACK, nvc0_9097_poly_mode_back);
578 BEGIN_RING(chan, RING_3D(RASTERIZE_ENABLE), 1);
580 BEGIN_RING(chan, RING_3D(RT_SEPARATE_FRAG_DATA), 1);
582 BEGIN_RING(chan, RING_3D(GP_SELECT), 1);
583 OUT_RING (chan, 0x40);
584 BEGIN_RING(chan, RING_3D(LAYER), 1);
586 BEGIN_RING(chan, RING_3D(TEP_SELECT), 1);
587 OUT_RING (chan, 0x30);
588 BEGIN_RING(chan, RING_3D(PATCH_VERTICES), 1);
590 BEGIN_RING(chan, RING_3D(SP_SELECT(2)), 1);
591 OUT_RING (chan, 0x20);
592 BEGIN_RING(chan, RING_3D(SP_SELECT(0)), 1);
593 OUT_RING (chan, 0x00);
595 BEGIN_RING(chan, RING_3D(POINT_COORD_REPLACE), 1);
597 BEGIN_RING(chan, RING_3D(POINT_RASTER_RULES), 1);
598 OUT_RING (chan, NVC0_3D_POINT_RASTER_RULES_OGL);
600 BEGIN_RING(chan, RING_3D(EDGEFLAG_ENABLE), 1);
603 BEGIN_RING(chan, RING_3D(VERTEX_RUNOUT_ADDRESS_HIGH), 2);
604 OUT_RING (chan, 0xab);
605 OUT_RING (chan, 0x00000000);
609 screen->tic.entries = CALLOC(4096, sizeof(void *));
610 screen->tsc.entries = screen->tic.entries + 2048;
612 screen->mm_VRAM_fe0 = nouveau_mm_create(dev, NOUVEAU_BO_VRAM, 0xfe0);
614 nouveau_fence_new(&screen->base, &screen->base.fence.current, FALSE);
619 nvc0_screen_destroy(pscreen);
624 nvc0_screen_make_buffers_resident(struct nvc0_screen *screen)
626 struct nouveau_channel *chan = screen->base.channel;
628 const unsigned flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD;
630 MARK_RING(chan, 5, 5);
631 nouveau_bo_validate(chan, screen->text, flags);
632 nouveau_bo_validate(chan, screen->uniforms, flags);
633 nouveau_bo_validate(chan, screen->txc, flags);
634 nouveau_bo_validate(chan, screen->vfetch_cache, flags);
636 if (screen->cur_ctx && screen->cur_ctx->state.tls_required)
637 nouveau_bo_validate(chan, screen->tls, flags);
641 nvc0_screen_tic_alloc(struct nvc0_screen *screen, void *entry)
643 int i = screen->tic.next;
645 while (screen->tic.lock[i / 32] & (1 << (i % 32)))
646 i = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
648 screen->tic.next = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
650 if (screen->tic.entries[i])
651 nv50_tic_entry(screen->tic.entries[i])->id = -1;
653 screen->tic.entries[i] = entry;
658 nvc0_screen_tsc_alloc(struct nvc0_screen *screen, void *entry)
660 int i = screen->tsc.next;
662 while (screen->tsc.lock[i / 32] & (1 << (i % 32)))
663 i = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
665 screen->tsc.next = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
667 if (screen->tsc.entries[i])
668 nv50_tsc_entry(screen->tsc.entries[i])->id = -1;
670 screen->tsc.entries[i] = entry;