2 * Copyright 2010 Ben Skeggs
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #ifndef __NV50_PROG_H__
24 #define __NV50_PROG_H__
26 #include "pipe/p_state.h"
27 #include "tgsi/tgsi_scan.h"
29 #define NV50_CAP_MAX_PROGRAM_TEMPS 64
32 uint8_t id; /* tgsi index */
33 uint8_t hw; /* hw index, nv50 wants flat FP inputs last */
39 ubyte sn; /* semantic name */
40 ubyte si; /* semantic index */
44 struct pipe_shader_state pipe;
55 unsigned parm_size; /* size limit of uniform buffer */
57 ubyte max_gpr; /* REG_ALLOC_TEMP */
58 ubyte max_out; /* REG_ALLOC_RESULT or FP_RESULT_COUNT */
62 struct nv50_varying in[16];
63 struct nv50_varying out[16];
66 uint32_t attrs[3]; /* VP_ATTR_EN_0,1 and VP_GP_BUILTIN_ATTR_EN */
75 uint32_t flags[2]; /* 0x19a8, 196c */
76 uint32_t interp; /* 0x1988 */
77 uint32_t colors; /* 0x1904 */
81 ubyte primid; /* primitive id output register */
83 uint8_t prim_type; /* point, line strip or tri strip */
86 /* relocation records */
90 struct nouveau_resource *res;
93 #define NV50_INTERP_LINEAR (1 << 0)
94 #define NV50_INTERP_FLAT (1 << 1)
95 #define NV50_INTERP_CENTROID (1 << 2)
97 /* analyze TGSI and see which TEMP[] are used as subroutine inputs/outputs */
98 struct nv50_subroutine {
101 /* function inputs and outputs */
102 uint32_t argv[NV50_CAP_MAX_PROGRAM_TEMPS][4];
103 uint32_t retv[NV50_CAP_MAX_PROGRAM_TEMPS][4];
106 struct nv50_translation_info {
107 struct nv50_program *p;
109 struct tgsi_full_instruction *insns;
112 ubyte input_map[PIPE_MAX_SHADER_INPUTS][4];
113 ubyte output_map[PIPE_MAX_SHADER_OUTPUTS][4];
114 ubyte sysval_map[TGSI_SEMANTIC_COUNT];
115 ubyte interp_mode[PIPE_MAX_SHADER_INPUTS];
116 int input_access[PIPE_MAX_SHADER_INPUTS][4];
117 int output_access[PIPE_MAX_SHADER_OUTPUTS][4];
118 boolean indirect_inputs;
119 boolean indirect_outputs;
120 boolean store_to_memory;
121 struct tgsi_shader_info scan;
126 struct nv50_subroutine *subr;
130 int nv50_generate_code(struct nv50_translation_info *ti);
132 void nv50_relocate_program(struct nv50_program *p,
133 uint32_t code_base, uint32_t data_base);
135 boolean nv50_program_tx(struct nv50_program *p);
137 #endif /* __NV50_PROG_H__ */