2 * Copyright 2010 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25 #define DESCEND_ARBITRARY(j, f) \
27 b->pass_seq = ctx->pc->pass_seq; \
29 for (j = 0; j < 2; ++j) \
30 if (b->out[j] && b->out[j]->pass_seq < ctx->pc->pass_seq) \
34 extern unsigned nv50_inst_min_size(struct nv_instruction *);
41 values_equal(struct nv_value *a, struct nv_value *b)
44 return (a->reg.file == b->reg.file && a->join->reg.id == b->join->reg.id);
48 inst_commutation_check(struct nv_instruction *a,
49 struct nv_instruction *b)
53 for (di = 0; di < 4; ++di) {
56 for (si = 0; si < 5; ++si) {
59 if (values_equal(a->def[di], b->src[si]->value))
64 if (b->flags_src && b->flags_src->value == a->flags_def)
70 /* Check whether we can swap the order of the instructions,
71 * where a & b may be either the earlier or the later one.
74 inst_commutation_legal(struct nv_instruction *a,
75 struct nv_instruction *b)
77 return inst_commutation_check(a, b) && inst_commutation_check(b, a);
81 inst_cullable(struct nv_instruction *nvi)
83 return (!(nvi->is_terminator || nvi->is_join ||
86 nv_nvi_refcount(nvi)));
90 nvi_isnop(struct nv_instruction *nvi)
92 if (nvi->opcode == NV_OP_EXPORT || nvi->opcode == NV_OP_UNDEF)
102 if (nvi->def[0]->join->reg.id < 0)
105 if (nvi->opcode != NV_OP_MOV && nvi->opcode != NV_OP_SELECT)
108 if (nvi->def[0]->reg.file != nvi->src[0]->value->reg.file)
111 if (nvi->src[0]->value->join->reg.id < 0) {
112 debug_printf("nvi_isnop: orphaned value detected\n");
116 if (nvi->opcode == NV_OP_SELECT)
117 if (!values_equal(nvi->def[0], nvi->src[1]->value))
120 return values_equal(nvi->def[0], nvi->src[0]->value);
130 nv_pass_flatten(struct nv_pass *ctx, struct nv_basic_block *b);
133 nv_pc_pass_pre_emission(void *priv, struct nv_basic_block *b)
135 struct nv_pc *pc = (struct nv_pc *)priv;
136 struct nv_basic_block *in;
137 struct nv_instruction *nvi, *next;
141 for (j = pc->num_blocks - 1; j >= 0 && !pc->bb_list[j]->bin_size; --j);
145 /* check for no-op branches (BRA $PC+8) */
146 if (in->exit && in->exit->opcode == NV_OP_BRA && in->exit->target == b) {
150 for (++j; j < pc->num_blocks; ++j)
151 pc->bb_list[j]->bin_pos -= 8;
153 nv_nvi_delete(in->exit);
155 b->bin_pos = in->bin_pos + in->bin_size;
158 pc->bb_list[pc->num_blocks++] = b;
162 for (nvi = b->entry; nvi; nvi = next) {
168 for (nvi = b->entry; nvi; nvi = next) {
171 size = nv50_inst_min_size(nvi);
172 if (nvi->next && size < 8)
175 if ((n32 & 1) && nvi->next &&
176 nv50_inst_min_size(nvi->next) == 4 &&
177 inst_commutation_legal(nvi, nvi->next)) {
179 debug_printf("permuting: ");
180 nv_print_instruction(nvi);
181 nv_print_instruction(nvi->next);
182 nv_nvi_permute(nvi, nvi->next);
187 b->bin_size += n32 & 1;
189 nvi->prev->is_long = 1;
192 b->bin_size += 1 + nvi->is_long;
196 debug_printf("block %p is now empty\n", b);
198 if (!b->exit->is_long) {
200 b->exit->is_long = 1;
203 /* might have del'd a hole tail of instructions */
204 if (!b->exit->prev->is_long && !(n32 & 1)) {
206 b->exit->prev->is_long = 1;
209 assert(!b->entry || (b->exit && b->exit->is_long));
211 pc->bin_size += b->bin_size *= 4;
215 nv_pc_exec_pass2(struct nv_pc *pc)
222 nv_pass_flatten(&pass, pc->root);
224 debug_printf("preparing %u blocks for emission\n", pc->num_blocks);
226 pc->bb_list = CALLOC(pc->num_blocks, sizeof(struct nv_basic_block *));
229 nv_pc_pass_in_order(pc->root, nv_pc_pass_pre_emission, pc);
234 static INLINE boolean
235 is_cmem_load(struct nv_instruction *nvi)
237 return (nvi->opcode == NV_OP_LDA &&
238 nvi->src[0]->value->reg.file >= NV_FILE_MEM_C(0) &&
239 nvi->src[0]->value->reg.file <= NV_FILE_MEM_C(15));
242 static INLINE boolean
243 is_smem_load(struct nv_instruction *nvi)
245 return (nvi->opcode == NV_OP_LDA &&
246 (nvi->src[0]->value->reg.file == NV_FILE_MEM_S ||
247 nvi->src[0]->value->reg.file <= NV_FILE_MEM_P));
250 static INLINE boolean
251 is_immd_move(struct nv_instruction *nvi)
253 return (nvi->opcode == NV_OP_MOV &&
254 nvi->src[0]->value->reg.file == NV_FILE_IMM);
258 check_swap_src_0_1(struct nv_instruction *nvi)
260 static const ubyte cc_swapped[8] = { 0, 4, 2, 6, 1, 5, 3, 7 };
262 struct nv_ref *src0 = nvi->src[0], *src1 = nvi->src[1];
264 if (!nv_op_commutative(nvi->opcode))
266 assert(src0 && src1);
268 if (src1->value->reg.file == NV_FILE_IMM) {
269 /* should only be present from folding a constant MUL part of a MAD */
270 assert(nvi->opcode == NV_OP_ADD);
274 if (is_cmem_load(src0->value->insn)) {
275 if (!is_cmem_load(src1->value->insn)) {
278 /* debug_printf("swapping cmem load to 1\n"); */
281 if (is_smem_load(src1->value->insn)) {
282 if (!is_smem_load(src0->value->insn)) {
285 /* debug_printf("swapping smem load to 0\n"); */
289 if (nvi->opcode == NV_OP_SET && nvi->src[0] != src0)
290 nvi->set_cond = cc_swapped[nvi->set_cond];
294 nv_pass_fold_stores(struct nv_pass *ctx, struct nv_basic_block *b)
296 struct nv_instruction *nvi, *sti, *next;
299 for (sti = b->entry; sti; sti = next) {
302 /* only handling MOV to $oX here */
303 if (!sti->def[0] || sti->def[0]->reg.file != NV_FILE_OUT)
305 if (sti->opcode != NV_OP_MOV && sti->opcode != NV_OP_STA)
308 nvi = sti->src[0]->value->insn;
309 if (!nvi || nvi->opcode == NV_OP_PHI)
311 assert(nvi->def[0] == sti->src[0]->value);
313 if (nvi->def[0]->refc > 1)
316 /* cannot write to $oX when using immediate */
317 for (j = 0; j < 4 && nvi->src[j]; ++j)
318 if (nvi->src[j]->value->reg.file == NV_FILE_IMM)
320 if (j < 4 && nvi->src[j])
323 nvi->def[0] = sti->def[0];
324 nvi->fixed = sti->fixed;
328 DESCEND_ARBITRARY(j, nv_pass_fold_stores);
334 nv_pass_fold_loads(struct nv_pass *ctx, struct nv_basic_block *b)
336 struct nv_instruction *nvi, *ld;
339 for (nvi = b->entry; nvi; nvi = nvi->next) {
340 check_swap_src_0_1(nvi);
342 for (j = 0; j < 3; ++j) {
345 ld = nvi->src[j]->value->insn;
349 if (is_immd_move(ld) && nv50_nvi_can_use_imm(nvi, j)) {
350 nv_reference(ctx->pc, &nvi->src[j], ld->src[0]->value);
354 if (ld->opcode != NV_OP_LDA)
356 if (!nv50_nvi_can_load(nvi, j, ld->src[0]->value))
359 if (j == 0 && ld->src[4]) /* can't load shared mem */
362 /* fold it ! */ /* XXX: ref->insn */
363 nv_reference(ctx->pc, &nvi->src[j], ld->src[0]->value);
365 nv_reference(ctx->pc, &nvi->src[4], ld->src[4]->value);
368 DESCEND_ARBITRARY(j, nv_pass_fold_loads);
374 nv_pass_lower_mods(struct nv_pass *ctx, struct nv_basic_block *b)
377 struct nv_instruction *nvi, *mi, *next;
380 for (nvi = b->entry; nvi; nvi = next) {
382 if (nvi->opcode == NV_OP_SUB) {
383 nvi->opcode = NV_OP_ADD;
384 nvi->src[1]->mod ^= NV_MOD_NEG;
387 /* should not put any modifiers on NEG and ABS */
388 assert(nvi->opcode != NV_MOD_NEG || !nvi->src[0]->mod);
389 assert(nvi->opcode != NV_MOD_ABS || !nvi->src[0]->mod);
391 for (j = 0; j < 4; ++j) {
395 mi = nvi->src[j]->value->insn;
398 if (mi->def[0]->refc > 1)
401 if (mi->opcode == NV_OP_NEG) mod = NV_MOD_NEG;
403 if (mi->opcode == NV_OP_ABS) mod = NV_MOD_ABS;
407 if (nvi->opcode == NV_OP_ABS)
408 mod &= ~(NV_MOD_NEG | NV_MOD_ABS);
410 if (nvi->opcode == NV_OP_NEG && mod == NV_MOD_NEG) {
411 nvi->opcode = NV_OP_MOV;
415 if (!(nv50_supported_src_mods(nvi->opcode, j) & mod))
418 nv_reference(ctx->pc, &nvi->src[j], mi->src[0]->value);
420 nvi->src[j]->mod ^= mod;
423 if (nvi->opcode == NV_OP_SAT) {
424 mi = nvi->src[0]->value->insn;
426 if ((mi->opcode == NV_OP_MAD) && !mi->flags_def) {
428 mi->def[0] = nvi->def[0];
433 DESCEND_ARBITRARY(j, nv_pass_lower_mods);
438 #define SRC_IS_MUL(s) ((s)->insn && (s)->insn->opcode == NV_OP_MUL)
440 static struct nv_value *
441 find_immediate(struct nv_ref *ref)
443 struct nv_value *src;
449 while (src->insn && src->insn->opcode == NV_OP_MOV) {
450 assert(!src->insn->src[0]->mod);
451 src = src->insn->src[0]->value;
453 return (src->reg.file == NV_FILE_IMM) ? src : NULL;
457 modifiers_apply(uint32_t *val, ubyte type, ubyte mod)
459 if (mod & NV_MOD_ABS) {
460 if (type == NV_TYPE_F32)
463 if ((*val) & (1 << 31))
466 if (mod & NV_MOD_NEG) {
467 if (type == NV_TYPE_F32)
475 modifiers_opcode(ubyte mod)
478 case NV_MOD_NEG: return NV_OP_NEG;
479 case NV_MOD_ABS: return NV_OP_ABS;
488 constant_expression(struct nv_pc *pc, struct nv_instruction *nvi,
489 struct nv_value *src0, struct nv_value *src1)
491 struct nv_value *val;
501 type = nvi->def[0]->reg.type;
504 u0.u32 = src0->reg.imm.u32;
505 u1.u32 = src1->reg.imm.u32;
507 modifiers_apply(&u0.u32, type, nvi->src[0]->mod);
508 modifiers_apply(&u0.u32, type, nvi->src[1]->mod);
510 switch (nvi->opcode) {
512 if (nvi->src[2]->value->reg.file != NV_FILE_GPR)
517 case NV_TYPE_F32: u.f32 = u0.f32 * u1.f32; break;
518 case NV_TYPE_U32: u.u32 = u0.u32 * u1.u32; break;
519 case NV_TYPE_S32: u.s32 = u0.s32 * u1.s32; break;
527 case NV_TYPE_F32: u.f32 = u0.f32 + u1.f32; break;
528 case NV_TYPE_U32: u.u32 = u0.u32 + u1.u32; break;
529 case NV_TYPE_S32: u.s32 = u0.s32 + u1.s32; break;
537 case NV_TYPE_F32: u.f32 = u0.f32 - u1.f32;
538 case NV_TYPE_U32: u.u32 = u0.u32 - u1.u32;
539 case NV_TYPE_S32: u.s32 = u0.s32 - u1.s32;
549 nvi->opcode = NV_OP_MOV;
551 val = new_value(pc, NV_FILE_IMM, type);
553 val->reg.imm.u32 = u.u32;
555 nv_reference(pc, &nvi->src[1], NULL);
556 nv_reference(pc, &nvi->src[0], val);
558 if (nvi->src[2]) { /* from MAD */
559 nvi->src[1] = nvi->src[0];
560 nvi->src[0] = nvi->src[2];
562 nvi->opcode = NV_OP_ADD;
567 constant_operand(struct nv_pc *pc,
568 struct nv_instruction *nvi, struct nv_value *val, int s)
581 type = nvi->def[0]->reg.type;
583 u.u32 = val->reg.imm.u32;
584 modifiers_apply(&u.u32, type, nvi->src[s]->mod);
586 switch (nvi->opcode) {
588 if ((type == NV_TYPE_F32 && u.f32 == 1.0f) ||
589 (NV_TYPE_ISINT(type) && u.u32 == 1)) {
590 if ((op = modifiers_opcode(nvi->src[t]->mod)) == NV_OP_NOP)
593 nv_reference(pc, &nvi->src[s], NULL);
594 nvi->src[0] = nvi->src[t];
597 if ((type == NV_TYPE_F32 && u.f32 == 2.0f) ||
598 (NV_TYPE_ISINT(type) && u.u32 == 2)) {
599 nvi->opcode = NV_OP_ADD;
600 nv_reference(pc, &nvi->src[s], nvi->src[t]->value);
601 nvi->src[s]->mod = nvi->src[t]->mod;
603 if (type == NV_TYPE_F32 && u.f32 == -1.0f) {
604 if (nvi->src[t]->mod & NV_MOD_NEG)
605 nvi->opcode = NV_OP_MOV;
607 nvi->opcode = NV_OP_NEG;
608 nv_reference(pc, &nvi->src[s], NULL);
609 nvi->src[0] = nvi->src[t];
612 if (type == NV_TYPE_F32 && u.f32 == -2.0f) {
613 nvi->opcode = NV_OP_ADD;
614 nv_reference(pc, &nvi->src[s], nvi->src[t]->value);
615 nvi->src[s]->mod = (nvi->src[t]->mod ^= NV_MOD_NEG);
618 nvi->opcode = NV_OP_MOV;
619 nv_reference(pc, &nvi->src[t], NULL);
621 nvi->src[0] = nvi->src[1];
628 if ((op = modifiers_opcode(nvi->src[t]->mod)) == NV_OP_NOP)
631 nv_reference(pc, &nvi->src[s], NULL);
632 nvi->src[0] = nvi->src[t];
637 u.f32 = 1.0f / u.f32;
638 (val = new_value(pc, NV_FILE_IMM, NV_TYPE_F32))->reg.imm.f32 = u.f32;
639 nvi->opcode = NV_OP_MOV;
641 nv_reference(pc, &nvi->src[0], val);
644 u.f32 = 1.0f / sqrtf(u.f32);
645 (val = new_value(pc, NV_FILE_IMM, NV_TYPE_F32))->reg.imm.f32 = u.f32;
646 nvi->opcode = NV_OP_MOV;
648 nv_reference(pc, &nvi->src[0], val);
656 nv_pass_lower_arith(struct nv_pass *ctx, struct nv_basic_block *b)
658 struct nv_instruction *nvi, *next;
661 for (nvi = b->entry; nvi; nvi = next) {
662 struct nv_value *src0, *src1, *src;
667 src0 = find_immediate(nvi->src[0]);
668 src1 = find_immediate(nvi->src[1]);
671 constant_expression(ctx->pc, nvi, src0, src1);
674 constant_operand(ctx->pc, nvi, src0, 0);
677 constant_operand(ctx->pc, nvi, src1, 1);
680 /* try to combine MUL, ADD into MAD */
681 if (nvi->opcode != NV_OP_ADD)
684 src0 = nvi->src[0]->value;
685 src1 = nvi->src[1]->value;
687 if (SRC_IS_MUL(src0) && src0->refc == 1)
690 if (SRC_IS_MUL(src1) && src1->refc == 1)
695 nvi->opcode = NV_OP_MAD;
696 mod = nvi->src[(src == src0) ? 0 : 1]->mod;
697 nv_reference(ctx->pc, &nvi->src[(src == src0) ? 0 : 1], NULL);
698 nvi->src[2] = nvi->src[(src == src0) ? 1 : 0];
700 assert(!(mod & ~NV_MOD_NEG));
701 nvi->src[0] = new_ref(ctx->pc, src->insn->src[0]->value);
702 nvi->src[1] = new_ref(ctx->pc, src->insn->src[1]->value);
703 nvi->src[0]->mod = src->insn->src[0]->mod ^ mod;
704 nvi->src[1]->mod = src->insn->src[1]->mod;
706 DESCEND_ARBITRARY(j, nv_pass_lower_arith);
712 set $r2 g f32 $r2 $r3
713 cvt abs rn f32 $r2 s32 $r2
714 cvt f32 $c0 # f32 $r2
719 nv_pass_lower_cond(struct nv_pass *ctx, struct nv_basic_block *b)
721 /* XXX: easier in IR builder for now */
726 /* TODO: redundant store elimination */
729 struct load_record *next;
731 struct nv_value *value;
734 #define LOAD_RECORD_POOL_SIZE 1024
736 struct nv_pass_reld_elim {
739 struct load_record *imm;
740 struct load_record *mem_s;
741 struct load_record *mem_v;
742 struct load_record *mem_c[16];
743 struct load_record *mem_l;
745 struct load_record pool[LOAD_RECORD_POOL_SIZE];
750 nv_pass_reload_elim(struct nv_pass_reld_elim *ctx, struct nv_basic_block *b)
752 struct load_record **rec, *it;
753 struct nv_instruction *ld, *next;
755 struct nv_value *val;
758 for (ld = b->entry; ld; ld = next) {
762 val = ld->src[0]->value;
765 if (ld->opcode == NV_OP_LINTERP || ld->opcode == NV_OP_PINTERP) {
769 if (ld->opcode == NV_OP_LDA) {
771 if (val->reg.file >= NV_FILE_MEM_C(0) &&
772 val->reg.file <= NV_FILE_MEM_C(15))
773 rec = &ctx->mem_c[val->reg.file - NV_FILE_MEM_C(0)];
775 if (val->reg.file == NV_FILE_MEM_S)
778 if (val->reg.file == NV_FILE_MEM_L)
781 if ((ld->opcode == NV_OP_MOV) && (val->reg.file == NV_FILE_IMM)) {
782 data = val->reg.imm.u32;
786 if (!rec || !ld->def[0]->refc)
789 for (it = *rec; it; it = it->next)
790 if (it->data == data)
794 if (ld->def[0]->reg.id >= 0)
795 it->value = ld->def[0];
797 nvcg_replace_value(ctx->pc, ld->def[0], it->value);
799 if (ctx->alloc == LOAD_RECORD_POOL_SIZE)
801 it = &ctx->pool[ctx->alloc++];
804 it->value = ld->def[0];
812 for (j = 0; j < 16; ++j)
813 ctx->mem_c[j] = NULL;
817 DESCEND_ARBITRARY(j, nv_pass_reload_elim);
823 nv_pass_tex_mask(struct nv_pass *ctx, struct nv_basic_block *b)
827 for (i = 0; i < ctx->pc->num_instructions; ++i) {
828 struct nv_instruction *nvi = &ctx->pc->instructions[i];
829 struct nv_value *def[4];
831 if (!nv_is_vector_op(nvi->opcode))
835 for (c = 0; c < 4; ++c) {
836 if (nvi->def[c]->refc)
837 nvi->tex_mask |= 1 << c;
838 def[c] = nvi->def[c];
842 for (c = 0; c < 4; ++c)
843 if (nvi->tex_mask & (1 << c))
844 nvi->def[j++] = def[c];
845 for (c = 0; c < 4; ++c)
846 if (!(nvi->tex_mask & (1 << c)))
847 nvi->def[j++] = def[c];
859 nv_pass_dce(struct nv_pass_dce *ctx, struct nv_basic_block *b)
862 struct nv_instruction *nvi, *next;
864 for (nvi = b->phi ? b->phi : b->entry; nvi; nvi = next) {
867 if (inst_cullable(nvi)) {
873 DESCEND_ARBITRARY(j, nv_pass_dce);
878 /* Register allocation inserted ELSE blocks for all IF/ENDIF without ELSE.
879 * Returns TRUE if @bb initiates an IF/ELSE/ENDIF clause, or is an IF with
880 * BREAK and dummy ELSE block.
882 static INLINE boolean
883 bb_is_if_else_endif(struct nv_basic_block *bb)
885 if (!bb->out[0] || !bb->out[1])
888 if (bb->out[0]->out_kind[0] == CFG_EDGE_LOOP_LEAVE) {
889 return (bb->out[0]->out[1] == bb->out[1]->out[0] &&
890 !bb->out[1]->out[1]);
892 return (bb->out[0]->out[0] == bb->out[1]->out[0] &&
893 !bb->out[0]->out[1] &&
894 !bb->out[1]->out[1]);
898 /* predicate instructions and remove branch at the end */
900 predicate_instructions(struct nv_pc *pc, struct nv_basic_block *b,
901 struct nv_value *p, ubyte cc)
903 struct nv_instruction *nvi;
907 for (nvi = b->entry; nvi->next; nvi = nvi->next) {
908 if (!nvi_isnop(nvi)) {
910 nv_reference(pc, &nvi->flags_src, p);
914 if (nvi->opcode == NV_OP_BRA)
917 if (!nvi_isnop(nvi)) {
919 nv_reference(pc, &nvi->flags_src, p);
923 /* NOTE: Run this after register allocation, we can just cut out the cflow
924 * instructions and hook the predicates to the conditional OPs if they are
925 * not using immediates; better than inserting SELECT to join definitions.
927 * NOTE: Should adapt prior optimization to make this possible more often.
930 nv_pass_flatten(struct nv_pass *ctx, struct nv_basic_block *b)
932 struct nv_instruction *nvi;
933 struct nv_value *pred;
937 if (bb_is_if_else_endif(b)) {
939 debug_printf("pass_flatten: IF/ELSE/ENDIF construct at BB:%i\n", b->id);
941 for (n0 = 0, nvi = b->out[0]->entry; nvi; nvi = nvi->next, ++n0)
942 if (!nv50_nvi_can_predicate(nvi))
945 for (n1 = 0, nvi = b->out[1]->entry; nvi; nvi = nvi->next, ++n1)
946 if (!nv50_nvi_can_predicate(nvi))
949 debug_printf("cannot predicate: "); nv_print_instruction(nvi);
952 debug_printf("cannot predicate: "); nv_print_instruction(nvi);
955 if (!nvi && n0 < 12 && n1 < 12) { /* 12 as arbitrary limit */
956 assert(b->exit && b->exit->flags_src);
957 pred = b->exit->flags_src->value;
959 predicate_instructions(ctx->pc, b->out[0], pred, NV_CC_NE | NV_CC_U);
960 predicate_instructions(ctx->pc, b->out[1], pred, NV_CC_EQ);
962 assert(b->exit && b->exit->opcode == NV_OP_BRA);
963 nv_nvi_delete(b->exit);
965 if (b->exit && b->exit->opcode == NV_OP_JOINAT)
966 nv_nvi_delete(b->exit);
968 if ((nvi = b->out[0]->out[0]->entry)) {
970 if (nvi->opcode == NV_OP_JOIN)
975 DESCEND_ARBITRARY(i, nv_pass_flatten);
980 /* local common subexpression elimination, stupid O(n^2) implementation */
982 nv_pass_cse(struct nv_pass *ctx, struct nv_basic_block *b)
984 struct nv_instruction *ir, *ik, *next;
985 struct nv_instruction *entry = b->phi ? b->phi : b->entry;
991 for (ir = entry; ir; ir = next) {
993 for (ik = entry; ik != ir; ik = ik->next) {
994 if (ir->opcode != ik->opcode)
997 if (ik->opcode == NV_OP_LDA ||
998 ik->opcode == NV_OP_STA ||
999 ik->opcode == NV_OP_MOV ||
1000 nv_is_vector_op(ik->opcode))
1001 continue; /* ignore loads, stores & moves */
1003 if (ik->src[4] || ir->src[4])
1004 continue; /* don't mess with address registers */
1006 if (ik->flags_src || ir->flags_src ||
1007 ik->flags_def || ir->flags_def)
1008 continue; /* and also not with flags, for now */
1010 assert(ik->def[0] && ir->def[0]);
1012 if (ik->def[0]->reg.file == NV_FILE_OUT ||
1013 ir->def[0]->reg.file == NV_FILE_OUT ||
1014 !values_equal(ik->def[0], ir->def[0]))
1017 for (s = 0; s < 3; ++s) {
1018 struct nv_value *a, *b;
1025 if (ik->src[s]->mod != ir->src[s]->mod)
1027 a = ik->src[s]->value;
1028 b = ir->src[s]->value;
1031 if (a->reg.file != b->reg.file ||
1033 a->reg.id != b->reg.id)
1039 nvcg_replace_value(ctx->pc, ir->def[0], ik->def[0]);
1046 DESCEND_ARBITRARY(s, nv_pass_cse);
1052 nv_pc_exec_pass0(struct nv_pc *pc)
1054 struct nv_pass_reld_elim *reldelim;
1055 struct nv_pass pass;
1056 struct nv_pass_dce dce;
1062 /* Do this first, so we don't have to pay attention
1063 * to whether sources are supported memory loads.
1066 ret = nv_pass_lower_arith(&pass, pc->root);
1071 ret = nv_pass_fold_loads(&pass, pc->root);
1076 ret = nv_pass_fold_stores(&pass, pc->root);
1080 reldelim = CALLOC_STRUCT(nv_pass_reld_elim);
1083 ret = nv_pass_reload_elim(reldelim, pc->root);
1089 ret = nv_pass_cse(&pass, pc->root);
1094 ret = nv_pass_lower_mods(&pass, pc->root);
1102 ret = nv_pass_dce(&dce, pc->root);
1105 } while (dce.removed);
1107 ret = nv_pass_tex_mask(&pass, pc->root);