Tizen 2.0 Release
[profile/ivi/osmesa.git] / src / gallium / drivers / i965 / brw_pipe_depth.c
1
2 #include "util/u_math.h"
3 #include "util/u_memory.h"
4
5 #include "brw_context.h"
6 #include "brw_defines.h"
7
8 /* XXX: Fixme - include this to get IZ_ defines
9  */
10 #include "brw_wm.h"
11
12 static unsigned brw_translate_compare_func(unsigned func)
13 {
14    switch (func) {
15    case PIPE_FUNC_NEVER:
16       return BRW_COMPAREFUNCTION_NEVER;
17    case PIPE_FUNC_LESS:
18       return BRW_COMPAREFUNCTION_LESS;
19    case PIPE_FUNC_LEQUAL:
20       return BRW_COMPAREFUNCTION_LEQUAL;
21    case PIPE_FUNC_GREATER:
22       return BRW_COMPAREFUNCTION_GREATER;
23    case PIPE_FUNC_GEQUAL:
24       return BRW_COMPAREFUNCTION_GEQUAL;
25    case PIPE_FUNC_NOTEQUAL:
26       return BRW_COMPAREFUNCTION_NOTEQUAL;
27    case PIPE_FUNC_EQUAL:
28       return BRW_COMPAREFUNCTION_EQUAL;
29    case PIPE_FUNC_ALWAYS:
30       return BRW_COMPAREFUNCTION_ALWAYS;
31    default:
32       assert(0);
33       return BRW_COMPAREFUNCTION_ALWAYS;
34    }
35 }
36
37 static unsigned translate_stencil_op(unsigned op)
38 {
39    switch (op) {
40    case PIPE_STENCIL_OP_KEEP:
41       return BRW_STENCILOP_KEEP;
42    case PIPE_STENCIL_OP_ZERO:
43       return BRW_STENCILOP_ZERO;
44    case PIPE_STENCIL_OP_REPLACE:
45       return BRW_STENCILOP_REPLACE;
46    case PIPE_STENCIL_OP_INCR:
47       return BRW_STENCILOP_INCRSAT;
48    case PIPE_STENCIL_OP_DECR:
49       return BRW_STENCILOP_DECRSAT;
50    case PIPE_STENCIL_OP_INCR_WRAP:
51       return BRW_STENCILOP_INCR;
52    case PIPE_STENCIL_OP_DECR_WRAP:
53       return BRW_STENCILOP_DECR;
54    case PIPE_STENCIL_OP_INVERT:
55       return BRW_STENCILOP_INVERT;
56    default:
57       assert(0);
58       return BRW_STENCILOP_ZERO;
59    }
60 }
61
62 static void create_bcc_state( struct brw_depth_stencil_state *zstencil,
63                               const struct pipe_depth_stencil_alpha_state *templ )
64 {
65    if (templ->stencil[0].enabled) {
66       zstencil->cc0.stencil_enable = 1;
67       zstencil->cc0.stencil_func =
68          brw_translate_compare_func(templ->stencil[0].func);
69       zstencil->cc0.stencil_fail_op =
70          translate_stencil_op(templ->stencil[0].fail_op);
71       zstencil->cc0.stencil_pass_depth_fail_op =
72          translate_stencil_op(templ->stencil[0].zfail_op);
73       zstencil->cc0.stencil_pass_depth_pass_op =
74          translate_stencil_op(templ->stencil[0].zpass_op);
75       zstencil->cc1.stencil_write_mask = templ->stencil[0].writemask;
76       zstencil->cc1.stencil_test_mask = templ->stencil[0].valuemask;
77
78       if (templ->stencil[1].enabled) {
79          zstencil->cc0.bf_stencil_enable = 1;
80          zstencil->cc0.bf_stencil_func =
81             brw_translate_compare_func(templ->stencil[1].func);
82          zstencil->cc0.bf_stencil_fail_op =
83             translate_stencil_op(templ->stencil[1].fail_op);
84          zstencil->cc0.bf_stencil_pass_depth_fail_op =
85             translate_stencil_op(templ->stencil[1].zfail_op);
86          zstencil->cc0.bf_stencil_pass_depth_pass_op =
87             translate_stencil_op(templ->stencil[1].zpass_op);
88          zstencil->cc2.bf_stencil_write_mask = templ->stencil[1].writemask;
89          zstencil->cc2.bf_stencil_test_mask = templ->stencil[1].valuemask;
90       }
91
92       zstencil->cc0.stencil_write_enable = (zstencil->cc1.stencil_write_mask ||
93                                             zstencil->cc2.bf_stencil_write_mask);
94    }
95
96
97    if (templ->alpha.enabled) {
98       zstencil->cc3.alpha_test = 1;
99       zstencil->cc3.alpha_test_func = brw_translate_compare_func(templ->alpha.func);
100       zstencil->cc3.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8;
101       zstencil->cc7.alpha_ref.ub[0] = float_to_ubyte(templ->alpha.ref_value);
102    }
103
104    if (templ->depth.enabled) {
105       zstencil->cc2.depth_test = 1;
106       zstencil->cc2.depth_test_function = brw_translate_compare_func(templ->depth.func);
107       zstencil->cc2.depth_write_enable = templ->depth.writemask;
108    }
109 }
110
111 static void create_wm_iz_state( struct brw_depth_stencil_state *zstencil )
112 {
113    if (zstencil->cc3.alpha_test)
114       zstencil->iz_lookup |= IZ_PS_KILL_ALPHATEST_BIT;
115
116    if (zstencil->cc2.depth_test)
117       zstencil->iz_lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
118
119    if (zstencil->cc2.depth_write_enable)
120       zstencil->iz_lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
121
122    if (zstencil->cc0.stencil_enable)
123       zstencil->iz_lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
124
125    if (zstencil->cc0.stencil_write_enable)
126       zstencil->iz_lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
127
128 }
129
130
131 static void *
132 brw_create_depth_stencil_state( struct pipe_context *pipe,
133                                 const struct pipe_depth_stencil_alpha_state *templ )
134 {
135    struct brw_depth_stencil_state *zstencil = CALLOC_STRUCT(brw_depth_stencil_state);
136
137    create_bcc_state( zstencil, templ );
138    create_wm_iz_state( zstencil );
139
140    return (void *)zstencil;
141 }
142
143
144 static void brw_bind_depth_stencil_state(struct pipe_context *pipe,
145                                          void *cso)
146 {
147    struct brw_context *brw = brw_context(pipe);
148    brw->curr.zstencil = (const struct brw_depth_stencil_state *)cso;
149    brw->state.dirty.mesa |= PIPE_NEW_DEPTH_STENCIL_ALPHA;
150 }
151
152 static void brw_delete_depth_stencil_state(struct pipe_context *pipe,
153                                            void *cso)
154 {
155    struct brw_context *brw = brw_context(pipe);
156    assert((const void *)cso != (const void *)brw->curr.zstencil);
157    FREE(cso);
158 }
159
160 static void brw_set_stencil_ref(struct pipe_context *pipe,
161                                 const struct pipe_stencil_ref *stencil_ref)
162 {
163    struct brw_context *brw = brw_context(pipe);
164    brw->curr.cc1_stencil_ref.stencil_ref = stencil_ref->ref_value[0];
165    brw->curr.cc1_stencil_ref.bf_stencil_ref = stencil_ref->ref_value[1];
166
167    brw->state.dirty.mesa |= PIPE_NEW_DEPTH_STENCIL_ALPHA;
168 }
169
170 static void
171 brw_set_sample_mask(struct pipe_context *pipe,
172                     unsigned sample_mask)
173 {
174 }
175
176 void brw_pipe_depth_stencil_init( struct brw_context *brw )
177 {
178    brw->base.set_stencil_ref = brw_set_stencil_ref;
179    brw->base.create_depth_stencil_alpha_state = brw_create_depth_stencil_state;
180    brw->base.bind_depth_stencil_alpha_state = brw_bind_depth_stencil_state;
181    brw->base.delete_depth_stencil_alpha_state = brw_delete_depth_stencil_state;
182    brw->base.set_sample_mask = brw_set_sample_mask;
183 }
184
185 void brw_pipe_depth_stencil_cleanup( struct brw_context *brw )
186 {
187 }